Fixes the following building error:
clang: error: no such file or directory: 'external/mesa/src/panfrost/bifrost/bi_tables.c'
clang: error: no input files
Fixes: b691aeaacf ("pan/bi: Remove old IR opcode table")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8294>
Fixes the following building error:
clang: error: no such file or directory: 'external/mesa/src/panfrost/bifrost/bi_special.c'
clang: error: no input files
Fixes: e5ec0dc183 ("pan/bi: Remove NIR->old IR")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8294>
Fixes the following building error:
clang: error: no such file or directory: 'external/mesa/src/panfrost/bifrost/bi_lower_combine.c'
clang: error: no input files
Fixes: 8b0d0a931b ("pan/bi: Remove combine lowering")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8294>
R16_UNORM isn't compatible with AFBC, we need to use the native Z16
format if we want to allow AFBC on those resources.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
On Bifrost v7, AFBC textures can't be used with a non-identity component
order. Let's patch the format so the component order is always RGB[A].
That means we're lying about the internal format, but that shouldn't be
a problem as long as we don't share the resource.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
And let the function translate it to a mali swizzle. This way we will
be able to adjust the swizzle if needed.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
AFBC strides are different from tiled/linear stride and we need to
use the value defined in slice.afbc.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
Those are needed for render target and texture descriptors and can't be
easily extracted from the other fields present in panfrost_slice
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
So we can add more AFBC related fields under this struct.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
Group the slices, dimension, modifier and array stride in a an object
representing the image layout. This way we shrink the number of
arguments passed to various pan_texture helpers and simplifies some
of the logic along the way.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
This field is encoding the stride between two consecutive surface
in a 3D texture. Let's use a name reflecting that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
There's no reason to keep both now that the internal logic has been
deduplicated.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
Bifrost has a few more compression flags that are worth specifying.
Extend panfrost_compression_tag() to deal with those too.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
So we can soon use the same path for Bifrost and Midgard.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
The only reason we have two different functions to prepare the texture
payload is the different ordering between pre-v7 and v7+ GPUs. Abstract
the surface iteration so we can merge panfrost_emit_texture_payload_v7()
and panfrost_emit_texture_payload().
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
We will need it to merge some of the Bifrost and Midgard logic.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
There's no reason to have the checksum_bo at the slice level since there
can only be one external CRC BO per resource. Move this field to the
panfrost_resource struct.
Suggested-by: Icecream95
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8125>
Similar to shared memory load/store, except giving a different memory
type to the hardware.
Add nir->scratch_size to ctx->tls_size to allocate the memory.
Tested with the Piglit OpenCL test i32-stack-array.cl.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
There are now more intrinsics for which nir_type_uint is forced than
where the destination type is used to find the intrinsic type, so
invert the conditional so that nir_type_uint is the default case when
nothing more specific is given.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
We want to add support for more memory types, so replace the is_shared
bool with an integer that is directly stored to load_store.arg_1.
The new memory type values are off by 0x40, as that bit now comes from
the index type.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
mir_args_ssa asserted that the given number of arguments to use is
greater than or equal to the actual number, but this is not checked by
callers, so instead of crashing return false to mark failure.
Fixes the local memory atomics OpenCL tests in Piglit.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
The index type is actually a two-bit field, with support for both sign
and zero extension.
What was previously labelled as `zext` actually does sign-extension,
but we want that in most cases anyway.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
NIR generates global_invocation_id, but Clover lowers it to
global_invocation_id_zero_base. It isn't lowered for OpenGL,
so we need to support both intrinsics.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8264>
The bound parameter allows us to prevent allocations from crossing
particular boundaries (typically 128-bit boundaries). For 16-bit, we
don't want to cross 64-bit boundaries, in order to keep swizzles
possible to encode. We already handle this for 16-bit destinations, but
it _also_ needs to be (redundantly) handled for 16-bit sources, in case
types don't match (for example, with a vectorized size conversion
instruction).
Fixes a few newer dEQP fails.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8282>
The ATEST FAU index must point to the ATEST parameter datum slot
otherwise the cmdstream config is ignored.
(Rebased by Alyssa)
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
