Xavi Zhang
2bf243f7c6
amdgpu/addrlib: add dccRamSizeAligned output flag
...
This flag indicates to the client if this level's DCC memory is aligned
or not. No aligned means there are padding to the end.
2017-03-30 14:44:33 +02:00
Nicolai Hähnle
e443b48966
amdgpu/addrlib: Change comment alignment
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Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
Nicolai Hähnle
e06aeaf19f
amdgpu/addrlib: style changes and minor cleanups
...
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
Xavi Zhang
f12d430c59
amdgpu/addrlib: add disableLinearOpt flag
2017-03-30 14:44:33 +02:00
Xavi Zhang
b5d8120a07
amdgpu/addrlib: Add GetMaxAlignments
2017-03-30 14:44:33 +02:00
Xavi Zhang
3614999878
amdgpu/addrlib: Rewrite tile mode optmization code
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Note: remove reference to degrade4Space and use opt4Space instead.
2017-03-30 14:44:33 +02:00
Carlos Xiong
c12e35065a
amdgpu/addrlib: Add a flag "tcCompatible" to surface info output structure.
...
Even if surface info input flag "tcComaptible" is enabled, tc
compatible may be not supported if tile split happens for depth
surfaces. Add a new flag in output structure to notify client to
disable tc compatible in this case.
2017-03-30 14:44:33 +02:00
Xavi Zhang
2ffb30c2af
amdgpu/addrlib: Make comments shorter
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Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-03-30 14:44:33 +02:00
XiaoYuan Zheng
3c7bd4e013
amdgpu/addrlib: add new flag nonSplit
...
Flag tcCompatible has different usage in CI and VI. Add a new flag
"nonSplit" for CI.
2017-03-30 14:44:33 +02:00
Dave Airlie
69fca64259
amd/addrlib: move addrlib from amdgpu winsys to common code
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Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-09-06 10:06:33 +10:00
