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Author SHA1 Message Date
Konstantin Seurer
c925b6019d radv/rt: Lower ray payloads like hit attribs 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27051>
 2024-02-02 16:36:15 +00:00
Konstantin Seurer
f27a973283 radv/rt: Use doubles inside intersect_ray_amd_software_tri 
Increasing precision lets us avoid duplicate hits on shared edges. The
previous biasing WA made a bunch of tests fail.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27243>
 2024-01-30 10:26:43 +01:00
Tatsuyuki Ishi
70b0c5909b radv: Add radv_spirv_to_nir_options that summarize early gfx states. 
radv_shader_spirv_to_nir now takes a more minimal struct instead of gfx
states. This struct will be used for NIR cache hashing in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26696>
 2024-01-26 11:46:18 +00:00
Samuel Pitoiset
df3fbe3b33 radv: promote VK_EXT_line_rasterization to KHR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27262>
 2024-01-26 10:00:48 +00:00
Samuel Pitoiset
853298edb1 radv/rt: cleanup radv_parse_rt_stage() 
To avoid calling radv_pipeline_stage_init() twice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
 2024-01-17 07:25:49 +00:00
Samuel Pitoiset
082c524f86 radv: pass radv_shader_stage_key to radv_pipeline_stage_init() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
 2024-01-17 07:25:49 +00:00
Samuel Pitoiset
b555f9451c radv: introduce radv_graphics_state_key 
This struct only contains graphics related state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
f2f87d0872 radv: re-organize radv_pipeline_key 
Rename and regroup fields per PSO basically.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
fb80421a62 radv: stop passing the pipeline key when compiling compute/rt shaders 
The pipeline key now essentially contains graphics state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
6e7018e74d radv: remove unused lower_rt_instruction_monolithic_state::key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
28e330c245 radv: add radv_shader_stage_key to radv_shader_stage 
For storing the per-stage key information like robustness etc. This
will fit well with ESO as well.

For pipelines, they are copied from radv_pipeline_key, similarly to
the radv_pipeline_layout/radv_shader_layout pair.

This will also allow us to kill radv_pipeline_key for compute/rt
pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
138ce72860 radv/nir: remove useless struct for nir_shader typedef 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
18349692d0 radv/nir: pass radv_shader_stage to some radv_nir_xxx() functions 
Instead of passing separate parameters for args, layout, info etc.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>
 2024-01-15 11:49:04 +00:00
Samuel Pitoiset
59c05b9cfa Revert "radv/rt: Lower ray payloads to registers" 
This causes GPU hangs with vkd3d-proton in CI.

This reverts commit 658ce711d5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26983>
 2024-01-10 18:12:55 +00:00
Samuel Pitoiset
58d2a78dba radv: move dri options to radv_instance::drirc 
To make it clearer that such an option is a per-application option.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26946>
 2024-01-10 10:07:40 +00:00
Konstantin Seurer
658ce711d5 radv/rt: Lower ray payloads to registers 
This should allow for cross stage optimizations and it reduces latency
caused by scratch access.

Totals from 44 (9.69% of 454) affected shaders:
MaxWaves: 432 -> 436 (+0.93%)
Instrs: 2740662 -> 1610327 (-41.24%); split: -41.24%, +0.00%
CodeSize: 14616932 -> 8573620 (-41.34%)
VGPRs: 4880 -> 4816 (-1.31%)
SpillSGPRs: 464 -> 294 (-36.64%)
Latency: 18548886 -> 11465281 (-38.19%); split: -38.19%, +0.00%
InvThroughput: 5195964 -> 3066729 (-40.98%); split: -40.98%, +0.00%
VClause: 99672 -> 55611 (-44.21%)
SClause: 65827 -> 38697 (-41.21%)
Copies: 231231 -> 137676 (-40.46%); split: -40.47%, +0.01%
Branches: 111379 -> 65865 (-40.86%); split: -40.87%, +0.00%
PreSGPRs: 3854 -> 3812 (-1.09%); split: -1.19%, +0.10%
PreVGPRs: 4518 -> 4439 (-1.75%); split: -1.84%, +0.09%

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26431>
 2024-01-09 13:02:11 +00:00
Konstantin Seurer
c511b8968a radv: Implement VK_KHR_ray_tracing_position_fetch 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26895>
 2024-01-05 18:20:20 +00:00
Samuel Pitoiset
f30fa9dec8 radv: move radv_rt_{common,shader} files to nir/ 
These files contains NIR lowering code for RT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26851>
 2024-01-03 09:40:29 +00:00
Bas Nieuwenhuizen
07ad6fd34a radv: Use correct writemask for cooperative matrix ordering. 
Not expecting this to actually fix anything externally visible,
but reduces some invalid usage when the resulting vector is
not 16 elements long (e.g. the C/result matrix).

Fixes: 9df4703fbb ("radv: Add cooperative matrix lowering.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26768>
 2023-12-20 11:02:30 +00:00
Rhys Perry
4d2a3b9573 radv: add radv_disable_trunc_coord option 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25911>
 2023-11-17 15:15:27 +00:00
Konstantin Seurer
ba8d3afa56 radv/nir: Handle boolean hit attribs 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24271>
 2023-11-02 15:48:36 +00:00
Konstantin Seurer
3a69424e09 radv/nir: Add radv_nir_lower_hit_attrib_derefs 
Move out the pass so it can be unit tested.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24271>
 2023-11-02 15:48:36 +00:00
Rhys Perry
ed12be533e radv: call lower_array_deref_of_vec before lower_io_arrays_to_elements 
nir_lower_io_arrays_to_elements does not support array derefs of vectors,
even when nir_deref_instr_is_known_out_of_bounds is fixed.

They can occur with mesh shaders.

Found by inspection.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25659>
 2023-11-02 12:44:43 +00:00
Bas Nieuwenhuizen
9df4703fbb radv: Add cooperative matrix lowering. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>
 2023-10-24 13:24:18 +00:00
Samuel Pitoiset
fae4360a08 radv: enable lowering of mesh/task shader queries when enabled 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25331>
 2023-09-26 07:50:16 +00:00
Samuel Pitoiset
918a57579f radv: adjust lowering of intrinsic queries for mesh/task shaders 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25331>
 2023-09-26 07:50:16 +00:00
Samuel Pitoiset
9a3b902cac ac/nir: add lowering for task shader queries 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25331>
 2023-09-26 07:50:15 +00:00
Samuel Pitoiset
1ce80653b2 nir: rename atomic_add_gs_invocation_count_amd to make it more generic 
It will be re-used to implement mesh/tash shader invocations queries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25331>
 2023-09-26 07:50:15 +00:00
Konstantin Seurer
e0cf4fbf38 radv/ray_queries: Skip cull_mask handling if it is FF 
Stats for Metro Exodus:

Totals from 26 (0.99% of 2627) affected shaders:
Instrs: 14586 -> 14232 (-2.43%)
CodeSize: 77024 -> 75192 (-2.38%)
VGPRs: 1408 -> 1208 (-14.20%)
Latency: 315076 -> 309898 (-1.64%)
InvThroughput: 42345 -> 41677 (-1.58%)
VClause: 366 -> 374 (+2.19%)
Copies: 2840 -> 2800 (-1.41%); split: -1.48%, +0.07%
Branches: 587 -> 561 (-4.43%)
PreSGPRs: 897 -> 853 (-4.91%)
PreVGPRs: 1290 -> 1122 (-13.02%)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25268>
 2023-09-20 13:00:03 +00:00
Alyssa Rosenzweig
d1eb17e92e treewide: Drop nir_ssa_for_src users 
Via Coccinelle patch:

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, *s, n)
    +s->ssa

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, s, n)
    +s.ssa

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25247>
 2023-09-18 10:25:17 -04:00
Friedrich Vock
728f6c0b70 radv/rt: Pre-initialize instance address 
It's not disallowed by spec to load instance-related data in case of a
miss where no instance was ever visited. Such loads make no sense, so we
can return garbage, but it mustn't hang the GPU. Initialize the instance
addresses to the TLAS base to make sure we always have valid memory to load from.

Partially fixes GPU hangs in RTX Remix games.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24971>
 2023-08-31 16:29:52 +00:00
Alyssa Rosenzweig
25cc04c59b treewide: Use nir_before/after_impl in easy cases 
These open-code the same idiom as the helper.

Via Coccinelle patch:

    @@
    expression func_impl;
    @@

    -nir_before_cf_list(&func_impl->body)
    +nir_before_impl(func_impl)

    @@
    expression func_impl;
    @@

    -nir_after_cf_list(&func_impl->body)
    +nir_after_impl(func_impl)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24910>
 2023-08-30 19:30:58 +00:00
Samuel Pitoiset
496a17bffe radv: re-order IO slot layout for stages that aren't linked 
Otherwise, if eg. PSIZ is exported the ESGS stride is wrong. This isn't
optimal yet but let's start with this to support separate compilation
of VS/TCS/TES/GS correctly first.

This fixes a bunch of issues when forcing separate compilation on RDNA2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24908>
 2023-08-30 08:59:06 +00:00
Alyssa Rosenzweig
465b138f01 treewide: Use nir_shader_intrinsic_pass sometimes 
This converts a lot of trivial passes. Nice boilerplate deletion. Via Coccinelle
patch (with a small manual fix-up for panfrost where coccinelle got confused by
genxml + ninja clang-format squashed in, and for Zink because my semantic patch
was slightly buggy).

    @def@
    typedef bool;
    typedef nir_builder;
    typedef nir_instr;
    typedef nir_def;
    identifier fn, instr, intr, x, builder, data;
    @@

    static fn(nir_builder* builder,
    -nir_instr *instr,
    +nir_intrinsic_instr *intr,
    ...)
    {
    (
    -   if (instr->type != nir_instr_type_intrinsic)
    -      return false;
    -   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    |
    -   nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
    -   if (instr->type != nir_instr_type_intrinsic)
    -      return false;
    )

    <...
    (
    -instr->x
    +intr->instr.x
    |
    -instr
    +&intr->instr
    )
    ...>

    }

    @pass depends on def@
    identifier def.fn;
    expression shader, progress;
    @@

    (
    -nir_shader_instructions_pass(shader, fn,
    +nir_shader_intrinsics_pass(shader, fn,
    ...)
    |
    -NIR_PASS_V(shader, nir_shader_instructions_pass, fn,
    +NIR_PASS_V(shader, nir_shader_intrinsics_pass, fn,
    ...)
    |
    -NIR_PASS(progress, shader, nir_shader_instructions_pass, fn,
    +NIR_PASS(progress, shader, nir_shader_intrinsics_pass, fn,
    ...)
    )

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24852>
 2023-08-24 15:48:02 +00:00
Samuel Pitoiset
0004d903d4 radv: fix the per-patch data offset when TES isn't linked with TCS 
When TCS and TES aren't linked together and TCS exports unused outputs,
the per-patch data offset needs to be adjusted. This is similar to the
LS-HS vertex stride when VS and TCS aren't linked together.

This fixes a bunch of failures by forcing the driver to use TCS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24776>
 2023-08-24 06:03:12 +00:00
Faith Ekstrand
b5d6b7c402 nir: Drop most uses if nir_instr_rewrite_src() 
Generated by the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src(I, S, nir_src_for_ssa(D));
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
de063a1481 nir: Drop most uses of nir_instr_rewrite_src_ssa() 
Generated with the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src_ssa(I, S, D);
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
4695bebc79 nir: Drop nir_dest 
Instead, we replace every use of it with nir_def.  Most of this commit
was generated by sed:

   sed -i -e 's/dest.ssa/def/g' src/**/*.h src/**/*.c src/**/*.cpp

A few manual fixups were required in lima and the nir_legacy code.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
 2023-08-14 21:22:53 +00:00
Alyssa Rosenzweig
09d31922de nir: Drop "SSA" from NIR language 
Everything is SSA now.

   sed -e 's/nir_ssa_def/nir_def/g' \
       -e 's/nir_ssa_undef/nir_undef/g' \
       -e 's/nir_ssa_scalar/nir_scalar/g' \
       -e 's/nir_src_rewrite_ssa/nir_src_rewrite/g' \
       -e 's/nir_gather_ssa_types/nir_gather_types/g' \
       -i $(git grep -l nir | grep -v relnotes)

   git mv src/compiler/nir/nir_gather_ssa_types.c \
          src/compiler/nir/nir_gather_types.c

   ninja -C build/ clang-format
   cd src/compiler/nir && find *.c *.h -type f -exec clang-format -i \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24585>
 2023-08-12 16:44:41 -04:00
Samuel Pitoiset
8a97302f57 radv: add support for loading the LSHS vertex stride from a SGPR 
With shader object, if VS and TCS aren't linked together, the LSHS
vertex stride should be computed from the vertex outputs. Otherwise,
if an output is unused, the stride is wrong in TCS.

This is currently for GFX8 only because for merged shaders this won't
be needed but shader object on GFX9+ isn't yet a thing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>
 2023-08-11 07:43:58 +00:00
Samuel Pitoiset
66eaca3a0a radv: introduce radv_shader_layout for per-stage descriptor layout 
With pipelines, the shader layout is inherited from the pipeline layout
but with shader objects, the layout is passed through
VkCreateShaderInfoEXT.

This basically replaces uses of radv_pipeline_layout by
radv_shader_layout during shaders compilation. This will avoid
creating a pipeline layout with ESO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>
 2023-08-10 08:51:05 +00:00
Samuel Pitoiset
61999253de radv: do not write tess factors in main TCS when it has an epilog 
Tess factors will be written by TCS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24404>
 2023-08-02 16:59:18 +00:00
Samuel Pitoiset
ac40924a3b radv: allow to use fixed IO locations for VS<->TCS<->TES without linking 
For shader objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24408>
 2023-08-02 06:54:09 +00:00
Samuel Pitoiset
f04577b789 radv: add support for dynamic TCS vertices out for TES 
With shader object, if TES is compiled without a TCS, the number of
TCS vertices out might not be known at compile time and it needs to be
loaded from a user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
 2023-07-28 08:21:40 +00:00
Samuel Pitoiset
faa756b3ba radv: copy the number of TCS vertices out to TES shader info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
 2023-07-28 08:21:40 +00:00
Samuel Pitoiset
e855c7dd3d radv: stop checking if patch control points is dynamic everywhere 
Check that the values are non-zero instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
 2023-07-28 08:21:40 +00:00
Samuel Pitoiset
a50cec9e18 radv: use a packed user SGPR for the TES state 
It only contains the number of tessellation patches for now, but it
will be used to pass the number of TCS vertices out for shader object.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24346>
 2023-07-28 08:21:40 +00:00
Samuel Pitoiset
8ab8145aa1 radv: add support for VS/TES as ES without shaders IO linking 
This implements fixed IO location for VS/TES with GS. This is currently
unused because everything is linked with GPL or monolithic pipelines,
but this will be used for shader object.

Tested by running full CTS after disabling NIR IO linking for VS/TES.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24328>
 2023-07-28 06:51:24 +00:00
Samuel Pitoiset
b3aeaee5eb radv: implement nir_intrinsic_atomic_add_gs_invocation_count_amd 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
 2023-07-27 09:13:11 +02:00
Samuel Pitoiset
2e0893cf8b radv: rename RADV_SHADER_QUERY_PIPELINE_STAT_OFFSET 
To RADV_SHADER_QUERY_GS_PRIM_EMIT_OFFSET.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231>
 2023-07-27 09:13:11 +02:00