Commit graph

353 commits

Author SHA1 Message Date
Alyssa Rosenzweig
c8435e4bc6 asahi: Rename 'tiled 64x64' to 'twiddled'
To account for non-64x64 tile sizes, as well as the other forms of
tiling that may come up with compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig
88eea62adb asahi: Identify compressed render target fields
We won't be implementing AGX compression for a while, but this gets some
unknowns out of the way when looking at dumps from Metal that use it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
2022-09-01 22:30:48 +00:00
Emma Anholt
28b2252d0a nir: Make nir_lower_discard_if() handle demotes and terminates, too.
AGX and zink both want all of these lowered, but nir_to_tgsi will want
only demote (and terminate if it was possible from GLSL but it's not)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Jason Ekstrand
4fab5ae8ba asahi: Use util/bitpack_helpers.h
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18062>
2022-08-30 04:28:34 +00:00
Alyssa Rosenzweig
15e15422ba asahi: Fix warning building for macOS 12.0
Unnecessary rename that breaks forward compatibility... but Apple says
this is just NULL. Do the simpler thing. Note that the argument is a
mach_port_t, which is a natural_t == uint32_t in userspace... even
though it's a pointer in the kernel. Although Apple's docs claim that
kIOMasterPortDefault is NULL, it's really just 0.

../src/asahi/lib/agx_device.c:290:35: warning: 'kIOMasterPortDefault' is deprecated: first deprecated in macOS 12.0 [-Wdeprecated-declarations]
      IOServiceGetMatchingService(kIOMasterPortDefault, matching);
                                  ^~~~~~~~~~~~~~~~~~~~
                                  kIOMainPortDefault

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18121>
2022-08-21 14:32:40 -04:00
Alyssa Rosenzweig
5fd8ae1541 asahi: Identify depth clip mode bit
Setting this bit (at the batch level, not the draw level!) switches to
[-1, 1] clipping instead of Metal's preferred [0, 1] clipping. Using
this bit allows us to drop the clip_halfz lowering we had before, saving
2 instructions in every vertex shader.

Fixes dEQP-GLES2.functional.depth_range.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17948>
2022-08-14 19:59:19 +00:00
Alyssa Rosenzweig
3712609ee3 agx: Only emit the used components of gl_FragCoord
In case a shader only use gl_FragCoord.xy, this avoids wasting
coefficient registers for gl_FragCoord.zw which should be a small
optimization. It's also less work for DCE but I'm less worried about
that.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
17168162fb agx: Remove p_extract
It's now unused. We didn't have coalescing for it anyway, splits are the
preferred alternative.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
c1900cb951 agx: Handle type-changing splits
If we want to break down a 64-bit value into its 32-bit halves, we want
to be able to use a split for this:

   lo, hi = split long

Extend the RA to handle this case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
f86ad382c5 agx: Stop using broken idiv lowering
It is, as the name suggests, broken. Instruction count goes from 50->53
on the shader in
dEQP-GLES2.functional.shaders.operator.binary_operator.div.highp_int_fragment.
I'm happy to eat that cost in exchange for correct results!

There are lots more low-hanging opportunities for optimizations to that
shader:

- fuse double icmpsel for the b2i32(cmp) sequences
- promoting big immediates to uniforms
- fusing integer multiply+add

But for now this is acceptable and anyway I'm doing this on "fix broken
NIR lowering" time and not Asahi time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
f28c631a89 agx: Implement nir_op_umul_high
This is crucial to the efficiency of the accurate idiv path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
aab535ffda agx: Extract umul_high implementation
We can implement umul_high (for both 16-bit and 32-bit types)
efficiently by multiplying in the next larger type size and extracting
the upper word. We already have such an implementation (for instancing).
Extract it so we can use it for emit_alu too.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
a8cea8679d agx: Assert that registers are naturally aligned
This seems to be an architectural constraint. Ensure that RA satisfies
it, because otherwise we're left with mysterious fails.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
8c2e626064 agx: Align 64-bit register pairs
This seems to be necessary for correct operation.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
5631b3352e agx: Lower more ALU operations
Noticed while switching idiv lowerings. We could do better on some of these.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
f759459cd6 agx: Implement noperspective interpolation
We need to get a matching coefficient register and change the encoding
of the iter instruction slightly, but otherwise this is normal.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
638d7f542e agx: Use split instead of extract for ldcf
For more uniform handling in the RA. This gets rid of the extra moves
with flat shading.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:54 -04:00
Alyssa Rosenzweig
744b4a0f7f agx: Rename varying load instructions
Unlike Mali (where I borrowed the old names from), these are not loads
in the memory sense. They are simply register loads and arithmetic.
Rename accordingly, using PowerVR names and public Apple names as a
guide.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:53 -04:00
Alyssa Rosenzweig
14bf020d75 agx: Model perspective coefficient reg in the IR
For perspective-correct interpolation, the W coefficient register is
needed. Instead of hardcoding this to cf0 and special casing, model this
in the IR and let the general handling kick in.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:53 -04:00
Alyssa Rosenzweig
24c3084411 agx: Add AGX_MESA_DEBUG=noopt option
To disable the optimizer. Trying to root cause a Neverball bug, this
gives one less thing to worry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:53 -04:00
Alyssa Rosenzweig
f3877f56ba asahi,agx: Rewrite varying linking
Instead of using driver_location magic and hoping things work, make the
linkage between vertex and fragment shaders explicit. Thanks to the
coefficient register mechanism reverse-engineered and documented earlier
in this series, this does not require any shader keys to support
separable shaders. It just requires that we regenerate the coefficient
register binding tables at draw time, based on the varying layouts
decided by the compiler independently for the VS and FS. This is more
robust in the face of separate shaders.

This also gets us glProvokingVertex() support without shader keys.

After that, we don't need any of the remapping prepasses. For fragment
shaders, any old mapping will do, so we can assign coefficient registers
as we go (based on what the program actually uses, not nir_variable
information that might be stale by this point). We do want to cache
coefficient registers, particularly for fragcoord.w which is used for
perspective interpolation everywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:43:26 -04:00
Alyssa Rosenzweig
4b21db4111 asahi: Decode Interpolation packets
These have been known, just were missed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:38:11 -04:00
Alyssa Rosenzweig
c67169d218 asahi: Fix varying XML
Lots of changes from reverse-engineering harder the interactions with
fp16 and noperspective and such, and comparing against the PowerVR
driver code in Mesa that's been released since this XML was
originally written.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:38:11 -04:00
Alyssa Rosenzweig
ed215183e2 asahi: Encode known bits of Linkage in the XML
I'm pretty sure about these. There's too much hex anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
034d52643c asahi: Correct bind fragment pipeline size
A number of structures encode their size, but we were ignoring it just
for this fragment pipeline bind. Fix that.

This fix might also apply to bind vertex pipeline. Unsure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
651e4677ca asahi: Split vertex/fragment pipeline binds
Although these are similar data structures, they are not identical and
trying to cover both in the same struct is causing problems with
aliasing. Split them out to get a more accurate representation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
b1180fe2f6 asahi: Fix using multiple textures/samplers
The counts for textures/samplers are specified in the bind
texture/sampler packets. What's in the bind pipeline appear to be...
hints? of some kind? It's a direct function of the numbers of textures
and samplers, but much more coarse. Unknown purpose.

This should be correct for up to 48 textures and at least 8 samplers.
For more than 48 textures, Metal switches to a "bindless" mode, where
the textures are instead bound with a bind uniform packet, ts* is no
longer read in the shader, and instead registers and immediates are used
to index the texture with a substantial preshader. Details TBD. We don't
need to worry about that for a long while, though.

Fixes a number of dEQPs.

   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_both,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_fragment,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.array_in_struct.sampler2D_samplerCube_vertex,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_both,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_fragment,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.nested_structs_arrays.sampler2D_samplerCube_vertex,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_both,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_fragment,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.array_in_struct.sampler2D_samplerCube_vertex,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_both,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_fragment,Crash
   dEQP-GLES2.functional.uniform_api.value.assigned.by_value.render.nested_structs_arrays.sampler2D_samplerCube_vertex,Crash

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
d2fef02cc0 asahi: Dump all textures&samplers
This confirms the actual size of the texture descriptor -- 24 bytes.
The last 8 bytes have so far only been zeroed. It also confirms we got
the sampler descriptor size right.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
c045d3761c asahi: Extend counts in BIND packets
We can bind at least 16 textures. Fix the sizes in the XML so this can
be decoded correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
e441896eb8 agx: Fix ld_var cf packing
Make it handle larger coefficient registers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
47a3f1226c agx: Fix packing of samplers in texture instrs
Typo in the handwritten packing code, oof!

Fixes incorrectly repeated shadows in Neverball (among many other bugs,
I assume). Huge thanks to Lina for the idea that this was the
bug -- fixing it was a breeze from there :-)

Fixes: 9f55538834 ("agx: Pack texture ops")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
2022-08-07 20:15:03 -04:00
Alyssa Rosenzweig
8066ef9d30 agx: Port minifloat tests to GTest
These tests predate using GTest in the compiler. Now that we do, we'd like to
have the tests together so they run regularly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17824>
2022-08-01 18:34:11 +00:00
Jason Ekstrand
642283a2c1 panfrost,asahi: Use util_sign_extend for unpacking
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17214>
2022-07-06 11:23:18 +00:00
Alyssa Rosenzweig
76981e5615 agx: Handle loop { if { loop { .. } } }
We need to push loop nesting to handle this correctly -- at the end of
the innermost loop, the correct nesting is 1 (from the if), not 0.

Fixes assertion failure in

  dEQP-GLES2.functional.shaders.struct.local.dynamic_loop_nested_struct_array_fragment,UnexpectedPass
  dEQP-GLES2.functional.shaders.struct.local.dynamic_loop_nested_struct_array_vertex,UnexpectedPass
  dEQP-GLES2.functional.shaders.struct.uniform.dynamic_loop_nested_struct_array_fragment,UnexpectedPass
  dEQP-GLES2.functional.shaders.struct.uniform.dynamic_loop_nested_struct_array_vertex,UnexpectedPass

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17128>
2022-06-22 21:23:50 +00:00
Alyssa Rosenzweig
2338dcd392 asahi,agx: Don't set PIPE_CAP_POINT_COORD_ORIGIN_UPPER_LEFT
Tell the state tracker our point coordinates have a lower left origin
instead of an upper left origin, and remove our point coordinate
flipping code. Saves an instruction in any shader that reads
gl_PointCoord.y

Note: the OpenGL blob also emits an "fadd $y', ^y.neg, 1.0" to flip
point coordinates, so this isn't just a Metal weirdness.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16829>
2022-06-08 14:10:50 +00:00
Alyssa Rosenzweig
1b7304f44b asahi: Add wrap library
Add a library that wraps the key IOKit entrypoints used in the macOS
UABI for AGX. Our wrapped routines print information about the kernel
calls made and dump work submitted to the GPU using agxdecode. This code
has two major use cases:

1. Debugging Mesa, particularly around the undocumented macOS
   user-kernel interface. Logs from Mesa may compared to Metal to check
   that the UABI is being used correcrly.

2. Reverse-engineering the hardware, using this as glue to get at the
   "interesting" GPU memory.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:58:07 -04:00
Alyssa Rosenzweig
1d0d27aac7 asahi: Allocate a larger segment list
This ought to be dynamically allocated but because this is macOS kernel
UABI only gunk, let's just hack around it...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
689be69681 asahi: Fix pipeline decoding
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
8a1ee708a4 asahi: Improve render target dumping
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
d8227f09d0 asahi: Drop some unknowns
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
03a3a7843e asahi: Identify suballocated size
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
14d966734f asahi: Identify suballocation mechanism
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
ca9b1d48fe asahi: Decode resource allocation requests
We already know much of this structure, let's pretty print to simplify
our traces.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
0c120cf141 asahi: Decode resource allocation responses
We already know much of this structure, let's pretty print to simplify
our traces.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
1e42e4a390 asahi: Validate segment list length
This is easy now!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
343f4f886f asahi: Split unknown field in segment list header
Seen as 0x8000.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
6b12292754 asahi: Add segment list pretty printer
Validate all the new expectations and print all the fields. This should
make differences between the drivers obvious, I hope.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:11:08 -04:00
Alyssa Rosenzweig
db32b4a064 asahi: Sync some names with Project Zero
This should clarify a few things I didn't get independently
investigating the interface. Of coruse, I got other pieces... the sum of
the parts is better :-)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:10:57 -04:00
Alyssa Rosenzweig
6e59474ced asahi: Identify partial render pipeline
Needed if a partial render is incurred from overflowing the parameter
buffer (too much geometry).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:09:04 -04:00
Alyssa Rosenzweig
666f307d41 asahi: Add a depth bias structure
This is simple and corresponds directly to the Metal inputs. However,
the alignment is a bit tricky, so let's add formal XML for it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
2022-05-22 17:09:04 -04:00