Commit graph

45785 commits

Author SHA1 Message Date
Mike Blumenkrantz
c6741f52bd zink: remove renderpass refcounting
this is useless because we never destroy renderpasses during the lifetime
of a process and don't want to do so

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8227>
2021-01-14 22:11:42 +00:00
Mike Blumenkrantz
b2e5dadd22 zink: add batch flag for checking renderpass state
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8227>
2021-01-14 22:11:42 +00:00
Mike Blumenkrantz
448c85acfc zink: rework framebuffer state
we don't want to actually be tracking any null surfaces, so instead use
the vk object for this purpose

also store the fb state onto the fb object so we have this info available
at all times

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8227>
2021-01-14 22:11:42 +00:00
Mike Blumenkrantz
64f939020d zink: only emit streamout targets during draw if we have them
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8503>
2021-01-14 20:37:24 +00:00
Jordan Justen
fc1bd69bbd iris: Fix android build due to missing link to libmesa_iris_gen125
Reported-by: Yugang Fan
Fixes: cd3251d6ba ("intel/iris: Build gen 12.5")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8426>
2021-01-14 11:51:29 -08:00
Yevhenii Kolesnikov
0c08a66ce5 iris: only set point sprite overrides if actually using points
Fixes black screen in some FNA games.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3431
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7218>
2021-01-14 18:36:15 +00:00
Mike Blumenkrantz
322a3d4fb0 zink: partially enable SSBO pipe cap
this enables atomic counters

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
2bfa998960 zink: add more usage bits for buffer types
these things can be anything they want to be when they grow up

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
e79d905f5a zink: flag ssbo buffer resources as having pending writes on batch
ssbos are the only descriptor type we support (so far) that allows writes
during the draw, so we have to ensure that we set the right flag on the batch
reference to handle sync if the buffer is later read from

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
d0d1888af0 zink: split UBOs and samplers into 'read' batch references during draw
we have the technology, so now we can just flag these resources as being
read from instead of also being written to, freeing them up for concurrent reads
without requiring fencing

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
fa321e0cc4 zink: start supporting atomic shader ops
this handles atomic_add, which is what atomic counters use

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
400c7743f6 zink: modify ubo loading in ntv to work for ssbos
if ssbo variables are declared using the same structure as ubos, then
the mechanics here are identical, and we can just add a couple extra lines
to handle the atomic ops and different array usage

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
3dd5500f7b zink: emit ssbo variables in ntv
we're structuring these the same as ubos so we can reuse the same load
function later

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
6e22f52ba1 zink: hook up ssbo shader bindings
this is just the struct zink_shader binding point stuff, but nothing is
using it yet

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
f5ab1a1f00 zink: add set_shader_buffers pipe_context method
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
2fa1cf99b9 zink: add util function for emitting ntv atomic ops
these all need specific memory params, but otherwise they're the same
as normal ops, so we can just make a helper function here to add in the memory
params

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
621fb6a72a zink: add spirv builder function for runtime array type
we'll need this for ssbos

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8330>
2021-01-14 18:13:28 +00:00
Mike Blumenkrantz
a5bd2b95ef zink: optimize renderpass hash table
only the existing render targets need to be used for table entries

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8487>
2021-01-14 17:20:03 +00:00
Pierre-Eric Pelloux-Prayer
17f8e56c96 radeonsi: invalidate compute sgprs in si_rebind_buffer
If we don't tag compute sgpr as dirty they will point to the
ol buffer location.
This fixes arb_compute_shader-dlist with mcbp enabled.

Fixes: 85a6bcca61 ("radeonsi: pass at most 3 images and/or shader buffers via user SGPRs for compute")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8433>
2021-01-14 10:33:10 +01:00
Witold Baryluk
9c54928f77 lavapipe: Defer lavapipe warning to CreateDevice
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4055
Fixes: b38879f8c5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8377>
2021-01-14 01:41:22 +00:00
Vinson Lee
aa3dfcd803 panfrost: Fix typos.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8400>
2021-01-14 01:17:55 +00:00
Eric Anholt
179e549995 gallium/tgsi: garbage collect unused TGSI_UTIL_SIGN_MODE.
Noticed while git grepping for abs/neg stuff.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
2021-01-13 22:52:10 +00:00
Eric Anholt
1fc79592b7 gallium/tgsi: Remove support for f64 src modifiers.
The tgsi.rst was not very clear but didn't indicate that they were
supported, and llvmpipe only supported double abs and not negate.
glsl_to_tgsi never generated them, and neither did the new nir_to_tgsi, so
just garbage collect it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
2021-01-13 22:52:10 +00:00
Eric Anholt
9a2cbe02ed gallium/tgsi: Assert that we don't see integer abs modifiers.
tgsi.rst says it's not supported, and llvmpipe, r600, and virgl don't
support it.  Make sure nobody else introduces them like I did while
testing only on softpipe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
2021-01-13 22:52:10 +00:00
Eric Anholt
1ff2c01741 gallium/ntt: Stop lowering integer source mods.
While tgsi_exec.c (softpipe) implemented 32b integer src mods, the
tgsi.rst documentation says only 32b negate is supported and not abs.
llvmpipe implemented 32 and 64 negate but not abs, virgl implemented
negate incorrectly, and r600 apparently doesn't do any integer src mods.
glsl_to_tgsi has apparently never generated integer src mods.

Given that r600 can't do any integer src mods, just stop trying to
generate them for TGSI.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
2021-01-13 22:52:10 +00:00
Eric Anholt
ecaa7c3e39 gallium/ttn: Add support for TGSI_OPCODE_I64NEG/ABS.
Found when converting AMD's built-in TGSI shaders to not using 64-bit src
mods.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
2021-01-13 22:52:10 +00:00
Ilia Mirkin
8c7526afd2 nv50,nvc0: explicitly list recently-added caps
Some of these should be implemented, but that can be done in a later
change.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8461>
2021-01-13 17:19:32 -05:00
Ilia Mirkin
be7e12d81b nv50/ir: ignore FS_BLEND_EQUATION_ADVANCED
It's unsupported, but gets set unconditionally by the state tracker,
even when fbfetch is to be used.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8461>
2021-01-13 17:19:19 -05:00
Mike Blumenkrantz
9d651d2a0f zink: clamp sampler+samplerview limits
* struct shader_info provides a 32bit mask for textures_used
* samplers and samplerviews are a 1:1 mapping for shader descriptors
* also according to spec this is always 32 per stage

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8457>
2021-01-13 21:53:56 +00:00
Jason Ekstrand
f4902bb189 intel/genxml,anv,iris: Drop the legacy compute path from gen125.xml
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Jordan Justen
32857a6350 iris: Add support for COMPUTE_WALKER
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
2021-01-13 13:10:28 -08:00
Ilia Mirkin
f9237619d3 nouveau: trigger the current fence's work on destroy explicitly
Otherwise the delete yells at us that there's still work pending. This
isn't an actual problem, but annoying to see each time.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8462>
2021-01-13 16:59:18 +00:00
Thong Thai
4b208cc503 frontends/va: Return an error if non-interlaced buffer is not supported
Add a check to vaDeriveImage to see if a non-interlaced buffer was
created successfully. Otherwise, return an error, since we won't be able
to derive an image from the interlaced buffer.

Prevents a null pointer dereference from occuring on some nVidia cards,
reported by Alexander Kapshuk.

v2: Check for PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE support (Ilia)

Fixes: fcb558321e ("frontends/va: Derive image from interlaced buffers")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Tested-by: Alexander Kapshuk <alexander.kapshuk@gmail.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8320>
2021-01-13 16:37:43 +00:00
Alyssa Rosenzweig
275277a2b4 panfrost: Implement alpha testing natively
On Midgard, we still have to lower on v6+. Passes Piglit
./fbo-mrt-alphatest (saving a cycle in the fragment shader to
compare/discard).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8447>
2021-01-13 15:17:32 +00:00
Alyssa Rosenzweig
7a6a5f3fe1 panfrost: Handle explicit primitive restart
Don't fall back. Passes piglit ./bin/primitive-restart on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8447>
2021-01-13 15:17:32 +00:00
Juan A. Suarez Romero
f58a11460d v3d: add fast-path tile-based blit for depth/stencil buffers
This extends the TLB based blit to support both depth and stencil
buffers.

v2:
 - Ammend comment for further clarification (Iago)
 - Remove parenthesis (Iago)
 - Remove condition so separate stencil blit is done (Iago)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
2021-01-13 12:49:37 +00:00
Juan A. Suarez Romero
79bf06605d v3d: check blit mask inside blit subpaths
Move the blit mask check (RGBA, Depth/Stencil) inside the blit paths
(stencil, TFU, TLB and render blit paths).

v2:
 - Add missing Fixes tag (Iago)

Fixes: 1c76f6e755 ("v3d: implement tile-based blit operation")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
2021-01-13 12:49:37 +00:00
Gert Wollny
354ab5b147 r600/nir: use "unreachable" instead of "assert"
In release builds the assert goes away resulting in build failures
because no return value was specified.

Fixes 165fb5117b
   r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2

Closes #4089

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8465>
2021-01-13 08:00:55 +00:00
Vinson Lee
a908abd6c4 nv50/ir: Initialize CodeEmitterGM107 members in constructor.
Fix defects reported by Coverity Scan.

uninit_member: Non-static class member progType is not initialized
in this constructor nor in any functions that it calls.
uninit_member: Non-static class member insn is not initialized in
this constructor nor in any functions that it calls.
uninit_member: Non-static class member data is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7390>
2021-01-12 22:34:32 -08:00
Bas Nieuwenhuizen
9a937330ef radeonsi: Only set modifier creation function for GFX9+ & with kernel support.
Fixes: c786150dfa ("radeonsi: Add modifier support.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3963
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8407>
2021-01-12 23:47:09 +00:00
Boris Brezillon
3dcc9eb48a panfrost: Re-enable AFBC on 3D, 2D arrays
Things have now been fixed and AFBC on 3D/2D-arrays seems to work fine.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12 22:40:44 +00:00
Boris Brezillon
38823ba60d panfrost: Fix estimate_texture_payload_size() on Bifrost
Bifrost mandates manual stride usage.

Fixes: a3d2936a8e ("panfrost: The texture descriptor has a pointer to a trampoline")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12 22:40:44 +00:00
Boris Brezillon
6aed981e9d panfrost: Get layer stride of level 0 on staging resources
Staging resources have one level, we shouldn't query the stride of
level > 0.

Fixes: 3c92abe359 ("panfrost: Use panfrost_get_layer_stride() instead of open-coding it")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
2021-01-12 22:40:44 +00:00
Icecream95
041261c6b3 panfrost: Dual-source blending on Bifrost
Tested with the arb_blend_func_extended Piglit tests and Alacritty.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8455>
2021-01-12 21:05:01 +00:00
Eric Anholt
46fe700585 gallium/ntt: Take ownership of the NIR shader we're passed.
It makes no sense for the caller to keep it, since we've throughly changed
it to be suitable to NTT.  All callers just freed it afterward anyway.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
2021-01-12 19:46:22 +00:00
Eric Anholt
0367bdbdc4 gallium/ntt: Fix leak of the per-instr liveness information.
Fixes: 34cc6a804e ("gallium: Add a nir-to-TGSI pass.")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
2021-01-12 19:46:21 +00:00
Gert Wollny
afa187fc36 r600: enable fp64 lowering to softemu with NIR
The NIR code path does not (yet) take hardware into account
that actually supports fp64 in hardware.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
2021-01-12 19:29:40 +00:00
Gert Wollny
33362e0df5 r600: enable support for 64 bit DIVMOD when NIR is used
The glsl lowering seems to be broken, but the nir lowering pass handles
this correctly.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
2021-01-12 19:29:40 +00:00
Gert Wollny
0bed972619 r600/sfn: tie in 64 lowering code
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
2021-01-12 19:29:40 +00:00
Gert Wollny
165fb5117b r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2
The lower_double and lower_int64 don't lower all 64 bit IO ops and merging
to and splitting fromn 64 bit values. So here goes a bunch of lowering
passes that takes care of this and also of merging IO that might have been
split.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
2021-01-12 19:29:40 +00:00