fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 04:38:03 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

r600: enable fp64 lowering to softemu with NIR

Browse source 
The NIR code path does not (yet) take hardware into account
that actually supports fp64 in hardware.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
This commit is contained in:
Gert Wollny 2020-10-16 18:18:18 +02:00 • committed by Marge Bot
parent 33362e0df5
commit afa187fc36
2 changed files with 10 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
src/gallium/drivers/r600/r600_pipe.c
View file

@ -407,12 +407,15 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
return 0;
case PIPE_CAP_INT64:
case PIPE_CAP_DOUBLES:
if (rscreen->b.family == CHIP_ARUBA ||
rscreen->b.family == CHIP_CAYMAN ||
rscreen->b.family == CHIP_CYPRESS ||
rscreen->b.family == CHIP_HEMLOCK)
return 1;
if (is_nir_enabled(&rscreen->b))
return 1;
return 0;
case PIPE_CAP_INT64_DIVMOD:
/* it is actually not supported, but the nir lowering hdanles this corectly wheras

9
src/gallium/drivers/r600/r600_shader.c
View file

@ -196,8 +196,13 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
} else {
if (sel->ir_type == PIPE_SHADER_IR_TGSI) {
sel->nir = tgsi_to_nir(sel->tokens, ctx->screen, true);
/* Lower int64 ops because we have some r600 build-in shaders that use it */
if (!ctx->screen->get_param(ctx->screen, PIPE_CAP_DOUBLES)) {
const nir_shader_compiler_options *nir_options =
(const nir_shader_compiler_options *)
ctx->screen->get_compiler_options(ctx->screen,
PIPE_SHADER_IR_NIR,
shader->shader.processor_type);
/* Lower int64 ops because we have some r600 build-in shaders that use it */
if (nir_options->lower_int64_options) {
NIR_PASS_V(sel->nir, nir_lower_regs_to_ssa);
NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar, NULL, NULL);
NIR_PASS_V(sel->nir, nir_lower_int64);