Commit graph

83035 commits

Author SHA1 Message Date
Charmaine Lee
c3c7ff014b svga: rebind using render target surfaces in hw draw state
Currently when we rebind framebuffer resources at the beginning of
the command buffer, we use the color buffer surfaces saved in the context
hw clear state. But the surfaces could be different from the actual
emitted render target surfaces if any of the color buffer surfaces
is also used for shader resource, in that case, we create
a backed surface for the collided render target surface. So to rebind
the framebuffer resources correctly, use the render target surfaces saved
in the context hw draw state.

Tested with Heaven, Lightsmark2008, MTT piglit, glretrace, conform.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-07-08 12:53:20 -06:00
Charmaine Lee
da98cee067 svga: invalidate gb surface before it is reused
With this patch, a guest-backed surface will be invalidated
using the SVGA_3D_CMD_INVALIDATE_GB_SURFACE command before
the surface is reused. This fixes the updating dirty image error
from the device when a surface is reused.

v2: Instead of invalidating the surface when it is reused,
    send the invalidate command before the surface is put into
    the recycle pool.

v3: (1) surface invalidate is a noop operation in Linux winsys, since
        surface invalidation is not needed for DMA path.
    (2) Instead of invalidating the surface content in
        svga_screen_surface_destroy() when a surface is to be destroyed,
        it is done in svga_screen_cache_flush() when the surface is
        no longer referenced in a command buffer and is ready to
        be moved to the unused list. At this point, the surface will
        be moved to the invalidate list. When the surface invalidation
        is submitted, the surface will be moved to the unused list.

Tested with piglit, glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2016-07-08 12:53:20 -06:00
Brian Paul
ca531aeeb1 svga: fix use of provoking vertex control
If the SVGA3D_DEVCAP_DX_PROVOKING_VERTEX query returns false, never
define rasterizer state objects with provokingVertexLast set.  Despite
what the device reports, it may interpret the provokingVertexLast flag
anyway.  This fixes an issue when using capability clamping.

Tested with piglit provoking-vertex and glsl-fs-flat-color tests.

VMware bug 1550143.

Reviewed-by: <charmainel@vmware.com>
2016-07-08 12:53:20 -06:00
Nayan Deshmukh
af18a04755 vl: add half pixel to v_tex before adding offsets
Since pixel center lies at 0.5, add half_pixel to vtex
before adding offsets to it.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-07-08 20:51:12 +02:00
Samuel Pitoiset
a0bf1768c7 nvc0/ir: remove unused resource info loading helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-08 19:12:23 +02:00
Samuel Pitoiset
ed3a284382 nvc0/ir: refactor the surfaces info loading logic
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-08 19:12:21 +02:00
Samuel Pitoiset
9cdbe80745 nvc0/ir: move the shift left op inside loadTexHandle()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-08 19:12:06 +02:00
Nicolai Hähnle
04d93ea619 radeonsi: disable multi-threading when shader dumps are enabled
Otherwise, shader dumps can become interleaved and unusable.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:59:36 +02:00
Nicolai Hähnle
7ffc832ab8 radeonsi: use multi-threaded compilation in debug contexts
We only have to stay single-threaded when debug output must be synchronous.
This yields better parallelism in shader-db runs for me.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:59:32 +02:00
Nicolai Hähnle
084ca0d8e5 st/mesa: set debug callback async flag
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:59:29 +02:00
Nicolai Hähnle
2909e292fc gallium: add async flag to pipe_debug_callback
v2: fix typo db -> cb

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:58:52 +02:00
Nicolai Hähnle
5bcfbf91e5 radeonsi: catch a potential state tracker error with non-MSAA FBs
At least st/mesa ensures this, so I'd rather not handle deviations in radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:53:05 +02:00
Nicolai Hähnle
d938b8c0bf radeonsi: explicitly choose center locations for 1xAA on Polaris
Unlike SC, the small primitive filter does not automatically use center
locations in 1xAA mode, so this is needed to avoid artifacts caused by
the small primitive filter discarding triangles that it shouldn't.

As a side effect of how the effective number of samples is now calculated,
this patch also avoids submitting the sample locations for line/poly smoothing
when they're not really needed.

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:52:50 +02:00
Nicolai Hähnle
7d2ce5258f r600g: call cayman_emit_msaa_sample_locs only when needed
In the case of nr_samples <= 1, that function is (currently) a no-op anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-08 10:52:45 +02:00
Kenneth Graunke
b3c5df3ca4 mesa: Mark R*32F formats as filterable when an extension is present.
GL_OES_texture_float_linear marks R32F, RG32F, RGB32F, and RGBA32F
as texture filterable.

Fixes glGenerateMipmap GL errors when visiting a WebGL demo in Chromium:
http://www.iamnop.com/particles

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-08 01:26:23 -07:00
Eric Engestrom
b7be23b6e1 i965/blorp: fix indentation level
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-07-08 11:07:36 +03:00
Francisco Jerez
37b901003b i965: Fix remaining flush vs invalidate race conditions in brw_emit_pipe_control_flush.
This hardware race condition has caused problems several times already
(see "i965: Fix cache pollution race during L3 partitioning set-up.",
"i965: Fix brw_render_cache_set_check_flush's PIPE_CONTROLs." and
"i965: intel_texture_barrier reimplemented").  The problem is that
whenever we attempt to both flush and invalidate multiple caches with
a single pipe control command the flush and invalidation happen in
reverse order, so the contents flushed from the R/W caches aren't
guaranteed to become visible from the invalidated caches after the
PIPE_CONTROL command completes execution if some concurrent rendering
workload happened to pollute any of the invalidated R/O caches in the
short window of time between the invalidation and flush.

This makes sure that brw_emit_pipe_control_flush() has the effect
expected by most callers of making the contents flushed from any R/W
caches visible from the invalidated R/O caches.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-07 14:16:39 -07:00
Francisco Jerez
0bd3a121c6 i965: Make room in the batch epilogue for three more pipe controls.
Review carefully, it sucks to have to keep track of the number of
command packet dwords emitted in the batch epilogue manually.  The
MI_REPORT_PERF_COUNT_BATCH_DWORDS calculation was obviously wrong.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-07 14:16:39 -07:00
Francisco Jerez
a10879f48c i965: Emit SKL VF cache invalidation W/A from brw_emit_pipe_control_flush.
There were two places in the driver doing a pipe control VF cache
flush, one of them was missing this workaround, move it down into
brw_emit_pipe_control_flush to make sure we don't miss it again.

Cc: "12.0 11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2016-07-07 14:16:39 -07:00
Francisco Jerez
04f74d6629 i965: Emit SNB write cache flush W/A from brw_emit_pipe_control_flush.
Shouldn't cause any functional changes at this point, but we have
forgotten to apply this workaround several times in the past, make
sure it doesn't happen again.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2016-07-07 14:16:38 -07:00
Frank Binns
8fd5779da4 egl: restrict swap_available dri2_egl_display field to X11
This field is only ever set and read by the X11 platform.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-07 13:28:50 -07:00
Guillaume Charifi
9fea9d6f8e egl: Fix the bad surface attributes combination checking for pbuffers. (v3)
Fixes a regression induced by commit a0674ce5c4:
When EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET were both specified (and
both != EGL_NO_TEXTURE), an error was instantly triggered, before the
other one had even a chance to be checked, which is obviously not the
intended behaviour.

v2: Full commit hash, remove useless variables.
v3: [chadv] Add Fixes footers.

Fixes: piglit "spec/egl 1.4/eglcreatepbuffersurface and then glclear"
Fixes: piglit "spec/egl 1.4/largest possible eglcreatepbuffersurface and then glclear"
Signed-off-by: Guillaume Charifi <guillaume.charifi@sfr.fr>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-07 11:28:55 -07:00
Eric Engestrom
7adb9b0948 egl/display: remove unnecessary code and make it easier to read
Remove the two first level `if` as they will always be true, and
flatten the two remaining `if`.
No functional change.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-07 11:13:13 -07:00
Gurchetan Singh
2e6d35809b mesa: Make single-buffered GLES representation internally consistent
There are a few places in the code where clearing and reading are done on
incorrect buffers for GLES contexts.  See comments for details.  This
fixes 75 GLES3 dEQP tests on the surfaceless platform with no regressions.

v2: Corrected unclear comment
v3: Make the change in context.c instead of get.c
v4: Removed whitespace

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-07 11:02:35 -07:00
Emil Velikov
f35f8464ec bugzilla_mesa.sh: Drop "Bug " from sed command
After a recent Bugzilla update the word is no longer in the title. Thus
the script ended up producing bogus HTML.

Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-07-07 15:58:46 +01:00
Akihiko Odaki
42968424fb mesa: don't install GLX files if GLX is not built
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Akihiko Odaki <akihiko.odaki.4i@stu.hosei.ac.jp>
[Emil Velikov: Drop guards around dri_interface.h, add stable tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-07-07 15:58:11 +01:00
Timothy Arceri
7a9d6abcae nir: add glsl_dvec_type() helper
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-06 23:20:23 -07:00
Mathias Fröhlich
13affe0d3f osmesa: Export OSMesaCreateContextAttribs.
Since the function is exported like any other
public api function and put in the header
as if you could link against it, export it also
from shared objects.

Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
2016-07-07 06:19:13 +02:00
Timothy Arceri
7ed5bca21d i965: consolidate generation check
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2016-07-07 12:29:21 +10:00
Timothy Arceri
e0dc3109d5 i965: don't copy VS attribute work arounds for HSW+
These workarounds are not required for HSW and above so stop
copying them at VS key generation which is called at draw time.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 12:29:12 +10:00
Timothy Arceri
27e28197e8 i965: add double packing support to tess stages
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
8b80e9c31d i965: add double support packing support to gs inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
20e935e6f6 nir: add glsl_double_type() helper
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
9d9b0b54cd i965: add indirect packing support to gs load inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
2477e6cfad i965: add indirect packing support for tcs and tes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
2bda4b062f i965: add component packing support for tcs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
cfff71a47a i965: add component packing support for tes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
a102ef2d4f i965: add component packing support for gs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
448adfbc67 nir: use the same driver location for packed varyings
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Timothy Arceri
0eea6b3297 nir: add new intrinsic field for storing component offset
This offset is used for packing.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-07-07 10:26:43 +10:00
Eric Engestrom
771f6db76f i965/docs: update Intel Linux Graphics URLs
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-07-06 13:18:23 -07:00
Chad Versace
8910de39c7 anv: gitignore anv_timestamp.h 2016-07-06 13:13:18 -07:00
Tom Stellard
513fccdfb6 radeon/llvm: Use alloca instructions for larger arrays
We were storing arrays in vectors, which was leading to some really bad
spill code for large arrays.  allocas instructions are a better fit for
arrays and LLVM optimizations are more geared toward dealing with
allocas instead of vectors.

For arrays that have 16 or less 32-bit elements, we will continue to use
vectors, because this will force LLVM to store them in registers and
use indirect registers, which is usually faster for small arrays.

In the future we should use allocas for all arrays and teach LLVM
how to store allocas in registers.

This fixes the piglit test:

spec/glsl-1.50/execution/geometry/max-input-component

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-06 19:47:38 +00:00
Tom Stellard
02873a7b0c radeon/llvm: Add helpers for loading and storing data from arrays.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-06 19:47:38 +00:00
Tom Stellard
2dc48984b2 radeon/llvm: Remove uses_temp_indirect_addressing() function
bld->indirect_files is never set, so this function always returns false.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-06 19:47:38 +00:00
Emil Velikov
9618e2a24c anv: vulkan: remove the anv_device.$(OBJEXT) rule
Atm the actual rule will expand to foo.o which is used for static
libraries only.

Thus the automake manual recommendation [to use OBJEXT] won't help us,
since since we're working with a shared library.

Thus let's 'demote' the file and add it back to BUILT_SOURCES. This will
manage all the complexity for us, at the (existing expense) of working
only with the all, check and install targets.

The crazy (why the issue was hard to spot):
If the dependencies (.deps/*.Plo) are already created one can alter the
anv_device.$(OBJEXT) line and/or nuke it all together. That won't lead
to any warnings/issues, even though the Makefile is regenerated.

Moral of the story:
Always rm -rf top_builddir or don't resolve the dependencies manually
and use BUILT_SOURCES.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96825
Fixes: d7a604c3f7a ("anv: use cache uuid based on the build timestamp.")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Mark Janes <mark.a.janes@intel.com>
2016-07-06 10:19:19 -07:00
Rob Clark
64d35f817a vbo: fix attr reset
In bc4e0c4 (vbo: Use a bitmask to track the active arrays in vbo_exec*.)
we stopped looping over all the attributes and resetting all slots.
Which exposed an issue in vbo_exec_bind_arrays() for handling GENERIC0
vs. POS.

Split out a helper which can reset a particular slot, so that
vbo_exec_bind_arrays() can re-use it to reset POS.

This fixes an issue with 0ad (and possibly others).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2016-07-06 10:17:30 -04:00
Rob Clark
23dd9eaa94 list: fix list_replace() for empty lists
Before, it would happily copy list_head next/prev (ie. pointer to the
*from* list_head), leaving things in a confused state and causing much
mayhem.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-07-06 10:17:30 -04:00
Rob Clark
09fe35b450 gallium: un-inline pipe_surface_desc
Want to re-use this struct, so un-inline it.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-06 10:17:30 -04:00
Rob Clark
def044376a gallium/util: make util_copy_framebuffer_state(src=NULL) work
Be more consistent with the other u_inlines util_copy_xyz_state()
helpers and support NULL src.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-06 10:17:30 -04:00