Commit graph

245 commits

Author SHA1 Message Date
Alyssa Rosenzweig
b219e9a96e asahi: Port driver to macOS 12.x ABI
There's lots of reshuffling required. Nothing "interesting", though.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:30 +00:00
Alyssa Rosenzweig
f5ae88d36f asahi: Identify IOGPU_MISC data structure
This will be elaborated upon soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:29 +00:00
Alyssa Rosenzweig
d5ee1eacf1 asahi: Add stencil buffer attachment type
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:29 +00:00
Alyssa Rosenzweig
50f9b4ceba asahi: Identify IOGPU Internal Pipelines structure
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:29 +00:00
Alyssa Rosenzweig
eb9da583d7 asahi: Identify aux framebuffer data structure
Total guess at the name.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:29 +00:00
Alyssa Rosenzweig
535f1c1166 asahi: Identify IOGPU Clear Z/S structure
Not sure on the details yet but identify and dump the data structure to start.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
2022-03-22 00:19:29 +00:00
Timur Kristóf
64acec0ef9 nir: Fix lowering terminology of compute system values: "from"->"to".
This is to match other NIR terminology.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15103>
2022-03-08 17:36:31 +00:00
Alyssa Rosenzweig
01d1bf6228 asahi: Wire in pure integer texture formats
Passes dEQP-GLES3.functional.texture.format.sized.2d.r*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:33 +00:00
Alyssa Rosenzweig
cc3e98e201 asahi: Identify minimum/maximum LOD fields
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:33 +00:00
Alyssa Rosenzweig
6554790dfb asahi: Add LOD clamp packing unit tests
With GTest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
e3a5c1b478 asahi: Add LOD type
Automatically packs and unpacks float <==> clamped 4:6 fixed point, used
for min/max LOD fields on the Sampler descriptor.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
db93090ffc asahi: Allow GenXML to be used in C++
C++ requires explicit casts from integers to enums. Fixes errors like
the following when trying to use Asahi GenXML from a GTest unit test.

src/asahi/lib/agx_pack.h:554:23: error: assigning to 'enum agx_channels' from incompatible type 'uint64_t' (aka 'unsigned long long')
   values->channels = __gen_unpack_uint(cl, 0, 6);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
055c5a59f8 agx: Round and clamp array indices
Conforming with the GLSL spec. Fixes:

dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darray_fixed_fragment

(and probably others)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
a822b7b6cc agx: Naturally align uniform pushes
Required to pack correctly, e.g if we push a 16-bit value then a 64-bit
value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
0c2bbb470a agx: Add agx_size_align_16 helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
9aeb5156bc agx: Add typed move helper
Useful for u2u16 in lowering code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
830d16e9f0 asahi: Add AGX_PUSH_ARRAY_SIZE_MINUS_1
Required to clamp array indices against the array sizes per the GLSL
spec. Metal also does this, implying it's required by the hardware for
correct operation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
a8bf729f8a asahi: Support 2D array and 3D textures
As far as I can tell, these *must* be tiled. Other than that, the
implementation is completely routine. Passes

dEQP-GLES3.functional.texture.format.unsized.*2d_array*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
856f64de24 asahi: Allow tiling of all bpps
Use the usual macro trick via Panfrost. Fixes textures with formats with
non-32-bit bpp, including:

dEQP-GLES2.functional.texture.specification.basic_teximage2d.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
2028873ef6 asahi: Dynamically configure tile size
We need to shrink the tile size when using small images (including
due to mipmapping) or when using large block sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
d103d64df6 asahi: Add some notes to XML about mipmapping
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
06b2d97666 asahi: Add 2D Array and 3D texture dimensions
Add to XML and translate in the driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
1a3e21a4de asahi: Identify Level field of render target descriptor
Hardware support for rendering into nonzero mip levels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
65368d2f9a asahi: Don't redefine MIN2/MAX2
The tiling function was written before the Mesa driver...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
786871c87e agx: Don't kill helper threads in ld_var
Apparently this is yet another .kill bit. Fixes:

dEQP-GLES3.functional.shaders.derivate.dfdx.linear.*
dEQP-GLES3.functional.shaders.derivate.dfdy.linear.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
367d93bcd4 agx: Handle texture array indices
These need to be converted to integers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
b459473bb9 agx: Implement nir_op_txb
Like explicit LODs, biases must be 16-bit, so add a lowering rule for
this. With the LOD mode selection updated for txb, we can then ingest
biases like explicit LODs and allowlist txb. Passes:

dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
dEQP-GLES2.functional.texture.mipmap.2d.bias.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
e2903f66ec agx: Translate LOD modes more generically
Now includes support for auto_load_bias mode.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
d5b7d629d7 agx: Add AUTO_LOD_BIAS mode
Automatic load with a bias.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
daab41b80b asahi: Identify IOGPU_ATTACHMENT::size
Oops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14898>
2022-02-06 09:48:34 -05:00
Alyssa Rosenzweig
f8feaee0dd agx: Call nir_lower_discard_if
We still need to implement discard itself, but this means we don't need
to worry about discard_if. This compiles down to the same idiom as
the vendor compiler (Metal) generates

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14217>
2022-02-04 19:09:23 +00:00
Alyssa Rosenzweig
b4108e1d01 agx: Lower UBO loads to use per-element indexing
This lets us support indirect access to UBOs easily. The existing
constant special case disappears too, since the peephole optimizer can
inline the constant later. (note: this is too conservative since we can
go up to 16-bit immediates...)

Unfortunately, nir_opt_algebraic can't seem to optimize expressions like
"((a << 3) + 4) >> 2" to "(a << 1) + 1" which would be necessary for
reasonable perf out of this...

Fixes:

dEQP-GLES2.functional.shaders.indexing.uniform_array.float_dynamic_loop_read_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14581>
2022-01-24 14:25:18 +00:00
Alyssa Rosenzweig
9645fa9107 agx: Handle discard intrinsics
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...

Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
f248f6623c agx: Add sample_mask instruction
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
dcc12656e3 asahi: Route sample mask from shader
Compiler-controlled bit in the cmdstream.

Some other magic bits are needed for sample mask writes to work
properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
9b57600502 asahi: Rectify confusing XML comment
The field was split up...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
3341abc5d7 asahi: Break out Fragment Parameters word
What the other 31 bits are for is anyone's guess.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig
fc5a72be2f asahi: Add XML for unknown 0x4a packet
Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Dave Airlie
f7bb68e499 glsl/nir: don't pass gl_context to the convertor routine.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14433>
2022-01-07 06:19:49 +00:00
Dave Airlie
d051854cca treewide: drop mtypes/macros includes from main
These aren't required in lots of places, so remove them.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127>
2021-12-08 22:14:45 +00:00
Alyssa Rosenzweig
81d22da6de asahi: Fix BIND_PIPELINE sizing and alignment
Fix a bug in BIND_PIPELINE XML reported by Dougall, which cleans up
a bit of both decoder and driver.

Instead of...

   * 17 bytes BIND_PIPELINE  (17)
   * An unused 8 byte record (25)
   * A set of N 8 byte records (25 + 8 * N)
   * Oops, 1 byte too many! One just disappeared (24 + 8 * N)

It seems to instead be

   * 24 bytes BIND_PIPELINE (24)
   * A set of N 8 byte records (24 + 8 * N)

without the sentinel record. These means the 8 byte records themselves
are shuffled, with the high byte of the pointers split from the low
word, but that's less gross than an off-by-one.

It's still not clear what the last 8 bytes of the BIND_VERTEX_PIPELINE
structure mean, or the last 4 byte of the BIND_FRAGMENT_PIPELINE
structure which seems to be a bit shorter.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig
3b108393a2 asahi: Remove obnoxious workaround
Now that we're not hardcoded any magic BO IDs, there is no minimum
number of allocations needed. Remove the unneeded -- and obnoxious --
workaround of allocating unused BOs on startup.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig
d55a1a77bd asahi: Fix agx_map_* structures
Dougall Johnson observed these structures make more sense with indices[]
first in the entries and indices[] absent from the header. Then the
sentinel entry disappears, nr_entries makes more sense, and a few magic
numbers pop out. Many thanks to Dougall's astute eyes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig
30433ae716 asahi: Deflake addresses
Reported by Dougall.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Alyssa Rosenzweig
df1824046a asahi: Rename PANDECODE->AGXDECODE
Fix remnant of the Panfrost decoder fork.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13784>
2021-11-18 23:35:25 +00:00
Timothy Arceri
a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Alyssa Rosenzweig
a3e0b3b912 asahi: Add integers to agx_vertex_formats
Handles all the easy cases.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 18:00:07 -04:00
Alyssa Rosenzweig
3cd6f62388 agx: Shift vertex buffer stride in the compiler
Required to support non-32-bit vertex formats efficiently.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:57:19 -04:00
Alyssa Rosenzweig
c7ba0fb04d agx: Add agx_format_shift routine
Required to calculate alignments for vertex buffers correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:45:38 -04:00
Alyssa Rosenzweig
96c98e0d25 agx: Define p_extract for type converts
Useful for grabbing the high 32-bit word of a 64-bit value.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:25:40 -04:00