Commit graph

45 commits

Author SHA1 Message Date
Marek Olšák
f914779c75 gallium/radeon: set texture metadata only once
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-03-09 15:02:26 +01:00
Marek Olšák
3146014d5f gallium/radeon: don't use temporary buffers for persistent mappings
Cc: 11.1 11.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-03-08 20:08:52 +01:00
Marek Olšák
1e864d7379 gallium/radeon: rename & reorder members of radeon_info
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-05 17:28:00 +01:00
Michel Dänzer
ad20be1f30 gallium/radeon: Rename do_invalidate_resource to invalidate_buffer
And only call it from r600_invalidate_resource for buffer resources.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-18 17:39:37 +09:00
Nicolai Hähnle
e976860638 gallium/radeon: do not reallocate user memory buffers
The whole point of AMD_pinned_memory is that applications don't have to map
buffers via OpenGL - but they're still allowed to, so make sure we don't break
the link between buffer object and user memory unless explicitly instructed
to.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-14 09:41:24 -05:00
Nicolai Hähnle
321140d563 gallium/radeon: implement PIPE_CAP_INVALIDATE_BUFFER
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-14 09:41:04 -05:00
Nicolai Hähnle
08c71740ad gallium/radeon: reset valid_buffer_range on PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
This accomodates a streaming pattern where the discard flag is set when the
application wraps back to the beginning of the buffer.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-01-14 09:40:00 -05:00
Marek Olšák
020009f7cc u_upload_mgr: pass alignment to u_upload_alloc manually
The fixed alignment of u_upload_mgr will go away.
This is the first step.

The motivation is that one u_upload_mgr can have multiple users,
each allocating from the same buffer, but requiring a different alignment.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-01-02 15:15:44 +01:00
Marek Olšák
cf811faeff gallium/radeon: remove radeon_winsys_cs_handle
"radeon_winsys_cs_handle *cs_buf" is now equivalent to "pb_buffer *buf".

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-12-11 15:25:13 +01:00
Marek Olšák
6cc8f6c6a7 gallium/radeon: inline the r600_rings structure
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2015-11-13 19:54:41 +01:00
Bas Nieuwenhuizen
afa357c3b0 radeonsi: Allocate buffers for DCC.
As the alignment requirements can be 32 KiB or more, also adding
an aligned buffer creation function.

DCC is disabled for textures that can be shared as sharing the
DCC buffers has not been implemented yet.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2015-10-24 00:42:01 +02:00
Marek Olšák
282b378012 gallium/radeon: handle buffer_map staging buffer failures better
Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-09-24 19:51:42 +02:00
Marek Olšák
b409524fef gallium/radeon: handle PIPE_TRANSFER_FLUSH_EXPLICIT
Basically, do the same thing as for buffer_unmap, but use the explicit range
instead. It's for apps which want to map a whole buffer and mark touched
ranges explicitly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-09-10 17:14:15 +02:00
Marek Olšák
8ba70e0a74 radeonsi: fix DRM version checks for amdgpu DRM 3.0.0 2015-08-14 15:02:29 +02:00
Marek Olšák
7e5d56394b gallium/radeon: add a debug flag not to use write combining (v2)
v2: just clear the flag before the allocation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-10 18:26:44 +02:00
Marek Olšák
592ce6e2d1 gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface
The timeout parameter covers both cases.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-07 00:06:13 +02:00
Marek Olšák
7713d594e4 r600g,radeonsi: implement GL_AMD_pinned_memory
v2: update release notes

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-02-17 17:31:48 +01:00
Marek Olšák
218b15715e radeonsi: initialize TC_L2_dirty to false after buffer allocation
I forgot to do this, though "true" should have no effect on correctness.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-02-17 17:31:48 +01:00
Michel Dänzer
7b4276d7ac r600g,radeonsi: Always use GTT again for PIPE_USAGE_STREAM buffers
Putting those in VRAM can cause long pauses due to buffers being moved
into / out of VRAM.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84662
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-10-09 18:11:44 +09:00
Michel Dänzer
5679ccfcaf r600g,radeonsi: Set RADEON_GEM_NO_CPU_ACCESS flag for tiled BOs
This lets the kernel know that such BOs can be pinned outside of the CPU
accessible part of VRAM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-10 12:01:10 +09:00
Michel Dänzer
2adf7ee92e r600g,radeonsi: Preserve existing buffer flags
The default case was accidentally clearing RADEON_FLAG_CPU_ACCESS from the
previous fall-through cases.

Reported-by: Mathias Fröhlich <Mathias.Froehlich@gmx.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-03 12:49:59 +09:00
Michel Dänzer
51131c423c r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPU
This allows the kernel to prevent such BOs from ever being stored in the
CPU inaccessible part of VRAM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-09-02 15:24:07 +09:00
Niels Ole Salscheider
5ae9bdafd4 gallium/radeon: Do not use u_upload_mgr for buffer downloads
Instead create a staging texture with pipe_buffer_create and
PIPE_USAGE_STAGING.

u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM.
But since 150ac07b85 CPU -> GPU streaming buffers
are created in VRAM. Therefore the staging texture (in VRAM) does not offer any
performance improvements for buffer downloads.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-08-19 12:56:04 +02:00
Niels Ole Salscheider
3d5e247de6 gallium/radeon: Set gpu_address to 0 if r600_virtual_address is false
Without this patch I get the following during DMA transfers:
[drm:radeon_cs_ib_chunk] *ERROR* Invalid command stream !
radeon 0000:01:00.0: CP DMA dst buffer too small (21475829792 4096)

This is a fixup for e878e154cd.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2014-08-10 12:54:34 +02:00
Marek Olšák
e878e154cd gallium/radeon: store VM address in r600_resource
This will help to get rid of the buffer_get_virtual_address calls.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-08-09 23:41:15 +02:00
Michel Dänzer
150ac07b85 r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-08-01 11:25:27 +09:00
Michel Dänzer
8898fff46c r600g/radeonsi: Reduce or even drop special treatment of persistent mappings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-08-01 11:04:16 +09:00
Michel Dänzer
07c65b85ea r600g/radeonsi: Use write-combined CPU mappings of some BOs in GTT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-23 18:55:50 +09:00
Christian König
042b061fef gallium/radeon: use PRIX64 instead of PRIu64
We want hex values here, not decimals.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-07-06 13:28:04 +02:00
Marek Olšák
70cf6639c3 gallium/radeon: create and return a fence in the flush function
All flush functions get a fence parameter. cs_create_fence is removed.

Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-16 14:02:51 +02:00
Marek Olšák
e1a9a54464 r600g,radeonsi: attempt to fix racy multi-context apps calling BufferData
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75061

v2: minimize the window where cs_buf != new_buf
2014-03-11 19:18:02 +01:00
Marek Olšák
74d95adea0 r600g,radeonsi: fix broken buffer download
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-03-11 19:18:02 +01:00
Marek Olšák
4ca3486b19 r600g,radeonsi: use a fallback in dma_copy instead of failing
v2: - allow byte-aligned DMA buffer copies on Evergreen
    - fix piglit/texsubimage regression
    - use the fallback for 3D copies (depth > 1) as well
2014-03-11 19:18:02 +01:00
Niels Ole Salscheider
f112ba03bb radeon: Use upload manager for buffer downloads
Using DMA for reads is much faster.

Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off by: Marek Olšák <marek.olsak@amd.com>
2014-03-07 18:07:05 +01:00
Marek Olšák
6381dd7e9d r300g,r600g,radeonsi: add support for ARB_buffer_storage
All GTT memory mappings are coherent and therefore can be persistent.

Reviewed-by: Fredrik Höglund <fredrik@kde.org>
2014-02-25 16:05:41 +01:00
Michel Dänzer
cf0172d46a r600g,radeonsi: Consolidate logic for short-circuiting flushes
Fixes radeonsi emitting command streams to the kernel even when there
have been no draw calls before a flush, potentially powering up the GPU
needlessly.

Incidentally, this also cuts the runtime of piglit gpu.py in about half
on my Kaveri system, probably because an X11 client going away no longer
always results in a command stream being submitted to the kernel via
glamor.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=65761
Cc: "10.1" mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-02-18 10:46:23 +09:00
Marek Olšák
c32114460d gallium: remove PIPE_USAGE_STATIC
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-02-06 17:37:34 +01:00
Marek Olšák
2be5bbdd97 r600g,radeonsi: set resource domains in one place (v2)
v2: This doesn't change the behavior. It only moves the tiling check
    to r600_init_resource and removes the usage parameter.

Reviewed-by: Christian König <christian.koenig@amd.com>
2014-02-06 17:29:59 +01:00
Marek Olšák
07075cf350 r600g,radeonsi: skip unnecessary buffer_is_busy call, add a comment 2014-02-04 20:19:16 +01:00
Marek Olšák
08f0344cf3 r600g,radeonsi: skip busy-checking for DISCARD_RANGE if it has been done already 2014-02-04 20:19:16 +01:00
Marek Olšák
796e2fba8c r600g,radeonsi: treat DYNAMIC and STREAM usage as STAGING 2014-02-04 20:19:16 +01:00
José Fonseca
6b6fdb6aa9 radeon: Adding missing stdio.h include.
Became apparent with the C11 thread changes.  Unfortunately I didn't
have all dependencies to build the driver, and only noticed
this issue on build server.
2014-01-23 13:23:43 +00:00
Marek Olšák
5dfb10b2f5 r600g,radeonsi: if discarding whole buffer range, discard whole resource instead
Also set the unsynchronized flag if the whole resource was discarded
to avoid doing buffer-busy checks again.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-01-23 01:47:14 +01:00
Marek Olšák
91aca8c662 r600g,radeonsi: consolidate buffer code, add handling of DISCARD_RANGE for SI
This adds 2 optimizations for radeonsi:
- handling of DISCARD_RANGE
- mapping an uninitialized buffer range is automatically UNSYNCHRONIZED

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2013-12-12 18:34:11 +01:00
Marek Olšák
0aea43db93 radeon: move some functions to r600_buffer_common.c
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christoph Brill <egore911@gmail.com>

v2: Renamed r600_buffer.c to r600_buffer_common.c. The stupid build system
    doesn't allow 2 files of the same name in different directories.
2013-12-12 18:34:05 +01:00