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radeonsi: initialize TC_L2_dirty to false after buffer allocation

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I forgot to do this, though "true" should have no effect on correctness.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2015-02-10 14:16:56 +01:00
parent a27b74819a
commit 218b15715e
1 changed files with 1 additions and 0 deletions
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src/gallium/drivers/radeon/r600_buffer_common.c
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@ -185,6 +185,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
pb_reference(&old_buf, NULL);
util_range_set_empty(&res->valid_buffer_range);
res->TC_L2_dirty = false;
if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) {
fprintf(stderr, "VM start=0x%"PRIX64" end=0x%"PRIX64" | Buffer %u bytes\n",