This just refactors the image code, so that outdata is passed
explicitly, and refactors the internal handling of NONE formats.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
This isn't fully free of bugs, but it's good to get CI working,
so fixing those bugs doesn't break anything.
The main buggy areas are missing indirect texture size,
and transform feedback geometry streams.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
This isn't needed for the basic indirect code, but it is needed for
texture size/image size unfortunately. They could be done with a super
switch, but it seems simple to query them.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
The way we construt vertex/geom shaders means these can
diverge, so we have to just hammer it out manually,
there are likely optimisation opportuniities in here
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
This adds the apis to add an indirect accessor for arrays
of textures, using an LLVM switch statement and per-texture
sampler functions.
It also adds the indexer to the sampler parameters
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
This passes some more paramters in directly and changes how
the returns are done in order to reuse this function for
indirect texture support later.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3778>
We generate bitfields of bits that we want to retain (mask) and bits
that we want to set (brw_mode) in the cr0 register, so the bits we want
to set should be in the set of bits we want to retain.
Also, remove the initialization of mask from
fs_visitor::emit_shader_float_controls_execution_mode since
brw_rnd_mode_from_nir initializes the mask parameter unconditionally.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
In FreeBSD x86 and aarch64 __u64 is typedef to unsigned long and
is the same size as unsigned long long.
Since we are explicitly specifying the format, cast the value
to the proper type.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
Compiling with this option result in too much TLS usage and FreeBSD
cannot handle that.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Emmanuel <manu@FreeBSD.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3559>
Requires using rules: in the pages job as well, so it doesn't inherit
the rules from the template.
v2:
* Add comment explaining that cases not covered by explicit rules
default to "when: never".
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
Only run the job automatically for Marge Bot, otherwise let it be
triggered manually.
v2:
* Never run this job for the main project, since it's only needed in
pre-merge pipelines.
* Add comment explaining that cases not covered by explicit rules
default to "when: never".
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5469>
Note:
* a3xx change based on available register documentation
* a4xx guesses (RB_RENDER_CONTROL2 bits especially)
* a5xx change based on a6xx, these registers seem identical
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5582>
Marge only merges an MR if the pipeline passed. Running the pipeline
again after merging is redundant.
v2:
* Add rule to ensure docker images are up to date in the main project
registry (Eric Anholt)
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5680>
