Commit graph

24890 commits

Author SHA1 Message Date
Jakob Bornecrantz
210ad58ee3 trace: Don't write state objects to file if dumping is not set 2009-06-14 06:07:50 +02:00
Keith Whitwell
0cce6d7e33 tgsi: correct handling of return value from util_vsnprintf
We were failing to deal with:
  - vsnprintf returns negative value on error.
  - vsnprintf returns the number of chars that *would* have been
    written on truncation.
2009-06-26 13:43:10 +01:00
Dave Airlie
0952645fe0 r200: make use of DMA buffers for Elts a lot better.
This allows us to return the unused portion of the dma buffer
to the allocator instead of wasting nearly 16k a pop.
2009-06-26 15:09:12 +10:00
Dave Airlie
db54579628 r200: only emit unitneeded textures 2009-06-26 15:09:11 +10:00
Joakim Sindholt
622858884f r300-gallium: organize fragment/vertex shaders
Appart from separating r3xx/r5xx fragment shaders, a more consistent
naming scheme has been applied. From now on:
r300 = all chips
r3xx = R300/R400 only
r5xx = R500 only
This way r300_fragment_shader is the master struct, and the structs
r3xx_fragment_shader and r5xx_fragment_shader inherits it.
2009-06-26 01:13:06 +02:00
Vinson Lee
450b20d1ef gallium: Add PIPE_OS_APPLE token. 2009-06-25 09:52:50 -06:00
Jakob Bornecrantz
e99d13bbc6 progs/tests: Add yet another mipmap test 2009-06-14 01:44:34 +02:00
Roland Scheidegger
43b3b745e4 radeon: fix hw texture limits
still always enable max, but the right values this time.
More work should probably be done for saner limits without mm, and/or
dri conf option allow_large_textures (which is ignored) removed.
3D limit on r100 is pretty arbitrary as still handled by swrast anyway.
Also fix r300 limits (except 3d I've no idea what the max is anyway so
keep using mesa default).
2009-06-25 15:57:33 +02:00
Dave Airlie
cdbcb051d9 radeon/r200: add some hw texture limits 2009-06-25 13:26:52 +10:00
Dave Airlie
69fd0cbaa2 radeon: fix stupidity in cs space check code.
This was already correct in the GEM code
2009-06-25 12:13:17 +10:00
Brian Paul
bc5c40d7d9 intel: fix additional merge conflicts missed in previous commit 2009-06-24 08:57:48 -06:00
Brian Paul
a04af335a4 Merge branch 'mesa_7_5_branch'
Conflicts:

	src/mesa/drivers/dri/i915/i915_tex_layout.c
	src/mesa/drivers/dri/i965/brw_wm_glsl.c
	src/mesa/drivers/dri/intel/intel_buffer_objects.c
	src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
	src/mesa/drivers/dri/intel/intel_pixel_draw.c
	src/mesa/main/enums.c
	src/mesa/main/texstate.c
	src/mesa/vbo/vbo_exec_array.c
2009-06-24 08:54:37 -06:00
Jakob Bornecrantz
d60b2c6855 identity: Add new identity driver
This driver does no transformation of the gallium calls
	going to the real driver, like the identity matrix. It is
	intended to be the basis for transforming and/or debug
	drivers like trace and rbug.

	Authors of this patch are:
		Michal Krol, orignal heavy lifting.
		José Fonesca, object wrapping code stolen from trace.
		Jakob Bornecrantz, put it all toghether and renamed a stuff.
2009-06-24 13:04:56 +02:00
Eric Anholt
b8e638d489 i965: Disable texture tiling by default.
I haven't fixed all the regressions yet, and it'll be easy to re-enable when
the known problems are fixed.
2009-06-23 19:31:43 -07:00
Eric Anholt
b72dea5441 i965: Set the max index buffer address correctly according to the docs.
It's the last addressable byte, not the byte after the end of the buffer.
2009-06-23 19:31:13 -07:00
Eric Anholt
d43599afef i965: Don't set a reserved bit in MI_FLUSH.
I noticed this when this MI_FLUSH showed up in IPEHR for the ut2004 hang.
Not setting the reserved bit didn't help, though.
2009-06-23 19:31:13 -07:00
Eric Anholt
5ca800e100 dri2: Refresh the fake front contents after glXSwapBuffers().
Bug #19177.

Reviewed by: Ian Romanick <ian.d.romanick@intel.com>
2009-06-23 19:31:12 -07:00
Eric Anholt
9c0ba017c8 i965: Fix depth-texture Y-tiling detection for sized internal formats.
Fixes assertion failure on norsetto shadow mapping demo.
2009-06-23 19:31:12 -07:00
Eric Anholt
e0a4e25f93 i965: Fix packed depth/stencil textures to be Y-tiled as well.
Fixes shadowtex.c.  And an assert is added to catch this sooner next time.
2009-06-23 19:31:12 -07:00
Eric Anholt
1593a1bb34 intel: Bail on blits with non-tile-aligned offsets. 2009-06-23 19:31:12 -07:00
Eric Anholt
8f81a6468f intel: Avoid trying to do blits to Y tiled regions.
This is somewhat nasty, but we need to do Y-tiled depth for FBO support.
May help with corruption and hangs since enabling texture tiling, and
since switching depth textures to Y tiled.

Fixes piglit depthtex.c on 965.
2009-06-23 19:31:11 -07:00
Eric Anholt
246d59c29e intel: Fix some potential writes to zero-copy PBOs when used as regions.
I was in the midst of fixing some blitting-with-Y-tiled issues when I
noticed this.  Hopefully PBO usage will be a little more robust, as a
result.
2009-06-23 19:31:11 -07:00
Eric Anholt
6a49473ab5 intel: Remove long-unused intel_region_fill and intelEmitFillBlit. 2009-06-23 19:31:10 -07:00
Eric Anholt
a9b03aaebf intel: Refuse to do texture tiling if we don't have the kernel support. 2009-06-23 19:31:10 -07:00
Pauli Nieminen
4f1e141c11 Fix crash when debug output is enabled and sarea is notset in r200Clear 2009-06-23 16:43:00 +02:00
Ian Romanick
70e72070fc mesa: From float type modifier from values to large for singles
The values 2147483648.0 and 4294967294.0 are too larget to be stored in single
precision floats.  Forcing these to be singles causes bits to be lost, which
results in errors in some pixel transfer tests.

This fixes bug #22344.
2009-06-22 18:22:51 -07:00
Brian Paul
a31118c25a st/mesa: fix setup_edgeflags() regression
stobj is now non-null for the default/null buffer object.  Update the
test to check the buffer ID to see if it's a real buffer object.
2009-06-22 17:49:22 -06:00
Jakob Bornecrantz
7a879500ac gallium-intel: Improve Xorg Makefile a bit
The real solution is to create a Makefile.template for xorg
	drivers and use that here.
2009-06-22 23:45:02 +02:00
Jakob Bornecrantz
23170ab236 st/xorg: Convert to template makefile 2009-06-22 23:34:18 +02:00
Jakob Bornecrantz
5d0a1d4241 st/dri: Fix typo when checking for depth formats 2009-06-22 23:34:18 +02:00
Eric Anholt
c80ce5ac90 i965: Fix warnings in intel_pixel_read.c. 2009-06-22 08:52:52 -07:00
Michel Dänzer
2c36ed9067 intel: Fix glReadPixels regression since changing context init order.
Fixes regression in dd26899ca3 that also
affected some PBO operations.
2009-06-22 08:45:45 -07:00
Eric Anholt
df70d3049a intel: Also get the DRI2 front buffer when doing front buffer reading. 2009-06-19 22:18:16 -07:00
Eric Anholt
afc981ee46 intel: Update Mesa state before span setup in glReadPixels.
We could have mapped the wrong set of draw buffers.  Noticed while looking
into a DRI2 glean ReadPixels issue.
2009-06-19 22:17:46 -07:00
Eric Anholt
dcfe0d66bf intel: Move intel_pixel_read.c to shared for use with i965. 2009-06-19 22:16:16 -07:00
Eric Anholt
3b08a43f32 intel: Don't map regions with drm_intel_gem_bo_map_gtt() unless they're tiled.
This fixes a regression in region read performance that came in with the
texture tiling changes.  Ideally we'd have an access flag coming in so we
could also use bo_map_gtt for writing, like we do for buffer objects.

Bug #22190
2009-06-19 17:25:20 -07:00
Eric Anholt
405300bb19 intel: Fix other metaops versus GL_COMPILE_AND_EXECUTE dlists.
Fixes oglconform zbfunc.c and pxtrans-cidraw.c, at least.
2009-06-19 16:43:45 -07:00
Eric Anholt
64edde1004 intel: Fix glClear behavior versus display lists.
The CALL_DrawArrays was leaking the clear's primitives into the display
list with GL_COMPILE_AND_EXECUTE.  Use _mesa_DrawArrays instead, which
doesn't appear to leak.  Fixes piglit dlist-clear test.
2009-06-19 16:43:45 -07:00
Eric Anholt
396b4043f0 mesa: Make VBO dlist printing use the same path as other dlist printing.
I was rather confused when mesa_print_display_list didn't show any of
my glBegin()..glEnd().  Nothing but print_list appears to call
this function, so matching its behavior seems like a good idea.
2009-06-19 16:43:45 -07:00
Chia-I Wu
cca30245bd intel: Do not access pbo's buffer directly when attaching.
pbo might be system buffer based or attached to another region.  Call
intel_bufferobj_buffer to make sure pbo has a buffer of its own.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Chia-I Wu
ed91389618 intel: Data are copied in the wrong direction when breaking COW tie.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Chia-I Wu
1a7ec317ef intel: Fix migration from sys_buffer in intel_bufferobj_buffer.
intel_bufferobj_subdata is called to migrate data from sys_buffer, and
it expects only one of buffer or sys_buffer is non-NULL.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-06-19 16:43:45 -07:00
Roland Scheidegger
402df41c1c radeon: make cubemap mipmap generation work
need to pass target parameter to radeon_teximage/radeon_subteximage functions
otherwise mipmap generation for cube maps can't work (assert/segfault in
_mesa_generate_mipmap)
2009-06-20 00:28:39 +02:00
Roland Scheidegger
7a5c5b9af3 demos: make cubemap work without EXT_fbo support
use SGIS_generate_mipmap if EXT_fbo support (for manual mipmap generation)
is not available.
2009-06-20 00:28:38 +02:00
Brian Paul
18af7c384c i965: interpolate colors with perspective correction by default
...rather than with linear interpolation.  Modern hardware should use
perspective-corrected interpolation for colors (as for texcoords).
glHint(GL_PERSPECTIVE_CORRECTION_HINT, mode) can be used to get
linear interpolation if mode = GL_FASTEST.
2009-06-12 16:21:20 -06:00
Brian Paul
05f0d90962 mesa: use larger initial refcount for NullBufferObj
Refcounting of the null/default buffer object isn't perfect yet so be
extra safe.
2009-06-12 16:01:02 -06:00
Brian Paul
0854b7e972 mesa: use _mesa_reference_buffer_object() in a few places 2009-06-12 16:01:02 -06:00
Brian Paul
d7ea9ddf58 mesa: use _mesa_reference_buffer_object() in a few places 2009-06-12 16:01:02 -06:00
Brian Paul
193177b732 tests: added persp_hint.c test
Test the effect of GL_PERSPECTIVE_CORRECTION_HINT on color interpolation.
2009-06-12 15:59:53 -06:00
Dave Airlie
c4a5754a8c add some info to relnotes on radeon 2009-06-13 07:43:04 +10:00