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Author SHA1 Message Date
Job Noorman
b36a7ce0f1 ir3/ra: prevent moving source intervals for shared collects 
Non-trivial collects (i.e., ones that will introduce moves because the
sources don't line-up with the destination) may cause source intervals
to get implicitly moved when they are inserted as children of the
destination interval. Since we don't support moving intervals in shared
RA, this may cause illegal register allocations. Prevent this by
creating a new top-level interval for the destination so that the source
intervals will be left alone.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: fa22b0901a ("ir3/ra: Add specialized shared register RA/spilling")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31978>
 2024-11-11 20:08:34 +00:00
Matt Turner
a2c4a34303 anv: Align anv_descriptor_pool::host_mem 
Otherwise anv_descriptor_set is accessed through an unaligned pointer,
which is undefined behavior in C.

```
anv_descriptor_set.c:1620:17: runtime error: member access within misaligned address 0x61900002c2b5
               for type 'struct anv_descriptor_set', which requires 8 byte alignment 0x61900002c2b5
```

Fixes: 2570a58bcd ("anv: Implement descriptor pools")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32070>
 2024-11-11 19:45:14 +00:00
Georg Lehmann
ece1ab3b87 radv: run copy prop before vectorizing 
Otherwise there are a lot of scalar movs between texture instructions
and alu. With those removed, the top down vectorizer has more starting
points.

Totals from 296 (0.37% of 79206) affected shaders:
MaxWaves: 5710 -> 5754 (+0.77%)
Instrs: 388051 -> 386630 (-0.37%); split: -0.46%, +0.09%
CodeSize: 2120800 -> 2117144 (-0.17%); split: -0.30%, +0.13%
VGPRs: 17496 -> 17344 (-0.87%)
Latency: 8893751 -> 8901364 (+0.09%); split: -0.10%, +0.18%
InvThroughput: 1740411 -> 1731710 (-0.50%); split: -0.57%, +0.07%
VClause: 6573 -> 6576 (+0.05%); split: -0.21%, +0.26%
SClause: 11233 -> 11209 (-0.21%); split: -0.28%, +0.07%
Copies: 31582 -> 31635 (+0.17%); split: -1.49%, +1.66%
PreSGPRs: 15878 -> 15876 (-0.01%)
PreVGPRs: 15380 -> 15274 (-0.69%)
VALU: 278528 -> 277036 (-0.54%); split: -0.65%, +0.11%
SALU: 49062 -> 49054 (-0.02%); split: -0.03%, +0.02%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32060>
 2024-11-11 18:33:48 +00:00
Samuel Pitoiset
107f29c39a aco: do not reorder s_trap instructions 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32055>
 2024-11-11 15:46:36 +00:00
Asahi Lina
252e9a4cdf hk: Bump up max buffer size 
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Asahi Lina
81546c769e asahi: Use 64bit size fields 
This allows for BOs >4G.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
63dd4c13d0 asahi: move agx_gather_device_key 
for precomp

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
7e57e0aa7d asahi: factor out more compiled shader 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
f36ea1818b asahi: drop dead param 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
e7f100013f asahi: don't take compiled_shader in agx_build_internal_usc 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
8d73a3ae40 asahi: assert/cse resource valid 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
b94bcf0318 asahi: fix a2c with sample shading, harder 
Fixes: 9bbe93d158 ("hk: fix alpha-to-coverage with sample shading")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
b9429930b9 asahi: correct core count, max freq 
fixes clinfo.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
beab5d2792 asahi: extract agx_get_num_cores 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
e145425746 agx: fuse also 8-bit address math 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
75d3c51e51 libagx: drop silliness in restart kernel 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
4660911cf9 libagx: fix unroll kernel constant qualifier 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
2963cd900f libagx: don't key unroll to index size 
Probably a premature optimization, it's annoying for precomp and for DGC.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
6030b204d5 libagx: simplify index patch expression 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
5e4e8df95a libagx: drop Clockwise 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
0c0097ab34 libagx: vectorize triangle def'n 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
c54fdde1a4 libagx: drop dead code 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
d00a504cb0 libagx: drop branch 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
28a2844309 libagx: fix cl warning 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
663b367a76 hk: fix meta shader name 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
f8b69ebdc2 hk: drop assert 
works fine without.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
ece3bd74db agx: make imad+ishl rules actually work 
total instructions in shared programs: 2750211 -> 2750184 (<.01%)
instructions in affected programs: 50499 -> 50472 (-0.05%)
helped: 27
HURT: 0
Instructions are helped.

total alu in shared programs: 2273669 -> 2273642 (<.01%)
alu in affected programs: 29874 -> 29847 (-0.09%)
helped: 27
HURT: 0
Alu are helped.

total fscib in shared programs: 2271986 -> 2271959 (<.01%)
fscib in affected programs: 29874 -> 29847 (-0.09%)
helped: 27
HURT: 0
Fscib are helped.

total bytes in shared programs: 21475184 -> 21474968 (<.01%)
bytes in affected programs: 371574 -> 371358 (-0.06%)
helped: 27
HURT: 0
Bytes are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
f737470736 agx: fuse iadd+large shift into imad 
total instructions in shared programs: 2750352 -> 2750211 (<.01%)
instructions in affected programs: 86944 -> 86803 (-0.16%)
helped: 32
HURT: 18
Instructions are helped.

total alu in shared programs: 2273810 -> 2273669 (<.01%)
alu in affected programs: 76720 -> 76579 (-0.18%)
helped: 32
HURT: 18
Alu are helped.

total fscib in shared programs: 2272127 -> 2271986 (<.01%)
fscib in affected programs: 76720 -> 76579 (-0.18%)
helped: 32
HURT: 18
Fscib are helped.

total bytes in shared programs: 21476424 -> 21475184 (<.01%)
bytes in affected programs: 649884 -> 648644 (-0.19%)
helped: 33
HURT: 18
Bytes are helped.

total regs in shared programs: 865114 -> 865090 (<.01%)
regs in affected programs: 525 -> 501 (-4.57%)
helped: 3
HURT: 0

total uniforms in shared programs: 2120792 -> 2120848 (<.01%)
uniforms in affected programs: 414 -> 470 (13.53%)
helped: 0
HURT: 8
Uniforms are HURT.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
c9e42073a1 agx: optimize signext imad 
improves clpeak short.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Asahi Lina
cf0261980a hk: Enable missing swapchainMaintenance1 support 
This was inconsistent with claiming the extension is supported, and that
trips up GTK4.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
d449800e46 hk: don't advertise impossible modifiers 
fixes dEQP-VK.drm_format_modifiers.bound_to_dma_buf.a2b10g10r10_sint_pack32,Crash

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Asahi Lina
e5d61631fe hk: Fix DRM modifier selection for compressed surfaces 
We have to reject DRM_FORMAT_MOD_APPLE_TWIDDLED_COMPRESSED for surfaces
which are too small. Since the modifier is for all planes, that means
that for multiplane images we need to test all planes for compression
support.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Asahi Lina
da1601a4ec hk: Add virtio implicit sync support 
Since we can't know what BOs are written easily, just sync against all
external BOs.

This should go away once we have proper fence passing support so we can
do implicit sync passing in muvm-x11bridge.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Mary Guillemard
1a621a6967 agx: Add support for EGL_NV_context_priority_realtime 
Signed-off-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
ddc6d9e984 agx: fix atomics in tess count shaders 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
2c7635ab63 agx: add tests for sign/zero-extend propagate 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:02 +00:00
Alyssa Rosenzweig
6d56c8bc02 agx: fold zext into int sources 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Alyssa Rosenzweig
200d0794e2 agx: optimize signext+iadd 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Alyssa Rosenzweig
cfe0a9acec agx: add pseudo for signext 
easier to optimize

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Alyssa Rosenzweig
8de339c0d8 agx: change int conversion test 
it's not useful as is but we can salvage

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Asahi Lina
85c5a25ec3 asahi: In-place decompress shared resources for feedback loops 
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Asahi Lina
f04387a415 asahi: Introduce batch->feedback to disable compression in PBE 
Used for RTs that have feedback with in-place decompression.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Asahi Lina
9288a3a583 asahi: Extract agx_decompress_inplace() 
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Asahi Lina
f28a1b3fcf asahi: Add PIPE_BIND_SHARED to imported resources 
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Asahi Lina
59501af723 asahi: Add pipe bind flags to resource debug 
Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
 2024-11-11 14:33:01 +00:00
Zan Dobersek
e17038cc88 fd/pps: provide derived counters on a7xx 
Provide various derived counters that can be reported by the freedreno
perfetto producer on a7xx devices.

Specific to a7xx is the split of counters for some countables between the
rendering and visibility bins. Such counters have to be configured
separately inside the appropriate perfcounter group, which then enables
the derived counter to use the separate counter values in its measured
metrics.

Not all possible derived counters are enabled because the perfcounter
groups cannot handle as many counters as would be necessary. There's also
disabled derived counters that would require counters from the VBIF group
which isn't exposed for now due to its more complex way of enabling the
relevant counters.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29677>
 2024-11-11 13:39:40 +00:00
Zan Dobersek
fae4a23ab1 fd/pps: specify counter group for each countable 
For each countable that's being set up, the specific counter group is now
also required. This way on a7xx it will be possible to differentiate
between countables that have the same name but can be used through counter
groups for rendering bin or for visibility bin (e.g. CP and BV_CP).

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29677>
 2024-11-11 13:39:39 +00:00
Danylo Piliaiev
21359417ba ir3/parser: Print the line where parsing error occurred 
Super useful with rddecompiler, otherwise it's impossible to
determine the instruction which is failed to be parsed.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31954>
 2024-11-11 11:38:17 +00:00
Samuel Pitoiset
30d9166d80 radv: dump the trap handler shader with RADV_DEBUG=dump_trap_handler 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32031>
 2024-11-11 09:34:05 +00:00
Samuel Pitoiset
4d50691ae9 radv: remove unused parameter to radv_fill_nir_compiler_options() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32031>
 2024-11-11 09:34:05 +00:00