Commit graph

31535 commits

Author SHA1 Message Date
Charmaine Lee
b2e78e79d7 svga: clean up format_cap_table
Per Jose's suggestion, this patch cleans up format_cap_table to remove
the unnecessary default cap value for vgpu10 formats since those devcap values
can be retrieved from the device.

Tested with MTT conform, glretrace, piglit in HWv13 and HWv8.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:03 -06:00
Charmaine Lee
122ca27a48 svga: fix the default devcap for SVGA3D_Z_D24S8_INT
The default devcap for format SVGA3D_Z_D24S8_INT in HWv8 when its devcap is
not explicitly advertised should be set to zero to match the default value
in the device.

Tested with MTT piglit in HW version 8.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
eea6223184 svga: create buffer surfaces for incompatible bind flags
In cases where certain bind flags cannot be enabled together,
such as CONSTANT_BUFFER cannot be combined with any other flags,
a separate host surface will be created.
For example, if a stream output buffer is reused as a constant buffer,
two host surfaces will be created, one for stream output,
and another one for constant buffer. Data will be copied from the
stream output surface to the constant buffer surface.

Fixes piglit test ext_transform_feedback-immediate-reuse-index-buffer,
                  ext_transform_feedback-immediate-reuse-uniform-buffer

Tested with MTT piglit, MTT glretrace, Nature, NobelClinician Viewer, Tropics.

v2: Fix bind flags compatibility check as suggested by Brian.
v3: Use the list utility to maintain the buffer surface list.
v4: Use the SAFE rev of LIST_FOR_EACH_ENTRY

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
7abfb0b0d5 svga: do not unconditionally enable streamout bind flag
Currently we unconditionally enable streamout bind flag at
buffer resource creation time. This is not necessary if the buffer
is never used as a streamout buffer. With this patch, we enable
streamout bind flag as indicated by the state tracker. If the buffer
is later bound to streamout and does not already has streamout bind
flag enabled, we will recreate the buffer with
the new set of bind flags. Buffer content will be copied
from the old buffer to the new one.

Tested with MTT piglit, Nature, Tropics, Lightsmark.

v2: Fix bind flags check as suggested by Brian.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
b549f5e6b1 svga: pass tobind_flags to svga_buffer_handle
This is to prepare for more bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Charmaine Lee
4a79b508a4 svga: pass bind_flags to surface create functions
This is to prepare for other bind_flags optimization
in subsequent patches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-27 07:49:02 -06:00
Brian Paul
ce608784d0 pipe_loader_sw: fix compilation warning
Add the new 'flags' parameter to pipe_loader_sw_create_screen().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-27 07:49:02 -06:00
Lionel Landwerlin
3c50ebce25 i915: use different CFLAGS/LIBS variables than i965/anv
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-27 14:10:29 +03:00
Ilia Mirkin
4a79f2be33 nv50/ir: fix combineLd/St to update existing records as necessary
Previously the logic would decide that the record is kept, which
translates into keep = false in the caller, which meant that these
passes did not run.

While it's right that keep = false which means that a new record does
not need to be added, we do still have to perform the usual list
maintenance. It's easiest to do this pre-merge rather than post.

The lowering that clip/cull distance passes produce triggers this bug in
TCS (since reading outputs is done differently in other stages), but it
should be possible to achieve it with the right sequence of regular
reads/writes.

Fixes: KHR-GL45.cull_distance.functional
Fixes: generated_tests/spec/arb_tessellation_shader/execution/tes-input/tes-input-gl_ClipDistance.shader_test
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:24:19 -04:00
Ilia Mirkin
7d56ae5eb2 nv50/ir: adjust overlapping logic to take fileIndex-relative offsets
If the fileIndex is different, that means they are in logically
different spaces. However if there's also a relative offset, then they
could end up pointing at the same spot again.

Also add a note about potential for multiple buffers to overlap even if
they're at different file indexes. However that's potentially lowered
away by the point that this logic hits.

Not known to fix any specific application or test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-26 20:24:19 -04:00
Ilia Mirkin
55a8c11705 nv50/ir: VFETCH is also considered a load for MemoryOpt
This has no effect since in practice this will only play for
memory-backed files, for which VFETCH will never happen.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-26 20:24:19 -04:00
Ilia Mirkin
c12f8305a8 nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clear
The idxbuf could linger, and when a clear happened, which also uses the
3d bufctx, we could get an error trying to access it.

This fixes spurious crashes/errors in CTS tests.

Fixes: 61d8f3387d ("nv50,nvc0: clear index buffer bufctx bin unconditionally")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:23:04 -04:00
Ilia Mirkin
8c02ee4a8b nv50/ir: fetch indirect sources BEFORE the op that uses them
All the BuildUtil helpers just insert the operation into the current BB.
So we have to take care that any fetchSrc() operations happen before the
operation whose setIndirect() it goes into.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2017-06-26 20:22:46 -04:00
Rob Herring
c4291a3283 Android: add renderonly files to libmesa_gallium
vc4 now depends on renderonly functions, but these weren't added to the
Android build resulting in the following errors:

src/gallium/drivers/vc4/vc4_resource.c:380: error: undefined reference to 'renderonly_scanout_destroy'
src/gallium/drivers/vc4/vc4_resource.c:681: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/drivers/vc4/vc4_screen.c:625: error: undefined reference to 'renderonly_dup'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'
src/gallium/winsys/pl111/drm/pl111_drm_winsys.c:37: error: undefined reference to 'renderonly_create_gpu_import_for_resource'

Fixes: 7029ec05e2 ("gallium: Add renderonly-based support for pl111+vc4.")
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-06-26 16:10:42 -07:00
Marek Olšák
ccf963ed29 radeonsi: don't flush and wait for CB after depth-only rendering
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-26 23:35:19 +02:00
Lucas Stach
28550c7875 etnaviv: only flush resource to self if no scanout buffer exists
Currently a resource flush may trigger a self resolve, even if a scanout buffer
exists, but is up to date. If a scanout buffer exists we only ever want to
flush the resource to the scanout buffer. This fixes a performance regression.

Fixes: dda956340c (etnaviv: resolve tile status when flushing resource)
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-06-26 20:06:01 +02:00
Christian Gmeiner
d8b2ccdb88 etnaviv: add support for snorm textures
Based on a patch from Wladimir J. van der Laan and untested due
to lack of hardware. Binary blob emits those formats if GPU supports
HALTI1 (faked with ibvivhook).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:59:42 +02:00
Christian Gmeiner
3bbf8dcfe4 etnaviv: add R8G8 texture support
Passes texwrap GL_ARB_texture_rg piglit (with faked full texture rg support).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:56:59 +02:00
Christian Gmeiner
751ae6afbe etnaviv: add support for swizzled texture formats
Passes all ext_texture_swizzle piglits.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:56:39 +02:00
Christian Gmeiner
0ddcccac4f etnaviv: add support for extended texture formats
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2017-06-26 19:49:30 +02:00
Bruce Cherniak
6fafba0e67 swr: set an explicit clear_rect if scissor is not enabled.
Fix regression of "no rendering" on simple apps like glxgears by
setting an explicit full surface clear_rect when scissor is not
enabled.

This regressed with commit 00173d91 "st/mesa: don't set 16
scissors and 16 viewports if they're unused" due to an assumption
that a default scissor rect is always set, which was the case prior
to this optimization.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-06-26 11:30:08 -05:00
Tim Rowley
0e1e5a2b14 swr/rast: adjust std::string usage to fix build
Some combinations of c++ compilers and standard libraries had problems
with the string::replace code we were using previously.

This should fix the travis-ci system.

Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-06-26 11:29:27 -05:00
Nicolai Hähnle
f17d78becc radeonsi: support indirect indexing in INTERP_* opcodes
The hardware doesn't support it, so we just interpolate all array elements
and then use indirect indexing on the resulting vector.

Clearly, this is not very efficient. There is an argument to be had for
adding if/else, or perhaps even pulling the data out of LDS directly.
Both don't really seem worth the effort, considering that it seems nobody
actually uses this feature.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-26 14:02:06 +02:00
Constantine Charlamov
abc7b110b6 r600g: fix crash when file in R600_TRACE doesn't exist
…and print error in such case. Which probably is not a rare event btw
because fopen doesn't expand ~ to $HOME.

Also get rid of unused "bool ret" variable.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 17:39:54 +10:00
Constantine Charlamov
3d466f3e9f r600g: take into account offset to system inputs at tgsi_interp_egcm()
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=100785

v2: I was too much twiddling whether to initialize nsys_inputs at the beginning of shader initialization or for allocation of system values, and by the time I decided to go with the first one, I forgot to change it back.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:32:36 +10:00
Constantine Charlamov
469e2ed473 r600g: get rid of trailing whitespace
Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:30:10 +10:00
Dave Airlie
27380d6b3e r600/asm: add support for other GDS operations.
This adds support for the GDS operations needed to do atomic
counters.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:27:51 +10:00
Dave Airlie
ccab3f7e1b r600: don't merge GDS into VTX
We don't want vtx/tex instructions ending up in GDS sections.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:21 +10:00
Dave Airlie
043f16eba1 r600: for memory instructions dump index gpr for read indirects also.
This just makes sure we can see the index gpr in the asm dumps.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:21 +10:00
Dave Airlie
ac8fb9800a r600: add support for vertex fetches via texture cache
On evergreen we can route vertex fetches via the texture cache,
and this is required for some images support. So add support
to the asm builder for it.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:20 +10:00
Dave Airlie
b050b91e33 r600: route indirect address register correctly for vtx fetches.
This was found during writing the images code, we need to
make sure we route the correct index register.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-26 16:23:20 +10:00
Marek Olšák
09f6915bf8 gallium/hud: add glthread counters
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
8f4bc8a324 gallium/hud: add API-thread-busy for monitoring the thread load
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
11cf079b67 gallium/hud: add hud_pane::hud pointer
for later use

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
5fa69be3c8 mesa/glthread: add glthread "perf" counters and pass them to gallium HUD
for HUD integration in following commits. This valuable profiling data
will allow us to see on the HUD how well glthread is able to utilize
parallelism. This is better than benchmarking, because you can see
exactly what's happening and you don't have to be CPU-bound.

u_threaded_context has the same counters.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
833f3c1c31 gallium/hud: move struct hud_context to hud_private.h
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
7492201c4e gallium/hud: rename API-thread-busy to main-thread-busy
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Marek Olšák
6884c95ab4 util: move pipe_thread_is_self from gallium to src/util
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-26 02:17:03 +02:00
Pierre Moreau
afb8f2d4a3 nv50/ir: Properly fold constants in SPLIT operation
Fixes: b7d9677d ("nv50/ir: constant fold OP_SPLIT")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-06-25 15:23:46 +02:00
Marek Olšák
e25950808f radeonsi/gfx9: don't overallocate shader binaries
It's not needed. The hw doesn't fetch ahead over page boundaries.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-24 23:04:37 +02:00
Lucas Stach
d6b9ba36a4 st/dri2: implement image offset query
This trivially adds support for the image offset query, which is needed
for the zwp_linux_dmabuf based EGL platform wayland implementation.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-06-24 16:57:55 +01:00
Roland Scheidegger
8bfe451ed3 llvmpipe: initialize default fb correctly in setup
If lp_setup_bind_framebuffer() is never called, then setup fb x1/y1 was not
correctly initialized. This can happen if there's never a fb set - both
cso and llvmpipe would consider setting this with no cbufs and no zsbuf a
redundant change and therefore it would never get set.
We rely on this setup fb rect being initialized correctly for the tri intersect
tests, throwing away tris which don't intersect. Not initializing it meant
we'd then say it intersected, and we'd try to bin that despite that we have
no actual tiles to bin it to, leading to assertion failures (pretty harmless
since tile 0/0 always exists nevertheless as tiles are statically allocated,
albeit that should change at some point).
(Note probably not an issue with gl state tracker)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-24 00:18:43 +02:00
Marek Olšák
f6e98e99e3 radeonsi: unreference vertex buffers when destroying the context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-06-23 19:53:54 +02:00
Marek Olšák
ee16796d54 radeonsi: implement the workaround for Rocket League - postponed TGSI kill
Do KILL at the end of shaders so as not to break WQM.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100070

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák
a98a04ec80 gallium/radeon: pass create_screen flags to r600_common_screen_init
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák
118b2008ba st/dri: add a drirc workaround for Rocket League
This needs to be passed to gallium drivers.

No game fix is planned at this time.

The addition of glsl_correct_derivatives_after_discard is
generally a good thing for mesa compatibility with the broader GL
driver ecosystem.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100070

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák
6b0f6e693b st/dri: get drirc options before creating pipe_screen
dri_init_options_get_screen_flags will return the flags for create_screen().

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Marek Olšák
76f379330a gallium: allow passing 'unsigned flags' to create_screen()
for drirc options

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-23 19:50:20 +02:00
Roland Scheidegger
c7688d2de5 llvmpipe:fix using 32bit rasterization mistakenly, causing overflows
We use the bounding box (triangle extents) to figure out if 32bit rasterization
could potentially overflow. However, we used the bounding box which already got
rounded up to 0 for negative coords for this, which is incorrect, leading to
overflows and hence bogus rendering in some of our private use.

It might be possible to simplify this somehow (we're now using 3 different
boxes for binning) but I don't quite see how.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-23 19:39:29 +02:00
Roland Scheidegger
672d245ffe llvmpipe: fill in debug vertex info for tri rasterization
This is pretty useful for debugging rasterization issues, so turn it on
based on DEBUG (the actual existence of the fields is also conditionalized
on DEBUG, lines fill it out the same too).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-06-23 19:39:29 +02:00