This ensures we can constant fold the ALU ops used to lower:
* explicit LOD calculations
* array textures
* texture offsets
* multisample indices
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12205>
Bifrost adds a value for the C factor equaling 2*src. This does not
correspond directly to API blend modes so it is not too useful in
general. However, it's required for src*dest + dest*src blending to be
done in hardware instead of a blend shader. GFXbench uses that blend
mode, so it must be important ;-)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12152>
Add unit tests for the fixed-function blending helpers in pan_blend.c.
Each test consists of a Porter-Duff blend mode and the associated
hardware state. In this commit, we add tests for the most common modes.
For motivation, this code has NOT been properly tested in CI. True,
functional correctness of the blend module as a whole is tested by
dEQP-GLES3.functional.fragment_ops.blend.* among other integration
tests. However, this testing is insufficient to check for regressions.
Crucially, the following broken patch would clear CI:
bool pan_can_fixed_function(...) {
return false;
}
In that case, blend shaders are used 100% of the time, which will
regress performance horribly but still pass dEQP. The only clue
something went wrong would be some traces changing checksum due to the
fixed-function blender producing slightly different output than
equivalent blend shaders. By unit testing the fixed blend path, we
ensure we always use the fixed-function path when we expect it to.
Similarly, using incorrect values for the blend metadata may not affect
functional correctness but will increase power consumption. Let's check
all the data we export to drivers.
Note: due to additive commutativity, there are many pairs of equivalent
Mali blend modes. Unfortunately, the vendor is... inconsistent about how
to resolve ambiguous modes. Our algorithm for computing modes is
correct; the "preferred" values are left in comments since otherwise our
tests fail despite correct code. I want to blame Bifrost for this, but
Midgard was patient zero.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12152>
This is required to disable dithering on a per-draw basis when OPAQUE
output is used (bypassing the blender which normally uses the
round_to_framebuffer_precision flag to do the same).
This functionally reverts:
ebc07f4b2f ("panfrost: Remove padded unorm blendable formats")
fae90a7940 ("panfrost: Always pick dithered tb formats")
while adding the functionality to make them useful.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12152>
It's an optimization pass -- omitting it should not cause MMU faults
(!). Make sure the UBO push mask is set regardless of whether the pass
is called, and just call the pass when required.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12328>
If we return inside a pan_pack() the descriptor packing doesn't happen.
Cc: mesa-stable
Fixes: 8ba2f9f698 ("panfrost: Create a blitter library to replace the existing preload helpers")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12239>
This is where it should be rather than having to pass it into the
optimisation pass every time.
It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
Similar to the fix in 6bf8e960fa ("pan/bi: Do helper termination
analysis on clauses")
Though apparently a "theoretical issue only", fixes artefacts in
DarkPlaces with both D3D9 and GL renderers.
Fixes: 9a7f0e268b ("pan/mdg: Use the helper invo analyze passes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12156>
While char is signed on macOS AArch64, on Linux it is unsigned. This
means it cannot represent the -1 return value of getopt_long.
Change the type of `c` to int, the type that getopt_long returns, so
that the -1 will be kept intact and can be checked for.
Fixes: c6be4f85e3 ("pan/bi: Use getopt for bifrost_compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Both Panfrost and the DDK add padding zero bytes to the end of
shaders, so we can use this instead of the end-of-shader clause for
checking whether to stop disassembling.
Shaders can have end-of-shader clauses partway through; these shaders
will now be completely disassembled instead of cut off at the first
end-of-shader clause.
A tag byte of zero is an invalid encoding, so unlike the previous
version of this test only check the first word.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Rather than just printing an offset such as '(pc + 192)', print the
target of branches as a clause number that matches up with the clause
headers printed by disassemble_bifrost.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Otherwise there is an uninitialized read, and the register allocation
will fail. (In the sense of failing a precondition. This manifests as
synthetic interference leading to higher register pressure and useless
moves. The allocation itself is ok, but it indicates a real bug.)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
When Valhall lands, we'll need to be more methodical about this. In the
mean time, this gets validation passing on
KHR-GLES31.core.compute_shader.atomic-case3 which was crashing in RA and
now again passes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Specify gpu id with --gpu-id or marketing name with --gpu. Still have
compile/disasm as commands, but allow -v for verbose printing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12134>
Hand typed. We could generate this from the XML to avoid the repititon
but I think the cure is worse than the disease.
This fixes instruction encoding faults seen in conformance tests.
Only a single shader-db affected, and it was likely already broken...
quadwords HURT: shaders/glmark/22-1.shader_test MESA_SHADER_FRAGMENT: 133 -> 135 (1.50%)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12114>
All vulkan drivers have been copying anv's code to convert
VkSpecializationInfo into nir_spirv_specialization.
Recently there was a Vulkan spec change on allowed values for
VkSpecializationInfo, and all drivers got affected.
This commits creates a new helper, and uses it on all Vulkan Mesa
drivers.
v2: use (uint8_t*) castings, instead of void*, to avoid C2036 with
MSVC (detected by the CI, inspired on what radv was doing)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12047>
Now we have all our Bifrost unit tests under meson and can remove the
test entrypoint from bifrost_compiler. This does require a small
refactoring for our util_dynarray handling to make sure we don't leak
memory. Otherwise meson-arm64-asan complains.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12109>
This handles the following from the Valhall specification (that I wrote):
If multiple subsequent staging registers are accessed, the base must
be aligned to 2. However, even if 4 registers are accessed, it is
not necessary to align to 4, only to 2. This restriction allows the
hardware to use a 64-bit data path without handling unaligned
access, which is more efficient. This restriction does not apply if
only a single register is accessed.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Decides when we need "branch reconvergence" (canonical term), the
logical opposite of "back-to-back execution" (non-canonical term, this
is old code in Bifrost terms). So invert the return value, rename, and
export so we can use it when packing Valhall instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
