Commit graph

49748 commits

Author SHA1 Message Date
Marek Olšák
b2a4573c14 mesa: handle HALF_FLOAT like FLOAT in get_tex_rgba
NOTE: This is a candidate for the stable branches.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
2013-03-23 13:17:05 +01:00
Roland Scheidegger
b101a094b5 llvmpipe: add EXT_packed_float render target format support
New conversion code to handle conversion from/to r11g11b10 AoS to/from
SoA floats, and also add code for conversion from rgb9e5 AoS to float SoA
(which works pretty much the same as r11g11b10 except for the packing).
(This code should also be used for texture sampling instead of
relying on u_format conversion but it's not yet, so rgb9e5 is unused.)
Unfortunately a crazy amount of hacks is necessary to get the conversion
code running in llvmpipe's generate_unswizzled_blend, which isn't well
suited for formats where the storage representation has nothing to do
with what's needed for blending (moreover, the conversion will convert
from packed AoS values, which is the storage format, to float SoA values,
because this is much more natural for the conversion, and likewise from
SoA values to packed AoS values - but the "blend" (which includes
trivial things like partial mask) works on AoS values, so incoming fs
values will go SoA->AoS, values from destination will go packed
AoS->SoA->AoS, then do blend, then AoS->SoA->packed AoS which probably
isn't the most efficient way though the shuffles are probably bearable).

Passes piglit fbo-blending-formats (with GL_EXT_packed_float parameter),
still need to verify Inf/NaNs (where most of the complexity in the
conversion comes from actually).

v2: drop the (very bogus) rgb9e5 part, and do component extraction
in the helper code for r11g11b10 to float conversion, making the code
slightly more compact (suggested by Jose), now that there are no other
callers left this works quite well. (Could do the same for the
opposite way but it's less than ideal there, final part of packing
needs to be done in caller anyway and there'd be another conditional.)

v3: minor style and comment fixes. Also fix a potential issue with
negative zero being potentially returned by max(src, zero) as we
don't have well-defined min/max behavior (fortunately no additonal cost).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-03-22 20:10:53 +01:00
Michel Dänzer
31009b4521 r600g: Honour legacy debugging environment variables
This helps minimize confusion / effort when moving between branches or
helping others.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-03-22 10:29:49 +01:00
Rob Clark
eab8d6cbdb freedreno: add pipe->blit
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-21 17:33:51 -04:00
Paul Berry
eea30dff43 i965: Add a driconf option to disable flush throttling.
Normally when submitting the first batch buffer after a flush, we
check whether the GPU has completed processing of the first batch
buffer of the previous frame.  If it hasn't, we wait for it to finish
before submitting any more batches.  This prevents GPU-heavy and
CPU-light applications from racing too far ahead of the current frame,
but at the expense of possibly lower frame rates.  Sometimes when
benchmarking we want to disable this mechanism.

This patch adds the driconf option "disable_throttling" to disable the
throttling mechanism.

Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-21 13:24:43 -07:00
Matt Turner
12dc4be8a6 mesa: Implement TEXTURE_IMMUTABLE_LEVELS for ES 3.0.
NOTE: This is a candidate for the 9.1 branch.
Fixes piglit's texture-immutable-levels test.
Reported-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-03-21 11:04:41 -07:00
Adam Jackson
38aa8ec937 glx: Build with VISIBILITY_CFLAGS in automake
Note: This is a candidate for the stable branches.

Signed-off-by: Adam Jackson <ajax@redhat.com>
2013-03-21 13:21:18 -04:00
Brian Paul
10393038f8 softpipe: silence some asst. MSVC type warnings in sp_tex_sample.c 2013-03-21 09:24:35 -06:00
Brian Paul
b2d3f364db softpipe: silence some MSVC signed/unsigned warnings 2013-03-21 09:24:35 -06:00
Brian Paul
2e3200d463 softpipe: silence some MSVC float/double warnings 2013-03-21 09:24:35 -06:00
Brian Paul
f7b07fd25c rbug: silence some MSVC signed/unsigned warnings 2013-03-21 09:24:35 -06:00
Brian Paul
bfc8b8fac5 postprocess: silence some MSVC float/int warnings 2013-03-21 09:24:35 -06:00
Brian Paul
8bd5692a5d meta: fix incorrect slice, r coordinate computation
The arithmetic to convert a 3D texture slice to an R coordinate was
incorrect.  Found when MSVC warned of a divide by zero.

Note that we don't actually ever hit this path.  We don't decompress
slices of 3D textures and we don't support 3D mipmap generation yet.
2013-03-21 09:24:35 -06:00
Brian Paul
a940c93aac vega: fix MSVC warning about missing return statement 2013-03-21 09:24:35 -06:00
Brian Paul
52edca9df9 meta: minor indentation fix 2013-03-21 08:28:26 -06:00
Michel Dänzer
032e5548b3 radeonsi: Emit pixel shader state even when only the vertex shader changed
Fixes random failures with piglit glsl-max-varyings.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Christian König <christian.koenig@amd.com>
2013-03-21 15:12:31 +01:00
Kenneth Graunke
d24819dce8 i965/vs: Add IR dumping for immediates.
This makes dump_instructions more useful.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-20 10:40:44 -07:00
Kenneth Graunke
095c3755ee glsl: Add built-in functions for GLSL 1.50.
This makes basic built-in functions work in GLSL 1.50.  It supports
everything except the new Geometry Shader functions.

The new 150.glsl file is 140.glsl plus ARB_texture_multisample.glsl;
150.frag is identical to 140.frag except for the #version bump.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:40 -07:00
Kenneth Graunke
bcdda04349 glsl: Add sampler2DMS/sampler2DMSArray types to GLSL 1.50.
GLSL 1.50 includes support for the new sampler types introduced by
the ARB_texture_multisample extension.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:38 -07:00
Kenneth Graunke
f1ca2ed538 glsl: Bump standalone compiler versions to 1.50.
The version bumps are necessary in order to compile built-ins for 1.50.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-03-20 10:38:20 -07:00
Kenneth Graunke
d86efc075e i965: Don't use texture swizzling to force alpha to 1.0 if unnecessary.
Commit 33599433c7 began setting the texture swizzle mode to XYZ1 for
RED, RG, and RGB textures in order to force alpha to 1.0 in case we
actually stored the texture as RGBA.

This had a unforseen performance implication: the shader precompile
assumes that the texture swizzle mode will be XYZW for non-shadow
sampler types.  By setting it to XYZ1, this means every shader used with
a RED, RG, or RGB texture has to be recompiled.  This is a very common
case.

Unfortunately, there's no way to improve the precompile, since RGBA
textures still need XYZW, and there's no way to know by looking at
the shader source what texture formats might be used.

However, we only need to smash alpha to 1.0 if the texture's memory
format actually has alpha bits.  If not, the sampler already returns 1.0
for us without any special swizzling.  XRGB8888, for example, is a very
common case where this occurs.

This partially fixes a performance regression since commit 33599433c7.
More work is required to fully fix it in all cases.  This at least helps
Warsow.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Carl Worth <cworth@cworth.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-20 10:37:34 -07:00
Kenneth Graunke
2dd22130cd i965: Don't print a fatal-looking message if intelCreateContext fails.
With the old context creation mechanism, an application asked the GL to
give it a context.  Failing to produce a context was a fatal error.

Now, with GLX_ARB_create_context, the application can request a specific
version.  If it's higher than the maximum version we support, context
creation will fail.  But this is a normal error that applications
recover from.

In particular, the new glxinfo tries to create OpenGL 4.3, 4.2, 4.1,
4.0, 3.3, and 3.2 contexts before finally succeeding at creating a 3.1
context.  This led to it printing the following message 6 times:
"brwCreateContext: failed to init intel context"

There's no need to alarm users (and developers) with such a message.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-20 10:37:34 -07:00
Eric Anholt
1f112ccf02 i965/gen7: Align all depth miplevels to 8 in the X direction.
On an INTEL_DEBUG=perf piglit run on IVB, reduces the instances of "HW
workaround: blit" (the printouts from the misaligned-depth workaround
blits) from 725 to 675.

It doesn't totally eliminate the workaround blit, because we still have
problems with Y offsets that we can't fix (since texturing can only align
miplevels up to 2 or 4, not 8).

No regressions on piglit/es3conform on IVB.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-20 10:18:44 -07:00
Christoph Bumiller
529dbbfcf7 nvc0: fix max varying count, move CLIPVERTEX,FOG out of the way
The card spews an error if I use all 128 generic slots.
Apparently the real limit isn't just dictated by the address space
layout.
2013-03-20 12:25:21 +01:00
Christoph Bumiller
8acaf862df gallium: add TGSI_SEMANTIC_TEXCOORD,PCOORD v3
This makes it possible to identify gl_TexCoord and gl_PointCoord
for drivers where sprite coordinate replacement is restricted.

The new PIPE_CAP_TGSI_TEXCOORD decides whether these varyings
should be hidden behind the GENERIC semantic or not.

With this patch only nvc0 and nv30 will request that they be used.

v2: introduce a CAP so other drivers don't have to bother with
the new semantic

v3: adapt to introduction gl_varying_slot enum
2013-03-20 12:25:21 +01:00
Kristian Høgsberg
939789e48d gallium-egl: Fix compile errors introduced in de315f76a
The commit changed API in a helper library shared by both egl_dri2 and
the gallium egl state tracker, but only egl_dri2 was updated to use the
new interface.

Tested-by: Giulio Camuffo <giuliocamuffo@gmail.com>
2013-03-19 20:17:47 -04:00
Paul Berry
995bbc2256 i965/fs: Avoid unnecessary recompiles due to POS bit of proj_attrib_mask.
Previous to this patch, when using fixed function fragment shading,
bit VARYING_BIT_POS of brw_wm_prog_key::proj_attrib_mask was being set
differently during precompiles and normal usage.  During precompiles
it was being set only if the fragment shader reads from window
position (which it never does), so it was always being set to 0.
During normal usage it was being set if the vertex shader writes to
all 4 components of gl_Position (which it usually does), so it was
usually being set to 1.  As a result, we were almost always doing an
extra recompile for the fixed function fragment shader.

The recompile was totally unnecessary, though, because
brw_wm_prog_key::proj_attrib_mask is only consulted for
fs_visitor::emit_general_interpolation(), which isn't used for
VARYING_SLOT_POS.

This patch avoids the unnecessary recompile by always setting bit
VARYING_BIT_POS of brw_wm_prog_key::proj_attrib_mask to 1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-03-19 16:56:58 -07:00
Paul Berry
db81d3b8f7 ff_fragment_shader: Don't do unnecessary (and dangerous) uniform setup.
Previously, right after calling _mesa_glsl_link_shader(), the fixed
function fragment shader code made several calls with the ostensible
purpose of setting up uniforms for the fragment shader it just
created.

These calls are unnecessary, since _mesa_glsl_link_shader() calls
driver->LinkShader(), which takes care of calling these functions (or
their equivalent).  Also, they are dangerous to call after
_mesa_glsl_link_shader() has returned, because on back-ends such as
i965 which do precompilation, _mesa_glsl_link_shader() may have
already cached pointers to the existing uniform structures; attempting
to set up the uniforms again invalidates those cached pointers.

It was only by sheer coincidence that this wasn't manifesting itself
as a bug.  It turns out that i965's precompile mechanism was always
setting bit 0 of brw_wm_prog_key::proj_attrib_mask to 0 for fixed
function fragment shaders, but during normal usage this bit usually
gets set to 1.  As a result, the precompiled shader (with its invalid
uniform pointers) was not being used.

I'm about to introduce some changes that cause bit 0 of
proj_attrib_mask to be set consistently between precompilation and
normal usage, so to avoid regressions I need to get rid of the
dangerous duplicate uniform setup code first.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-03-19 16:56:56 -07:00
Paul Berry
0af56c9d53 i965: Avoid unnecessary copy when depthstencil workaround invoked by clear.
Since apps typically begin rendering with a call to glClear(), it is
likely that when brw_workaround_depthstencil_alignment() moves a
miplevel to a temporary buffer, it can avoid doing a blit, since the
contents of the miplevel are about to be erased.

This patch adds the necessary plumbing to determine when
brw_workaround_depthstencil_alignment() is being called as a
consequence of glClear(), and avoids the unnecessary blit when it is
safe to do so.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

v2: Eliminate unnecessary call to _mesa_is_depthstencil_format().  Fix
handling of depth buffer in depth/stencil format.

v3: Use correct bitfields for clear_mask.  Fix handling of depth
buffer in depth/stencil format when hardware uses separate stencil.
When invalidating, make sure we still reassociate the image to the new
miptree.

Reviewed-by: Eric Anholt <eric@anholt.net>
2013-03-19 16:56:51 -07:00
Alex Deucher
49c1fc7044 r600g: don't emit SQ_DYN_GPR_RESOURCE_LIMIT_1 on cayman
Doesn't exist on the asic and will cause a CS rejection
if VM is disabled.

Note: this is a candidate for the 9.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-19 18:13:27 -04:00
Alex Deucher
a9914117ea r600g: emit DB_SRESULTS_COMPARE_STATE0 on r6xx/r7xx
Not using HiS yet, but matches what we do on evergreen+.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-03-19 18:13:26 -04:00
Brian Paul
c45d22e26a winsys/svga: improve error/debug message output
Use vmw_printf() just for extra debugging info (off by default).
Use vmw_error() for real errors/failures/etc that we definitely
want to report.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-03-19 15:18:38 -06:00
Brian Paul
460a4444e8 tgsi: fix uninitialized declaration array fields
Fixes a few regressions since the TGSI array changes.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-03-19 15:15:37 -06:00
Kristian Høgsberg
1670737436 egl_dri2: Lower __DRI_IMAGE version requirement back to 1
We check the extension version manually instead and verify that we have
the createImageFromFds function before enabling prime fd passing.
2013-03-19 16:13:38 -04:00
Maarten Lankhorst
7c3d8301af radeon/llvm: Do not link against libgallium when building statically.
NOTE: This is a candidate for the 9.1 branch.

Tested-by: Vincent Lejeune <vljn@ovi.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
2013-03-19 20:20:33 +01:00
Matt Turner
322c840bea gles2: Add an ABI-check test
Checks that no functions are exported that are not part of the ABI.

Note that currently we are exporting functions that are aliased to
functions that are part of the ABI. They shouldn't be exported, but the
XML descriptions don't adequately describe this case.
2013-03-19 12:04:32 -07:00
Matt Turner
569bd281c1 gles1: Add an ABI-check test
Checks that no functions are exported that are not part of the ABI.

Note that currently we are exporting functions that are aliased to
functions that are part of the ABI. They shouldn't be exported, but the
XML descriptions don't adequately describe this case.
2013-03-19 12:04:31 -07:00
Andreas Boll
182895c4e6 gallium/egl: fix out-of-tree build
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/15-fix-oot-build.diff;h=7040999a22d3937d0578cfd85ee2c71d7dc614bb;hb=refs/heads/ubuntu%2B1

NOTE: This is a candidate for the 9.1 branch.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:38 +01:00
Andreas Boll
92e6260c19 osmesa: fix out-of-tree build
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/14-fix-osmesa-build.diff;h=00581d0e1833c5492d9050e1bf3d5e658cad782e;hb=refs/heads/ubuntu%2B1

v2: Move the added line immediately after -I$(top_srcdir)/src/mapi

NOTE: This is a candidate for the 9.1 and 9.0 branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Reviewed-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:38 +01:00
Andreas Boll
7962f28c43 mesa: use ieee fp on s390 and m68k
Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/02_use-ieee-fp-on-s390-and-m68k.patch;h=d3d6c1d7fec3c72ecf320706167deb61c52636c3;hb=refs/heads/ubuntu%2B1

Fixes Debian bug #349437.

Patch written by David Nusinow.

NOTE: This is a candidate for stable branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
2013-03-19 18:12:37 +01:00
Roland Scheidegger
5af7b45986 gallivm: fix return opcode handling in main function of a shader
If we're in some conditional or loop we must not return, or the code
after the condition is never executed.
(v2): And, we also can't just continue as nothing happened, since the
mask update code would later check if we actually have a mask, so we
need to remember that there was a return in main where we didn't exit
(to illustrate this, a ret in a if clause would cause a mask update
which is still ok as we're in a conditional, but after the endif the
mask update code would drop the mask hence bringing execution back to
pixels which should have their execution mask set to zero by the ret).
Thanks to Christoph Bumiller for figuring this out.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=62357.

Note: This is a candidate for the stable branches.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-03-19 18:04:05 +01:00
Rob Clark
afc1b7c21f freedreno: clear fixes
Some fixes for clearing only depth or only stencil.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-03-19 10:49:30 -04:00
Christian König
90862c8507 radeonsi: enable indirect adressing
Fixing 16 piglit tests.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König
5e616cf2c5 radeonsi: implement indirect adressing of constants
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König
f5298b0a65 radeonsi: switch to using resource destribtors for constants v2
v2: remove superfluous mask, use buffer_size instead of constant

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Christian König
c05483fc00 radeon/llvm: rework input fetch and output store
Cleanup the code and implement indirect addressing.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-03-19 15:16:18 +01:00
Brian Paul
b51f8593d8 tgsi: add initializer data to fix MSVC compile error 2013-03-19 07:55:48 -06:00
Christian König
897303f8ff tgsi: add ArrayID documentation v2
v2: further improve the text with comments from Christoph Bumiller.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König
21190fbd56 tgsi: use separate structure for indirect address v2
To further improve the optimization of source and destination
indirect addressing we need the ability to store a reference
to the declaration of the addressed operands.

Since most of the fields in tgsi_src_register doesn't apply for
an indirect addressing operand replace it with a separate
tgsi_ind_register structure and so make room for extra information.

v2: rename Declaration to ArrayID, put the ArrayID into () instead of []

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00
Christian König
16caeff2a5 tgsi: add ArrayID to declarations
Remember which declarations are declared as "arrays" and so
can be indirectly addressed. ArrayIDs start at 1, cause for
compatibility reasons zero is treaded as no array present.

Signed-off-by: Christian König <christian.koenig@amd.com>
2013-03-19 13:38:32 +01:00