Commit graph

23921 commits

Author SHA1 Message Date
Jakob Bornecrantz
f44f1155a9 gallium-intel: Link dri2 driver with softpipe 2009-04-25 12:56:52 +01:00
Samuel Thibault
d18dd6ad11 GNU/Hurd fixes
Here is a couple of fixes for GNU/Hurd:
- dri_interface.h: no libdrm support either.
- configure.ac:
 - GNU/Hurd is a GNU OS with _GNU_SOURCE and PTHREADS.
 - GNU needs a couple of flags like other OSes

Signed-off-by: Dan Nicholson <dbn.lists@gmail.com>
2009-04-24 19:10:01 -07:00
Ian Romanick
022319b92c intel: Fix more issues with the combined depth-stencil attachment 2009-04-24 16:39:00 -07:00
Ian Romanick
302ba83116 intel: Initialize region ptr to prevent assertion in intel_region_reference 2009-04-24 16:30:13 -07:00
Brian Paul
91eb8baaca tgis: SSE code generator doesn't yet support indirect addressing of temp regs
Fall back to interpreter in this case.
2009-04-24 17:18:02 -06:00
Ian Romanick
f2272b5b2f intel / DRI2: When available, use DRI2GetBuffersWithFormat
This interface gives the driver two important features.  First, it can
allocate the (fake) front-buffer only when needed.  Second, it can
tell the buffer allocator the format of buffers being allocated.  This
enables support for back-buffer and depth-buffer with different bits
per pixel.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
2009-04-24 12:48:20 -07:00
Ian Romanick
dbf87f2312 DRI2: Implement interface for drivers to access DRI2GetBuffersWithFormat
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
2009-04-24 12:48:20 -07:00
Ian Romanick
d8d7b2c395 DRI2: Implement protocol for DRI2GetBuffersWithFormat
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
2009-04-24 12:48:20 -07:00
Jerome Glisse
32d185eb60 r300: fix cliprect values 2009-04-24 19:54:01 +02:00
Brian Paul
1c9786894c mesa: fix up error/warning/debug output newlines
As of commit 23ad86cfb9 all messages go
through output_if_debug().

Add new parameter to output_if_debug() to indicate whether to emit a newline.

_mesa_warning() and _mesa_error() calls should not end their strings with \n.
_mesa_debug() calls should end their text with \n.
2009-04-24 10:50:40 -06:00
Brian Paul
3321b6984e i965: use drm_intel_gem_bo_map/unmap_gtt() when possible, otherwise dri_bo_subdata()
This wraps up the unfinished business from commit a9a363f829
2009-04-24 09:52:05 -06:00
Alan Hourihane
b2a69ae879 demos: ensure display lists are destroyed for next generation 2009-04-24 16:45:36 +01:00
Brian Paul
027ed1b505 mesa: signal _NEW_PROGRAM_CONSTANTS instead of _NEW_PROGRAM
Use _NEW_PROGRAM_CONSTANTS when changing constant/uniform buffer values.
Binding a new program/shader sets both _NEW_PROGRAM and _NEW_PROGRAM_CONSTANTS.
2009-04-24 09:43:44 -06:00
Jerome Glisse
5dec94696e r300: emit cliprect when in dri2 mode 2009-04-24 15:03:23 +02:00
Keith Whitwell
29d9abf72d pipebuffer: don't fail when validating mapped buffers
This can be almost impossible to avoid - hopefully we won't encounter
a situation where this is a true requirement.  Would probably require
drivers to flush between hardware and software vertex processing.
2009-04-24 12:43:04 +01:00
Keith Whitwell
a86ef37655 shadowtex: fflush stdout for cygwin 2009-04-24 12:16:39 +01:00
Jakob Bornecrantz
f4a286e5f5 util: Add more entry points for dumping to bmp 2009-04-24 13:02:26 +02:00
Keith Whitwell
eb5d96968f demos/readpix: add option to draw triangle instead of drawpix 2009-04-24 10:09:14 +01:00
Keith Whitwell
510a44eea7 tests/mipmap_view: add a bunch of keystrokes for testing render-to-texture
Move between mipmaps, render a triangle, reload textures with either
the original arch (and GenMipmaps) or via straightforward glTexImage.
2009-04-24 10:09:14 +01:00
Roland Scheidegger
ff71587b27 i965: fix point size issue
need to clamp point size to user set min/max values, even for constant
point size. Fixes glean pointAtten test.
2009-04-24 02:40:05 +02:00
Brian Paul
1d00399593 mesa: more informative error messages 2009-04-23 17:54:34 -06:00
Brian Paul
a9a363f829 i965: revert part of commit 4f4907d69f
The drm_intel_gem_bo_map_gtt() call that replaced dri_bo_map() is
producing errors like:

intel_bufmgr_gem.c:689: Error preparing buffer map 39 (vp_const_buffer): Invalid argument .

and returning NULL, causing a segfault in the memcpy().

Just reverting until we can get to the root issue...
2009-04-23 17:41:23 -06:00
Roland Scheidegger
ae69a04650 i915: fix fix for anisotropic filtering
forgot to commit the changes to actually support 4x aniso filtering...
2009-04-23 23:10:51 +02:00
Eric Anholt
8374379572 i965: Support drawing to FBO cube faces other than positive X.
Also fixes drawing to 3D texture depth levels.
2009-04-23 11:13:04 -07:00
Eric Anholt
4f4907d69f intel: Take advantage of GL_READ_ONLY_ARB to map to GEM bo_map write flag.
This is a CPU win in general, but in particular reduces the pain of
Mesa's calculation of min/max indices in DrawElements (wtf?).
2009-04-23 11:13:04 -07:00
Michel Dänzer
f3c7d6ff86 gallium: Handle non-NULL data pointer in EXA ModifyPixmapHeader hook.
Need to use the data pointed to for pixmap contents in that case.

Fixes RENDER based text rendering.
2009-04-23 14:47:31 +01:00
Michel Dänzer
e0da812c5b gallium: Make the intel xorg winsys start up with any Intel chipset.
For unsupported devices the screen/context creation should fail cleanly later
on.
2009-04-23 13:19:56 +01:00
Michel Dänzer
13cb8264d8 gallium/intel/gem: Use softpipe rather than i915simple if INTEL_SOFTPIPE is set. 2009-04-23 12:57:46 +01:00
Michel Dänzer
49ba80dff3 gallium: Always include xorg-server.h before other X server headers.
Various breakage otherwise, e.g. _XSERVER64 not being defined on 64 bit leading
to inconsistent definitions of X server internal structs.
2009-04-23 12:20:22 +01:00
Michel Dänzer
17ee25ba6f gallium: Fix up xorg state tracker build. 2009-04-23 12:17:28 +01:00
Brian Paul
6b0c9366a3 mesa: minor state-update changes in histogram code
Call FLUSH_VERTICES() in _mesa_Histogram().
No need to signal _NEW_PIXEL in ResetHistogram(), ResetMinmax().
2009-04-22 16:41:05 -06:00
Brian Paul
725d50601c mesa: fix comment typo 2009-04-22 16:38:04 -06:00
Brian Paul
c5a97eda32 gallium: license, copyright 2009-04-22 15:12:22 -06:00
Brian Paul
984f2bb629 st: comments, license, copyright 2009-04-22 15:10:36 -06:00
Brian Paul
8ee6ab6acb mesa: fix _mesa_dump_textures(), add null ptr check
Calling _mesa_dump_textures() deleted the textures... oops!!!
2009-04-22 15:03:05 -06:00
Brian Paul
ebfbd8c4fe i965: disable debug printf 2009-04-22 13:46:58 -06:00
Brian Paul
ac22178eb0 i965: enable VS constant buffers
In the VS constants can now be handled in two different ways:
1. If there's room in the GRF, put constants there.  They're preloaded from
   the CURBE prior to VS execution.  This is the historical approach.  The
   problem is the GRF may not have room for all the shader's constants and
   temps and misc registers.  Hence...
2. Use a separate constant buffer which is read from using a READ message.
   This allows a very large number of constants and frees up GRF regs for
   shader temporaries.  This is the new approach.  May be a little slower
   than 1.

1 vs. 2 is chosen according to how many constants and temps the shader needs.
2009-04-22 11:52:16 -06:00
Brian Paul
5c8fb6acc1 i965: define BRW_MAX_GRF 2009-04-22 11:47:59 -06:00
Brian Paul
21a422d97e i965: remove old code to init surface-related cache IDs
These types are only found in the new surface state cache now.
2009-04-22 11:29:49 -06:00
Brian Paul
c0c58cf5cf i965: comments, reformatting 2009-04-22 11:28:24 -06:00
Brian Paul
fa92756400 mesa: Fix buffer overflow when parsing generic vertex attributes. 2009-04-22 18:18:29 +01:00
Brian Paul
4843e54fc6 i965: actually use the new, second surface state cache 2009-04-22 11:12:07 -06:00
Brian Paul
f9af97c7a5 i965: checkpoint commit: use two state caches instead of one
The new, second cache will only be used for surface-related items.
Since we can create many surfaces the original, single cache could get
filled quickly.  When we cleared it, we had to regenerate shaders, etc.
With two caches, we can avoid doing that.
2009-04-22 11:08:46 -06:00
Brian Paul
a071a8d2e7 i965: remove unused state atom entries 2009-04-22 10:44:36 -06:00
Roland Scheidegger
50853be894 intel: fix max anisotropy supported
i915 actually supports up to 4 (according to header file - not tested),
i965 up to 16 (code already handled this but slightly broken), so don't use 2
for all chips, even though angular dependency is very high.
2009-04-22 17:38:06 +02:00
Brian Paul
f428255bde i965: the brw_constant_buffer state atom is no longer dynamic
No more dynamic atoms so we can simplify the state validation code a little.
2009-04-22 09:23:15 -06:00
Brian Paul
e5681fc176 i965: add _NEW_PROGRAM_CONSTANTS to mesa_bits[] list 2009-04-22 09:16:21 -06:00
Brian Paul
a36dd5d54e i915: check the new _NEW_PROGRAM_CONSTANT flag 2009-04-22 09:14:53 -06:00
Brian Paul
1dbab84e21 i965: use _NEW_PROGRAM_CONSTANTS and always create new const buffers
When program constants change we create a new VS constant buffer
instead of re-using the old one.  This allows us to have several
const buffers in flight with vertex rendering.
2009-04-22 09:14:16 -06:00
Brian Paul
6b6a23c0f7 i965: updates to some debug code 2009-04-22 09:07:46 -06:00