Commit graph

93427 commits

Author SHA1 Message Date
Lionel Landwerlin
c77d98ef32 intel: common: express timestamps units in frequency
Rather than storing the period as a double that looses some precision.

Also fixes the Gen9LP timestamp frequency which is no 19200123 but
19200000 as pointed by Ville :

https://lists.freedesktop.org/archives/intel-gfx/2017-April/125126.html

Finally add the Cannonlake timestamp frequency.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-19 22:11:00 +01:00
Lionel Landwerlin
e5743ee014 i965: convert MI_REPORT_PERF_COUNT to genxml
Also make it available from gen7 only to gen7+.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-19 22:11:00 +01:00
Lionel Landwerlin
a26f8d99a6 i965: perf: fix codegen with single operand equation
We did support single value operand equations, but not single variable
operand ones. In particular we were failing on "$Sampler0Bottleneck".

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-19 22:11:00 +01:00
Lionel Landwerlin
5f2fe9302c intel: common: add flag to identify platforms by name
The perf infrastructure needs to identify specific platforms, not just
generations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-19 22:11:00 +01:00
Topi Pohjolainen
b539f6958e i965/wm: Use stored hiz surface instead of creating copy
Now the last user of intel_miptree_get_aux_isl_surf() is gone.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
7e4ea22762 i965/blorp: Use hiz surface instead of creating copy
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
f60e23cb57 i965/miptree/gen7+: Use isl for hiz layouts
v2: Use better assert by checking isl_surf_get_hiz_surf()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
67b44a8423 i965/miptree: Drop BO_ALLOC_FOR_RENDER in intel_miptree_alloc_mcs()
because buffers get unconditionally initialised by cpu writing.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
1a43d774b6 i965/miptree: Use isl for mcs layouts
and pass the ccs isl surface to blorp instead of creating a
copy.

v2 (Jason): Explain ccs change and use better assert checking
            isl_surf_get_mcs_surf()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
31bd461816 i965/miptree: Refactor aux surface allocation
v2 (Jason): Drop unused argument in intel_alloc_aux_buffer() and
            move assignment of "buf->surf" in intel_alloc_aux_buffer()
            into this patch.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
7e25410563 i965/gen6: Use isl for hiz
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:57 +03:00
Topi Pohjolainen
59e5519afa i965/miptree: Refactor isl aux usage resolver
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:56 +03:00
Topi Pohjolainen
d8a4b8bc88 i965/gen6: Use isl for stencil surfaces
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:56 +03:00
Topi Pohjolainen
0e816c9deb i965/miptree: Prepare range getter for isl based
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:56 +03:00
Topi Pohjolainen
a808eb172a i965/miptree: Prepare stencil mapping for isl based
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:56 +03:00
Topi Pohjolainen
7294cde750 i965/blorp: Prepare for isl based miptrees
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:56 +03:00
Topi Pohjolainen
3cf470f2b6 i965: Add isl based miptree creator
v2: Use new brw_bo_alloc_tiled() interface

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:57:44 +03:00
Topi Pohjolainen
5d125f999e i965/miptree: Add option to resolve offsets using isl_surf
v2 (Nanley): Add comment telling why "level -= mt->first_level"

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
71ac909137 i965: Prepare slice copy for isl based miptrees
v2 (Jason): Fix a helper variable only used for assert -
            open code instead.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
de158c1e43 i965/tex: Prepare image update for isl based miptrees
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
bb9c4113dc i965: Prepare framebuffer validator for isl based miptrees
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
c05817ffc5 i965: Prepare slice validator for isl based miptrees
v2 (Nanley): Minify depth in case of 3D surface. Also moved to
             .c file to get minify() without additional
             header inclusions

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
143e3a679a i965: Prepare image validation for isl based miptrees
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
41a7a0e548 i965: Prepare up/downsampling for isl based miptrees
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
02fa622037 i965/miptree: Add isl surface
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
5a3105fe9a i965: Add helper for converting isl tiling to bufmgr tiling
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:45 +03:00
Topi Pohjolainen
a7480d3f03 i965/miptree: Refactor mapping table alloc
v2 (Nanley): Use minify() instead of direct shift

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:41:39 +03:00
Topi Pohjolainen
335543699a i965/gen6: Declare minify(depth, level) layers for 3D stencil
Keeps following patch refactoring the table allocation
non-functional.

Suggested-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:18:53 +03:00
Topi Pohjolainen
a5e1c9f1d5 i965/gen4: Add support for single layer in alignment workaround
On gen < 6 one doesn't have level or layer specifiers available
for render and depth targets. In order to support rendering to
specific level/layer, driver needs to manually offset the surface
to the desired slice.
There are, however, alignment restrictions to respect as well and
in come cases the only option is to use temporary single slice
surface which driver copies after rendering to the full miptree.

Current alignment workaround introduces new texture images which
are added to the parent texture object. Texture validation later
on copies the additional levels back to the surface that contains
the full mipmap.
This only works for non-arrayed surfaces and driver currently
creates new arrayed images in vain - individual layers within the
newly created are still unaligned the same as before.

This patch drops this mechanism and instead attaches single
temporary slice into the render buffer. This gets immediately
copied back to the mipmapped and/or arrayed surface just after
the render is done.

Sitting on top of earlier series cleaning up the depth buffer
state, this patch additionally fixes the following piglit tests:

    arb_framebuffer_object.fbo-generatemipmap-cubemap.g965m64
    arb_texture_cube_map.copyteximage cube.g965m64
    arb_texture_cube_map.copyteximage cube.ilkm64
    arb_pixel_buffer_object.texsubimage array pbo.g965m64
    ext_framebuffer_object.fbo-cubemap.g965m64
    ext_texture_array.copyteximage 1d_array.g45m64
    ext_texture_array.copyteximage 1d_array.g965m64
    ext_texture_array.copyteximage 1d_array.ilkm64
    ext_texture_array.copyteximage 2d_array.g45m64
    ext_texture_array.copyteximage 2d_array.g965m64
    ext_texture_array.copyteximage 2d_array.ilkm64
    ext_texture_array.fbo-array.g965m64
    ext_texture_array.fbo-generatemipmap-array.g965m64
    ext_texture_array.gen-mipmap.g965m64

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:18:53 +03:00
Topi Pohjolainen
a9c59c10a5 i965/miptree: Separate src and dst slice specifiers in slice copy
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:18:53 +03:00
Topi Pohjolainen
920c8e89c5 i965/miptree: Clarify face/level/layer in slice copy
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-19 22:18:53 +03:00
Jonas Kulla
a52ee32a9a anv: Fix L3 cache programming on Bay Trail
Valid values for URBAllocation start at 32, so substract that
before programming the register.

This was missed when porting from the GL driver.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-19 12:05:52 -07:00
Marek Olšák
3fc99f1299 radeonsi: fix dumping shader descriptors into ddebug logs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:16:20 +02:00
Marek Olšák
f9dc29a9a5 radeonsi: add a workaround for inexact SNORM8 blitting again
GFX9 is affected.

We only have tests for GL_x_SNORM where x is R8, RG8, RGB8, and RGBA8.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
0f827b51c0 radeonsi/gfx9: fix TC-compatible stencil compression
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
8a264dd829 radeonsi/gfx9: fix TXF_LZ with 1D textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
353b60cab5 radeonsi/gfx9: disable sparse buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
064f07fef3 ac/sid.h: don't use parentheses in PKT3_RELEASE_MEM definition
The parses skips the line if it contains parentheses.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
ed291cea3d ac: parse EVENT_WRITE_EOP, RELEASE_MEM, WAIT_REG_MEM, NOWHERE
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:15:36 +02:00
Marek Olšák
66b6babbea st/mesa: simplify returning GL_VENDOR
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:09:52 +02:00
Marek Olšák
92b4ca4550 st/mesa: remove the "Gallium 0.4 on" prefix from GL_RENDERER
If you want to keep it for your driver, please raise your hand.
The prefix will probably have to be added into the driver instead of here.

I cringe when I look at my long renderer string:
  Gallium 0.4 on AMD Radeon R9 Fury Series (DRM 3.17.0 / 4.11.0-staging-01277-gab25a9e, LLVM 5.0.0)

I'm sincerely sorry for all apps that detect Mesa by expecting "Gallium"
in the string.

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-06-19 20:09:52 +02:00
Marek Olšák
61dc2c964e st/mesa: don't update MSAA states for GL_FRAMEBUFFER_SRGB
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 20:09:52 +02:00
Kenneth Graunke
6a7c5257ca i965: Ignore anisotropic filtering in nearest mode.
This fixes both Europa Universalis IV and Stellaris rendering on i965.
This was tested on SKL.

This fix was discovered by Jakub Szuppe at Stream HPC
(https://streamhpc.com/).

bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96958
bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95530
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
2017-06-19 10:09:06 -07:00
Iago Toral Quiroga
b70d6a2de1 glsl: gl_Max{Vertex,Fragment}UniformComponents exist in all desktop GL versions
The current implementation assumed that these were replaced in GLSL >= 4.10
by gl_Max{Vertex,Fragment}UniformVectors, however this is not true: both
built-ins should be produced from GLSL 4.10 onwards.

This was raised by new CTS tests that are in development.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-19 14:43:54 +02:00
Emil Velikov
4a7222518d docs: update calendar, add news item and link release notes for 17.1.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19 12:23:07 +01:00
Emil Velikov
42098bf9b2 docs: add sha256 checksums for 17.1.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19 12:20:52 +01:00
Emil Velikov
b55dfb7be3 docs: add release notes for 17.1.3
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-19 12:20:51 +01:00
Nicolai Hähnle
b28938ffce st/glsl_to_tgsi: use correct writemask when converting generic intrinsics
This fixes a bug when lowering ballotARB: previously, using writemask 0xf,
emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers
to cover 4 64-bit channels. This could trample over other a neighbouring
temporary.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-19 12:07:05 +02:00
Nicolai Hähnle
25e5534734 gallium/radeon/gfx9: fix PBO texture uploads to compressed textures
st/mesa creates a surface that reinterprets the compressed blocks as
RGBA16UI or RGBA32UI. We have to adjust width0 & height0 accordingly to
avoid out-of-bounds memory accesses by CB.

Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-19 12:05:15 +02:00
Nicolai Hähnle
4d5bb1b987 r600: fix off-by-one in egd_tables.py
Port of the corresponding fix in sid_tables.py.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-19 12:05:12 +02:00