Commit graph

11468 commits

Author SHA1 Message Date
Samuel Pitoiset
ab6147e8ef radv/meta: fix depth/stencil resolves with different regions
This is possible since VK_KHR_maintenance10.

This fixes new VKCTS coverage in
dEQP-VK.pipeline.*.multisample.m10_resolve.*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39956>
2026-02-24 07:09:17 +00:00
Natalie Vock
b08f9f192c radv/nir: Correctly handle workgroup sizes not aligned to 32
Since the stride is always 32 dwords, we need to treat the workgroup
size as multiples of that value. Using MAX2() only works for cases where
the workgroup size is less than 32, which was hit by some CTS with 1x1
workgroups.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39981>
2026-02-23 12:42:24 +00:00
Samuel Pitoiset
7d03a1fc5b radv: skip some operations when the image is already zero-initialized
Some checks are pending
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No need to clear to zero because it should already be cleared.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40012>
2026-02-23 09:06:21 +00:00
Samuel Pitoiset
837078b8d5 radv: fix potential corruption after FMASK decompression on GFX6-8
While reworking image resolves completely in RADV, I found a very weird
bug where the only fix was to emit caches immediately after
decompressing the source resolve image (after FMASK_DECOMPRESS).

I have been struggling this for few hours and figured that it was
something related to context rolls (ie. as long the context was rolled
out, emitting the flushes immediately was required).

It turns out this was a known hardware bug on GFX6 that was implemented
in PAL. Though PAL only applies on GFX6 but GFX7-8 are also affected
based on my testing. Note that RadeonSI flushes CB_META too.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39959>
2026-02-23 08:32:53 +00:00
Samuel Pitoiset
8b5296b01c radv: simplify buffer-to-image and image-to-image operations for 96-bit formats
It's possible to use the existing shaders with a small tweak. This
removes a bunch of code in meta.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39935>
2026-02-19 07:12:47 +00:00
Natalie Vock
47e4a68a83 radv: Initialize nir_lower_io_to_scalar progress variable
The NIR_PASS macro only overwrites this when the pass actually makes
progress. If the pass doesn't make progress, the variable stays
uninitialized.

Clang correctly spots this and warns about it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39968>
2026-02-18 21:44:49 +00:00
Natalie Vock
59a397793e radv/rt: Only use ds_bvh_stack_rtn if the stack base is possible to encode
The hardware only provides 13 bits for encoding the stack base (in
dwords). That translates to the stack base being required to be below
8192 dwords, or 32kB. It's possible to exceed this - LDS is 64kB after
all. Add an explicit check to make sure we don't end up with offsets
that overflow the hw's address fields. This fixes Metro Exodus Enhanced
Edition, which was using ray queries in a 1024-thread sized workgroup,
resulting in exactly 64kB of LDS being required for the stack.

This check isn't required for RT pipelines as we always use 32 or 64
wide workgroups with no other LDS used, so it's impossible to reach this
stack base limit.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39691>
2026-02-18 19:12:18 +00:00
Konstantin Seurer
ae84d41d48 radv/meta: Rework saving/restoring state
Some checks are pending
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The current approach of explicitly saving/restoring some states is
unnecessarily complicated and inefficient. For example, some meta OPs
that use memory fills/copies will have nested save/restores. This patch
is the first step towards avoiding unnecessary state re-emits around
meta OPs.

The changes are:
- Move radv_meta_saved_state to radv_cmd_buffer::state
- Add radv_meta_begin/end helpers that initialize radv_meta_saved_state
and restore states used by the meta OP
- Remove all explicit saves/restores, use the new helpers

radv_meta_begin/end is called inside the entrypoint and not some nested
helper function which means that state is only restored once per meta
OP.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39774>
2026-02-18 09:37:55 +01:00
Konstantin Seurer
d3cb2978b8 radv/meta: Add and use helpers for setting state
It's less code and allows the next commit to track which states a meta
command uses.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39774>
2026-02-18 09:37:30 +01:00
Samuel Pitoiset
090b67a163 vulkan/runtime: add support for ETC2 emulation with copy_memory_indirect
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39908>
2026-02-18 07:04:43 +00:00
Samuel Pitoiset
95c4d8d726 radv/meta: rework get_image_stride_for_96bit() and make it non-static
Some checks are pending
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
c1a507bf42 radv/meta: rename r32g32b32 to 96bit
Tt's shorter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
29ce18cb6f radv/meta: rename some variables for btoi 96-bit shader
To match push constants.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Samuel Pitoiset
9c90622c94 radv: remove a redundant check in radv_image_is_renderable()
RADEON_SURF_NO_RENDER_TARGET is already sets for such an image.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39909>
2026-02-17 10:39:01 +00:00
Rhys Perry
e4b8ade092 ac/nir,radv,radeonsi: flip branches to avoid waitcnts
fossil-db (navi31):
Totals from 5123 (6.42% of 79825) affected shaders:
Instrs: 12712435 -> 12703672 (-0.07%); split: -0.12%, +0.05%
CodeSize: 67068852 -> 67033244 (-0.05%); split: -0.10%, +0.05%
VGPRs: 363896 -> 363956 (+0.02%)
SpillSGPRs: 5035 -> 5074 (+0.77%); split: -0.83%, +1.61%
Latency: 115048972 -> 111944013 (-2.70%); split: -2.89%, +0.19%
InvThroughput: 19102126 -> 18696069 (-2.13%); split: -2.34%, +0.22%
VClause: 258693 -> 258770 (+0.03%); split: -0.01%, +0.04%
SClause: 346271 -> 346225 (-0.01%); split: -0.02%, +0.00%
Copies: 1040815 -> 1042017 (+0.12%); split: -0.23%, +0.34%
Branches: 332467 -> 332565 (+0.03%); split: -0.04%, +0.07%
PreSGPRs: 304888 -> 304699 (-0.06%); split: -0.10%, +0.04%
PreVGPRs: 296652 -> 296654 (+0.00%)
VALU: 7591803 -> 7594601 (+0.04%); split: -0.01%, +0.05%
SALU: 1454420 -> 1455764 (+0.09%); split: -0.24%, +0.33%
VOPD: 1826 -> 1810 (-0.88%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38262>
2026-02-16 19:39:43 +00:00
Rhys Perry
6963c8dd80 radv,aco/gfx11: preserve s2 when NGG_WAVE_ID_EN=1
Some checks are pending
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According to the ISA doc, this is needed for hang recovery.

This works by just avoiding putting temporaries in s0-3 unless they're
precolored there.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (radv)
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39720>
2026-02-16 14:33:58 +00:00
Rhys Perry
f9c11a8e15 radv: add ngg_wave_id_en to radv_shader_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39720>
2026-02-16 14:33:57 +00:00
Marek Olšák
61a96be494 nir/lower_non_uniform_access: add an option not to lower tex & image queries
AMD can do non-uniform queries. The RADV change will be in a separate commit.

NFC for drivers.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39743>
2026-02-16 12:59:36 +00:00
Samuel Pitoiset
47841c1142 radv/meta: remove useless DCC decompressions for image<->buffer
It's not needed to decompress DCC when formats are compatible each
other, this basically removes all decompressions on GFX11-GFX11.5.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39888>
2026-02-16 07:40:13 +00:00
Marek Olšák
d1e6a5c1c8 ac: lower load_num_workgroups in NIR
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
2026-02-13 15:33:19 +00:00
Marek Olšák
1e11e83d1c ac/nir: add ac_nir_lower_intrinsics_to_args_options structure
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
2026-02-13 15:33:19 +00:00
Marek Olšák
0a9bdcac79 ac: lower load_workgroup_ids for ACO in NIR
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39638>
2026-02-13 15:33:19 +00:00
Samuel Pitoiset
1be4ffdff9 ac,radv,radeonsi: use correct swizzle/pitch for depth-only images with SDMA
Some checks are pending
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This fixes new VKCTS coverage
dEQP-VK.api.copy_and_blit.core.use_after_copy.*.

is_stencil isn't set for RadeonSI because it doesn't do SDMA copies
with Z/S.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39800>
2026-02-13 07:52:29 +01:00
Samuel Pitoiset
4ec3840184 radv/meta: move the barrier for depth/stencil compute resolves outside
Some checks are pending
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This barrier is only needed for rendering resolves (ie. not for
vkCmdResolveImage()). It's similar to color compute resolves now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:20 +00:00
Samuel Pitoiset
3e41b04de9 radv/meta: optimize a barrier with depth/stencil compute resolves
The compute resolve doesn't use HTILE of the destination image, so the
potential HTILE clear can run in parallel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:20 +00:00
Samuel Pitoiset
85a3f7816d radv/meta: add HTILE support to radv_fixup_resolve_dst_metadata()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:20 +00:00
Samuel Pitoiset
6a454dabda radv/meta: stop fixing up HTILE after a partial resolve using compute
The decompression pass already resets HTILE to its uncompressed state,
so this is just redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:19 +00:00
Samuel Pitoiset
c3cc6fd051 radv: cleanup barriers after a depth/stencil expand
Synchronize in radv_expand_depth_stencil() is more robust.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:19 +00:00
Samuel Pitoiset
7dd7731ac7 radv/meta: fix partial depth/stencil resolves with compute
HTILE must be decompressed for partial resolves when the hw doesn't
write the decompressed DWORD to HTILE. The driver must also
synchronize the depth/stencil expand if using graphics (the compute
path is already correctly synchronized in the helper).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
2026-02-12 20:17:18 +00:00
David Rosca
5d4f977573 radv/video: Support UVD decode on hawaii and older
H264 requires extra allocation in DPB. Use helper function
to get the required size, same as we do for encode.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:27 +00:00
David Rosca
7ad4f501fa radv: Drop videoarraypath debug option
It's not really usefull and only works for H264/5.
On AV1/VP9 it would cause hang.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
19a8b7121e radv/video: Remove old VCN and UVD decode implementation
Only ac_video_dec is now used.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
Benjamin Cheng
6aed906410 radv/video: Use ac_video_dec for decode
Supports VCN and UVD.

Co-authored-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
Samuel Pitoiset
02a2451e1f radv: rename radv_image_use_dcc_image_stores()
To radv_image_compress_dcc_on_image_stores() because it seems more
informative.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:26 +00:00
Samuel Pitoiset
d58080f787 radv/meta: add a function to fixup DCC metadata for compute resolves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
ed166804f6 radv/meta: remove an useless barrier when fixing up DCC for compute resolves
The resolve operation doesn't use DCC of the destination image, so the
clear can run in parallel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
a673c9e414 radv/meta: stop fixing up DCC after a partial resolve using compute
The decompression pass already resets DCC to its uncompressed state,
so this is just redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Konstantin Seurer
f574de2249 radv: Fix setting the viewport for depth stencil FS resolves
Some checks are pending
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Fixes: 704fbbb ("radv/meta: rework depth/stencil resolves using graphics")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Konstantin Seurer
bc86c5adae radv: Stop saving descriptors before acceleration structure OPs
They only use compute+constants.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Rhys Perry
c811348dc2 radv: include ahit/isec shaders in radv_get_shader_from_executable_index
This is necessary for GetPipelineExecutablePropertiesKHR, RADV_DEBUG and
fossil-db.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39827>
2026-02-12 11:31:37 +00:00
Samuel Pitoiset
9a6ec08960 radv: enable trimming FS color exports for internal shaders
Some checks are pending
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This should be safe now, and potentially more optimal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39786>
2026-02-12 07:33:58 +00:00
Samuel Pitoiset
dbad9144f2 radv/meta: use R32G32 formats for R64 slow color clears
This is required because CB doesn't support 64-bit formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39786>
2026-02-12 07:33:58 +00:00
Samuel Pitoiset
db89f94441 radv/meta: stop trying to reduce the number of format variants
Now that we have a solid logic for caching meta objects, trying to
reduce the number of format variants isn't super useful. In practice,
the shaders would be cached on disk, so this would only allocate few
more bytes for the meta objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39786>
2026-02-12 07:33:58 +00:00
Samuel Pitoiset
e58ef1b3bc radv: do not set the resume rendering flag for custom resolves
It's not a resume operation, it's a complete new rendering pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:56 +00:00
Samuel Pitoiset
cbf981e99a radv: do not resolve when rendering is suspended
The Vulkan spec says:
    "Store and resolve operations are only performed at the end of a
     render pass instance that does not specify the
     VK_RENDERING_SUSPENDING_BIT_KHR flag."

VK_RENDERING_SUSPENDING_BIT is also illegal with custom resolves.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:56 +00:00
Samuel Pitoiset
c1c031ca91 radv: make sure rendering isn't already active in CmdBeginRendering()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:56 +00:00
Samuel Pitoiset
99344bdfe5 radv: clear rendering state before performing resolves
This is mostly for not calling CmdBeginRendering() while rendering
is already active in order to catch potential driver issues. This
requires a small refactoring of how the rendering info is passed for
resolves though.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:55 +00:00
Samuel Pitoiset
4c18a36765 radv: pass VkSampleLocationsInfoEXT for depth/stencil expand
Instead of using an intermediate structure.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:55 +00:00
Samuel Pitoiset
6f279445e7 radv/meta: stop using custom sample locations for color resolves
Only needed for depth/stencil resolves.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39782>
2026-02-12 07:12:54 +00:00
Georg Lehmann
a87cdfc6b7 radv/nir/rt: preserve inf/nan for emulated RT intersect
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39641>
2026-02-10 18:42:02 +00:00