Commit graph

31626 commits

Author SHA1 Message Date
Aleksander Morgado
a6893a50c8 etnaviv: don't dereference etna_resource pointer if allocation fails
The check for the pointer being non-NULL was being done too late.

Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-07-06 21:06:25 +02:00
Mauro Rossi
b7ee56b599 Android: generate symlinks for all enabled gallium drivers
Current post install command relies on GALLIUM_TARGET_DRIVERS variable,
however variable needs to be initialized in src/gallium/Android.mk
in order that all enabled gallium drivers symlinks are correctly generated.

At the moment due to sorting of INC_DIRS and variable set with svga (vmwgfx)
only vmwgfx_dri.so and virtio_gpu_dri.so symlinks are generated.

Fixes: a3d98ca62f ("Android: use symlinks for driver loading")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 15:10:42 +01:00
Tomeu Vizoso
79827f50e2 android: build imx-drm winsys
Add Android.mk for winsys/imx/drm.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-05 15:10:31 +01:00
Rob Herring
77c446711b android: add etnaviv driver build support
Add etnaviv to Android makefiles.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-07-05 15:10:31 +01:00
Nicolai Hähnle
c7ecbd1153 tgsi_from_mesa: add tgsi_get_gl_frag_result_semantic
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle
fb1c4e3d47 tgsi_from_mesa: add pipe_shader_type_from_mesa
So... the pipe_ prefix doesn't really fit into a TGSI header; on the
other hand, the return type has the pipe_ prefix.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle
497b95fdf6 tgsi,st/mesa: move varying slot to semantic mapping into a helper for VS
We will use this helper in radeonsi's NIR path.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-05 12:27:11 +02:00
Nicolai Hähnle
d91f97f91d ddebug: handle some cases of non-TGSI shaders
NIR shaders are not captured properly in pipelined mode currently. This
would require shader cloning, which requires linking all the Gallium
drivers against NIR. We can always do that later.

v2: avoid immediate crashes in pipelined mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
2017-07-05 12:27:11 +02:00
Marek Olšák
a2b02c4948 gallium/radeon: fix VDPAU breakage, need VRAM with WC 2017-07-05 01:14:48 +02:00
Ilia Mirkin
1e73fc6b1a a5xx: enable polygon offset clamps
This is already set and emitted by the code.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
def1b94c33 a5xx: implement logicop support
The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
abe8740e33 a5xx: enable polygon mode selection
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
8108b56023 a5xx: disable ARB_depth_clamp for now
We need to figure out how to implement it properly. Right now it doesn't
work at all.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
5d9d1df183 a5xx: fix clip_halfz support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
02379b68f6 a5xx: improve 3d texture sampling
At least the first level works now. Eventually the later levels stop
working, there appears to be some alignment issue. But this improves the
situation immensely.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
c0f1efe04d a5xx: remove one of the MIPFILTER_LINEAR bits
It doesn't appear to do what we want. Removing this bit makes
lodclamp-between as well as a number of dEQP tests pass, with no visible
ill effect.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
f1fc619bd8 a5xx: enable formats newly added to the headers
This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally
this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and
10_10_10_2 vertex formats (and related extensions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
b68e22d5e2 a5xx: include color swap when decoding vertices
This fixes support for BGRA vertex formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Ilia Mirkin
5fdcddbeb4 a5xx: update headers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Rob Clark <robdclark@gmail.com>
2017-07-04 18:27:57 -04:00
Marek Olšák
156832ee2b gallium/radeon: attempt to fix a compiler failure in radeon_winsys.h
trivial.
2017-07-04 22:40:35 +02:00
Marek Olšák
0591df025b winsys/amdgpu: use 128KB BOs for suballocations of up to 64KB BOs
This decreases the number of BOs, but might also increase memory usage.
It's better for small textures.

The gameplay is on the far right:
https://people.freedesktop.org/~mareko/suballoc.svg

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
c784015643 gallium/radeon: allow suballocating textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
23446eedd1 gallium/radeon: generalize the function for in-place texture reallocation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
91f72975ac gallium/radeon: add radeon_winsys::buffer_is_suballocated
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
0f13451da3 gallium/radeon: clean up pb_cache bucket/usage determination
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
d4fac1e1d7 gallium/radeon: enable suballocations for VRAM with no CPU access
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
64e5577cac gallium/radeon: clean up (domain, flags) <-> (slab heap) translations
This is cleaner, and we are down to 4 slabs.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
b09a22ad21 gallium/radeon: remove RADEON_FLAG_CPU_ACCESS
https://lists.freedesktop.org/archives/amd-gfx/2017-June/010591.html

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
03c5ef195d gallium/radeon: disallow exports of sparse and suballocated BOs
I think it's unsafe, because the slabs can reuse exported storage.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
047c34f0ac gallium/radeon: clean up r600_texture_get_handle
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
7525c3e123 gallium/radeon: rename RADEON_FLAG_HANDLE -> RADEON_FLAG_NO_SUBALLOC
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
e6dbe975ef gallium/radeon: fix a possible crash for buffer exports
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
fee2883bd7 gallium/radeon: ignore PIPE_BIND_SHARED for buffers
BO exports can't be predicted this way.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Marek Olšák
5b373629fc radeonsi: add a HUD query for getting an average GFX BO list size
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-07-04 15:40:37 +02:00
Juan A. Suarez Romero
2c240a7205 vc4: automake: include vc4_cl_dump.h in
Ensure vc4_cl_dump.h and $(BROADCOM_FILES) are distributed in the
dist-file.

This fixes `make distcheck`

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-04 09:37:19 +02:00
Brian Paul
6158c0b5d8 svga: don't call svga_texture_device_format_has_alpha() for PIPE_BUFFER
svga_texture_device_format_has_alpha() is only intended to work for
texture resources, not buffer resources.  This fixes a failed assertion
in the svga_texture() cast function when running texture buffer tests.

Also, add an assertion in svga_texture_device_format_has_alpha() to
catch the issue sooner.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-03 10:10:14 -06:00
Brian Paul
e6d1cc31fa svga: fix texture buffer object regression
With change 8aba778fa2 we stopped binding
sampler objects for texture buffers.  That broke our texture sample /
sampler view setup code.

Now, we loop over the max(num samplers, num sampler views) and handle
the sampler and view information separately.  For texture buffers,
the sampler will be NULL but the sampler view non-null.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-03 10:10:13 -06:00
Brian Paul
6b4bf7e8be svga: move assertion in draw_vgpu10()
The buffer binding flags aren't ensured until after the
svga_buffer_handle() call, so move the assertion after it.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-03 10:10:13 -06:00
Brian Paul
9bd047aa26 svga: fix buffer binding flags initialization
If a buffer is created/initialized with glNamedBufferData we will
have no target (GL_ARRAY_BUFFER, GL_UNIFORM_BUFFER, etc) so the
svga_buffer::bind_flags will be zero until we try to get the buffer
handle.

This patch initializes the svga_buffer::bind_flags field when it's
zero.

This fixes the Piglit arb_uniform_buffer_object-rendering-dsa test.

Note that there's still issues in this area that'll have to be
addressed in the future.  For example, creating a buffer object
as GL_UNIFORM_BUFFER and later using it as a vertex buffer will
fail.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-07-03 10:10:11 -06:00
Nicolai Hähnle
b0b4b5e8f7 winsys/radeon: only call pb_slabs_reclaim when slabs are actually used
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100242
Fixes: fb827c055c ("winsys/radeon: enable buffer allocation from slabs")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-07-03 12:39:41 +02:00
Bruce Cherniak
32c1a54bd0 swr: Limit memory held by defer deleted resources.
This patch limits the number of items on the fence work queue (the
deferred deletion list) by submitting a sync fence when the queue size
exceeds a threshold.  This initiates deferred deletion of all resources
on the list and decreases the total amount of memory held waiting for
"deferred deletion".

This resolves  bug 101467 filed against swr for the piglit
streaming-texture-leak test.  For those running on smaller memory
(16GB?) systems, this will prevent oom-killer.

Thus far, we have not seen any real world applications that exhibit
behavior like the streaming-texture-leak test; as any form of pipeline
flush will trigger the defer queue and properly free any retained
allocations.  But, this addresses those as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-07-02 17:38:57 -05:00
Brian Paul
f215f42f1b svga: add texture size/levels sanity check code in svga_texture_create()
The state tracker should never ask us to create a texture with invalid
dimensions / mipmap levels.  Do some assertions to check that.

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2017-06-30 13:37:10 -06:00
Brian Paul
e54fe78e0e gallium/docs: document that TXF is used with PIPE_BUFFER resources
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-06-30 13:37:10 -06:00
Brian Paul
f4091e1638 gallium/docs: clarify that samplers are not used with PIPE_BUFFER resources
Commit 8aba778fa2 "st/mesa: don't set
sampler states for TBOs" changed how texture buffer objects are handled.
Document the new convention.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-06-30 13:37:10 -06:00
Eric Anholt
d623040dd5 vc4: Start using XML unpack functions in CL dump.
For now this is a no-op on the output, but it makes it clear that we've
had weird things going on with things like
V3D21_CLIPPER_Z_SCALE_AND_OFFSET.
2017-06-30 12:25:45 -07:00
Eric Anholt
56541d356d vc4: Replace a couple of magic numbers with #define usage. 2017-06-30 12:25:45 -07:00
Eric Anholt
f6c5c6b9be vc4: Move rasterizer state packing to CSO creation time.
This gets our vc4_emit.c size back down a bit:

before:
   1020       0       0    1020     3fc src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
    968	      0	      0	    968	    3c8	src/gallium/drivers/vc4/.libs/vc4_emit.o
2017-06-30 12:25:45 -07:00
Eric Anholt
bd1925562a vc4: Convert the driver to emitting the shader record using pack macros. 2017-06-30 12:25:45 -07:00
Eric Anholt
8d36bd3d08 vc4: Simplify pack header usage
Take the CL pointer in, which will be useful for enabling relocs.
However, our code expands a bit more:

before:
   4449       0       0    4449    1161 src/gallium/drivers/vc4/.libs/vc4_draw.o
    988       0       0     988     3dc src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
   4481	      0	      0	   4481	   1181	src/gallium/drivers/vc4/.libs/vc4_draw.o
   1020	      0	      0	   1020	    3fc	src/gallium/drivers/vc4/.libs/vc4_emit.o
2017-06-30 12:25:45 -07:00
Eric Anholt
4cef255872 vc4: Start using the pack header.
This slightly inflates the size of the generated code, in exchange for
getting us some convenient tools.

before:
   4389	      0	      0	   4389	   1125	src/gallium/drivers/vc4/.libs/vc4_draw.o
    808	      0	      0	    808	    328	src/gallium/drivers/vc4/.libs/vc4_emit.o

after:
   4449	      0	      0	   4449	   1161	src/gallium/drivers/vc4/.libs/vc4_draw.o
    988	      0	      0	    988	    3dc	src/gallium/drivers/vc4/.libs/vc4_emit.o
2017-06-30 12:25:45 -07:00