CP DMA on gfx9 can't handle the hole in sparse buffer. The fix skip
sparse bo hole so that arb_sparse_buffer-buffer-data &&
arb_sparse_buffer-commit pass
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24535>
This helper exists for a very tiny set of use-cases but it's better to
have the helper live in nir.c than hand-roll it elsewhere.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
Technically, it's possible because bcsel has more sources than mov.
However, it's not worth the pain of trying to get it right.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
I have no idea why a bigger size doesn't work, the hardware doesn't
complain, but it turns out that uploading big shaders still causes issues
with the old limit. *shrug*
Fixes: 7f63d2ebdb ("nv50: fix code uploads bigger than 0x10000 bytes")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
It uses a poll function that waits for a second hoping for another thread
to catch up, which is not a reliable way to do synchronization. The test
has been spuriously failing merges on a regular basis recently.
This is issue #9222, which I'm leaving open until the author can fix the test.
Fixes: 3b69b67545 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
Covers the case where the `dri2_init_screen` calls
`pipe_loader_create_screen_vk` directly and not sets
the device major and minor.
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24678>
If the NIR_DEBUG_PRINT_INTERNAL flag is not set, don't print debugging
information for internal shaders in INTEL_DEBUG=optimizer dumps.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24684>
This adds a new helper amdgpu_ctx_set_sw_reset_status that sets the SW
status. The logic of which CS is reported as rejected is also changed
slightly, i.e. other contexts no longer affect the current context.
The helper will be exposed to radeonsi to allow reporting non-recoverable
allocation failures and skipped draws.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
The precision of occlusion queries is determined from active queries.
Then the register programming is determined from the precision and other
states.
This has the effect that we no longer set PERFECT_ZPASS_COUNTS
for PIPE_QUERY_OCCLUSION_PREDICATE in some cases, resulting in higher
performance.
This also disables conservative occlusion queries for gfx11 because it's
not recommended with late Z, but detecting late Z vs early Z would be
more complicated, so just never use it, which results in better performance
with late Z.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
This removes calling si_upload_graphics_shader_descriptors from si_draw
by moving the uploading into si_emit_graphics_shader_pointers.
Similar for compute.
si_upload_shader_descriptors used to set sctx->shader_pointers_dirty to
pass the mask to the emit function. Now, shader_pointers_dirty is both set
and consumed in si_emit_graphics_shader_pointers and si_emit_compute_-
shader_pointers, so the mask is passed via a local variable.
All places that set descriptors_dirty must now also dirty
the gfx_shader_pointers state for the descriptors to be uploaded.
All places that set bindless_descriptors_dirty must do the same and also
make the cache_flush state dirty because si_emit_graphics_shader_pointers
can now set cache flush flags (through si_upload_bindless_descriptors).
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
This removes a jump from si_draw, and it's a prerequisite for the next
change, which will move uploading descriptors into a state emit function.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
If we reorder state atoms to emit the render condition after cache flushes,
it will automatically give us the behavior we want in si_draw.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
This allows us to remove a little bit of code from si_draw, and enable
removing more code in the future.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
