Commit graph

43507 commits

Author SHA1 Message Date
Christian Gmeiner
8534f49bf9 etnaviv: explicitly set nir_variable_mode
No functional changes - fixes the following assert:
  nir_lower_io_impl: Assertion `!(modes & ~supported_modes)' failed.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5997>
2020-07-24 13:33:47 +00:00
Jason Ekstrand
196db51fc2 anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref
We're about to make the SPIR-V -> NIR path generate a bit more complex
SSA chains for certain derefs.  This will ensure we don't regress anyone
when we start making vec2's of derefs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
2020-07-23 22:43:21 -05:00
Dave Airlie
fced3c43e7 Revert "llvmpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS."
This reverts commit 6ec4906649.

This broke:
GTF-GL45.gtf21.GL3Tests.texture_lod_bias.*

not sure why but revert for now.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6042>
2020-07-23 16:10:12 +10:00
Dave Airlie
be6c53bb9d llvmpipe/ms: fix sign extension bug in rasterizer.
/glcts --deqp-surface-width=1024 --deqp-surface-height=64  --deqp-case=KHR-GL45.texture_view.view_sampling  --deqp-surface-type=fbo
was failing but only for width 1024.

The test was filling a 4x4 ms texture, but leaving the viewport set to 1024x64.

This was resulting in this code incorrectly sign extending a value, and passing
it into the mask generator and getting the wrong values. Explicit cast
avoids the sign extension and fixes the above test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6006>
2020-07-23 01:50:28 +00:00
Eric Anholt
ba22f014f9 softpipe: Enable PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS;
tgsi_exec.c uses the generic src load path for indirects, so we don't
actually need addr regs.  Saves extra intructions.

shader-db results:
total instructions in shared programs: 3346685 -> 3249052 (-2.92%)
instructions in affected programs: 961832 -> 864199 (-10.15%)

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
8e61fd92d4 softpipe: Enable PIPE_CAP_TGSI_TEXCOORD.
The tgsi_exec path can handle it, and otherwise when we start using NIR
our MAX_VARYINGS value will cause us to have VARYING_SLOT_VARx above the
maximum.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
259a03b4f0 softpipe: Add support for reporting shader-db output.
In doing the softpipe NIR and NIR-to-TGSI transition, I want to make sure
I don't make shaders significantly worse, so I need shader-db output.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
991def0edc softpipe: Convert to comma-separated SOFTPIPE_DEBUG for debug options.
This makes us more like other drivers, and avoids having tons of different
names (particularly when you want to dump vs and fs in debugging).  In the
process, having a debug flag for vertex shaders just falls out.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Eric Anholt
86cfb62b87 softpipe: Refactor pipe_shader_state setup.
We had repeated code that I want to repeatedly change for adding
nir-to-tgsi.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6018>
2020-07-23 00:24:26 +00:00
Dave Airlie
e67da8d25f llvmpipe: enable robust buffer access + GL 4.3, GLES 3.2 and robust buffer access behaviour
Turning on robust buffer access enables GLES 3.2, also
finished GL 4.3 support.

The post depth coverage fail is expected, it's a test bug
This also introduce a fail in the invalid flag test that I can't reproduce out of CI.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
6d3cefe727 llvmpipe: add device reset query context hook.
Add the device reset query hook needed for robustness

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
80f7b58d90 drisw: add robustness extension support.
Port the code from dri2 so that drisw drivers can support the
robustness extension

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
12c06a0deb llvmpipe/draw: handle constant buffer limits and robustness (v1.1)
TGSI expect vec4 of constants for it's current code paths, and when
doing indirect accesses it does the comparison on vec4 indexes,
however NIR does the indexing on packed float indexes.

This also align the compute path with the other shaders, and
should improve robustness (at least under Vulkan)

Fixes:
KHR-NoContext.gl43.robust_buffer_access_behavior.uniform_buffer

v1.1:
rename variable to something more meaningful (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Dave Airlie
f0c3a25800 llvmpipe: enable EXT_texture_shadow_lod
The driver passes all the CTS tests for this.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5971>
2020-07-23 00:04:49 +00:00
Jason Ekstrand
c475e29be4 nir: Allow for system values with variable numbers of destination components
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
2020-07-22 23:43:35 +00:00
Eric Anholt
eb7642c53d i915: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.
The exception is the texel/gather offsets and stream output
components, which will not be exposed since we don't expose the
corresponding GLSL version.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e35d3d26b1 svga: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
c32f723a1a swr: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
39598a16e9 swr: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e2ffd2110e virgl: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by Gert Wollny <gert.wollny@collabora.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
e5554e32c0 softpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
855f3ff418 softpipe: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who exposes a cap.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
6ec4906649 llvmpipe: Use the default behavior of ALLOW_MAPPED_BUFFERS.
Since this is a software rasterizer, we really don't care whether the
buffers are "mapped" since it's just malloc.  This will drop a bit of
pointless CPU overhead to throw errors.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Eric Anholt
ae919b2561 llvmpipe: Remove a bunch of default handling of pipe caps.
u_screen will return 0 for all of these, which means that this is one
less driver to see in git grep when I'm checking who uses a cap.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3298>
2020-07-22 19:06:51 +00:00
Thong Thai
46646123ab radeon/vcn: increase render_pic_list size
Increase the maximum number of possible decoder reference picture
frames from 16 to 32.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6016>
2020-07-22 17:17:50 +00:00
Marek Olšák
89d2dac554 radeonsi: enable preemption if the kernel enabled it
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
9e2113c6dc radeonsi: set up IBs for preemption
- Execute cs_preamble_state as a separate IB with different flags.
- Set the PREEMPT flag for the main IB.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
b8892bc818 radeonsi: don't restore states at the beginning of IBs if they're shadowed
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
95c9048591 radeonsi: add debug code for register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
8af0f91fd3 radeonsi: add reg shadowing codepaths to GS and tess ring setup
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:33 -04:00
Marek Olšák
69014d8c94 radeonsi: implement CP register shadowing
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
b84dbd2936 radeonsi: reorder code in update_gs_ring_buffers and init_tess_factor_ring
to reduce the churn when adding codepaths for shadowed registers

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
babd87f2e0 radeonsi: make cs_preamble_state optional
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
7a6af4c5ed winsys/amdgpu: make amdgpu_bo_unmap non-static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
976edae839 radeonsi: sort registers in si_init_cs_preamble_state according to GPU gen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
88fe9dea7a radeonsi: sort registers in si_emit_initial_compute_regs according to GPU gen
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
1c6eca23fd radeonsi/gfx10: set the correct value for OFFCHIP_BUFFERING
Copied from PAL. Higher values break tessellation, which I was only able
to reproduce with register shadowing enabled.

Fixes: 0bf3e6fae7 "radeonsi/gfx10: double the number of tessellation offchip buffers per SE"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Marek Olšák
d244a25c07 radeonsi: add missing initialization of registers
(random initial gfx10 commit:)
Fixes: 78cdf9a99f - amd/addrlib: add gfx10 support

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5798>
2020-07-22 12:08:19 -04:00
Mike Blumenkrantz
3f783a3c50 zink: omit Lod image operand in ntv when not using an image texture dim
according to spec, this is invalid (and it's not being used anyway)

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
0ef5e19874 zink: add some asserts for building access chains in ntv
we're never going to pass a 0 here, and it's going to be an error if we do

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
2af22051c0 zink: handle texelFetchOffset with offsets
we need to explicitly add the offset in this case since it's not available
as a spirv param

fixes spec@glsl-1.30@execution@fs-texelfetchoffset-2d

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Mike Blumenkrantz
6587f41e11 zink: use helper function to handle uvec/bvec types
bit_size of 1 means we use a bool type here, 32 means uint, so we can just
handle that automatically for all relevant cases

ref shaders@glsl-vs-continue-in-switch-in-do-while

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5911>
2020-07-22 14:01:29 +00:00
Rhys Kidd
7dc4fe6fb4 nvc0: add documentation for nve4+ (Kepler) COPY class
Has been utilised within nouveau in place of the former M2MF class, which was
dropped for Kepler in PGRAPH in favour of:

  - a new P2MF object that only does simple upload; and
  - PCOPY took over responsibility of M2MF's other DMA functions.

Autogenerated headers from envytools commit 32659e654170cb03038ccf2cb165decd3a2409d6

NVIDIA documentation released at:
  https://github.com/NVIDIA/open-gpu-doc/blob/master/classes/dma-copy/cla0b5.h

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>
2020-07-22 05:49:08 +00:00
Rhys Kidd
203d565b19 nvc0: fix macro define for NVE4_COPY()
Fixes: e44089b2f7 ("nvc0: add initial support for nve4+ (Kepler) chipsets")
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5982>
2020-07-22 05:49:08 +00:00
Connor Abbott
bb5b136b45 freedreno: Use common guardband helper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5950>
2020-07-21 14:26:18 +00:00
Alyssa Rosenzweig
86a6597714 panfrost: Remove unused batch_fence->ctx
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
f18e5371cf panfrost: Remove unused batch_fence->signaled
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
64d6f56ad2 panfrost: Allocate syncobjs in panfrost_flush
For implementing panfrost_flush, it suffices to wait on only a single
syncobj, not an entire array of them. This lets us wait on it directly,
without coercing to/from syncfds in the middle (although some complexity
may be added later to support Android winsys).

Further, we should let the fence own the syncobj, tying together the
lifetimes and thus removing the connection between syncobjs and
batch_fence.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
85a2216fe4 panfrost: Skip specifying in_syncs
With the current kernel UABI, there is no benefit to explicitly
specifiying dependencies, since the kernel by design adds implicit
dependencies to any referenced BOs. This is something we'd like to
address in the future, but efficient handling with future kernels will
require a tweaked design in userspace as well. So let's do the obvious
thing now, and extend later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00
Alyssa Rosenzweig
e5ef5a381e panfrost: Remove wait parameter to flush_all_batches
It is always false now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5995>
2020-07-21 13:57:43 +00:00