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radeonsi/gfx10: double the number of tessellation offchip buffers per SE

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Each gfx10 shader engine corresponds to two gfx9 shader engines, so scale
the number of offchip buffers accordingly.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Nicolai Hähnle 2018-08-30 17:06:52 +02:00 • committed by Marek Olšák
parent 2afd3c421d
commit 0bf3e6fae7
1 changed files with 4 additions and 2 deletions
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6
src/gallium/drivers/radeonsi/si_pipe.c
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@ -1031,9 +1031,11 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
*/
unsigned max_offchip_buffers_per_se;
if (sscreen->info.chip_class >= GFX10)
max_offchip_buffers_per_se = 256;
/* Only certain chips can use the maximum value. */
if (sscreen->info.family == CHIP_VEGA12 ||
sscreen->info.family == CHIP_VEGA20)
else if (sscreen->info.family == CHIP_VEGA12 ||
sscreen->info.family == CHIP_VEGA20)
max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
else
max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63;