Samuel Pitoiset
9e0991eff5
radv: stop using the pipeline layout completely for DGC
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Uses the push constant size computed from shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793 >
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
f229e9cb51
radv: gather push constant size from shaders for DGC
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793 >
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
01c72a2539
radv: add a function to get push constant layout info for DGC
...
Instead of duplicating the same code.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793 >
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
d9281f1fb1
radv: determine the push constant size from the shader itself
...
To stop relying on the pipeline layout when possible.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793 >
2025-08-18 10:28:09 +02:00
Samuel Pitoiset
ce83800262
radv: remove unused forwarded declarations of pipeline layout
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
282186d4aa
radv: add a function that uploads push constants
...
Similar to indirect descriptor sets logic.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
4e8728c4f6
radv: rework emitting push constants for less CPU overhead
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
81ec36edb8
radv: determine if push constants need to be uploaded earlier
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:34 +00:00
Samuel Pitoiset
47fd1803b2
radv: use radv_shader_need_indirect_descriptor_sets() more
...
While we are at it, move it to the appropriate header file.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:33 +00:00
Samuel Pitoiset
8f0ff009c0
radv: do not emit inlined SGPRs twice for merged shaders
...
This is wasteful.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:33 +00:00
Samuel Pitoiset
4bd0bf7e19
radv: invalidating push constants for compute<->rt during dispatches
...
It's similar but a bit cleaner.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:32 +00:00
Samuel Pitoiset
104510aeb6
radv: slightly optimize indirect descriptor sets upload size
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:32 +00:00
Samuel Pitoiset
fd5925868f
radv: tidy up radv_flush_descriptors()
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36792 >
2025-08-18 07:25:31 +00:00
Martin Roukala (né Peres)
81a79234d8
radv/ci: disable hang detection in navi31-vkcts
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This has caused at least 2 unrelated MRs to fail a merge, so the
expectation that the GPU would not hang is clearly wrong and needs to
be updated.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36804 >
2025-08-17 13:36:33 +03:00
Konstantin Seurer
cc0dc4b566
radv: Store parent node IDs inside nodes on GFX12
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Saves some space.
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36691 >
2025-08-15 13:00:32 +00:00
Georg Lehmann
8c20947f69
amd/ci: update checksums for restricted traces
...
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 seems to have
caused tiny differences for one pixel in each of the traces.
Kind of unexpected, but not exactly concerning either.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36784 >
2025-08-15 11:34:56 +00:00
Konstantin Seurer
0d73aeea27
radv: Add RADV_DEBUG=validatevas for address validation in nir
...
The option creates a buffer where each bit stores whether the
corresponding 4096 byte memory section has been allocated. The helper
radv_build_is_valid_va allows for querying the validity of addresses
inside a nir shader which can be useful for debugging.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34392 >
2025-08-15 10:32:35 +00:00
Konstantin Seurer
be4be884e1
radv: Rename radv_printf files to radv_debug_nir
...
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34392 >
2025-08-15 10:32:34 +00:00
Georg Lehmann
9ed94371f7
amd: stop using custom gl_access_qualifier for access type
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36764 >
2025-08-15 08:26:10 +00:00
Georg Lehmann
f17cb6b714
amd: replace ACCESS_TYPE_SMEM with ACCESS_SMEM_AMD
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36764 >
2025-08-15 08:26:10 +00:00
Samuel Pitoiset
eb1a093965
radv: stop using the pipeline layout for uploading push constants with DGC
...
Pass the push constant size as a parameter instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777 >
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
b527a4f23e
radv: split uploading push constants with DGC in two parts
...
The first part is for copying "normal" push constant values to the
upload space in the preprocess buffer. The second part is only for
updating the push constants set for DGC.
This will allow us to remove using the pipeline layout in the DGC
shader.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777 >
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
3e0d4a1df1
radv: stop using the pipeline layout for inlined push constants with DGC
...
This only updates the inlined push constants set for DGC and doesn't
need the pipeline layout if the index is computed differently.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777 >
2025-08-15 07:45:00 +00:00
Samuel Pitoiset
95e387d283
radv: remove useless inline push constant emission with DGC IES
...
This is actually not needed because the base pipeline/shader is
required to be bind before preprocess()/execute() are called. Also,
the push constant layout must be similar between all pipelines/shaders
in the same IES.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36777 >
2025-08-15 07:45:00 +00:00
Georg Lehmann
6ba462bf26
aco/disable_wqm: optimize local mask creation
...
Foz-DB Navi48:
Totals from 7861 (9.79% of 80287) affected shaders:
Instrs: 13276809 -> 13183483 (-0.70%)
CodeSize: 71221260 -> 70852500 (-0.52%); split: -0.52%, +0.00%
Latency: 124001421 -> 123976480 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 17820119 -> 17817551 (-0.01%); split: -0.01%, +0.00%
SALU: 1736356 -> 1666673 (-4.01%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:47 +00:00
Georg Lehmann
fc53cf146c
aco: disable wqm for sampled buffer loads when not needed
...
Foz-DB GFX1201:
Totals from 318 (0.40% of 80287) affected shaders:
Instrs: 313039 -> 314064 (+0.33%); split: -0.00%, +0.33%
CodeSize: 1684104 -> 1688212 (+0.24%); split: -0.00%, +0.24%
VGPRs: 15120 -> 15144 (+0.16%)
Latency: 2515023 -> 2518610 (+0.14%); split: -0.06%, +0.20%
InvThroughput: 447468 -> 447615 (+0.03%); split: -0.02%, +0.05%
VClause: 4866 -> 4914 (+0.99%)
SClause: 6564 -> 6559 (-0.08%); split: -0.09%, +0.02%
Copies: 23577 -> 23673 (+0.41%); split: -0.04%, +0.45%
PreSGPRs: 16019 -> 16029 (+0.06%)
VALU: 172157 -> 172143 (-0.01%)
SALU: 52816 -> 53867 (+1.99%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:47 +00:00
Georg Lehmann
883b1ca364
aco: disable wqm for tex loads when not needed
...
By only executing VMEM loads for lanes where the result is used, we can save
bandwidth.
The NIR pass only handles tex for now, but those are most common anyway.
We can extend it handle image/ssbo/ubo/global loads in the future.
Foz-DB GFX1201:
Totals from 32633 (40.66% of 80251) affected shaders:
Instrs: 22635910 -> 23193509 (+2.46%); split: -0.00%, +2.46%
CodeSize: 122880044 -> 125093428 (+1.80%); split: -0.00%, +1.81%
VGPRs: 1481868 -> 1481712 (-0.01%)
SpillSGPRs: 3877 -> 4301 (+10.94%); split: -0.52%, +11.45%
Latency: 171480552 -> 171685219 (+0.12%); split: -0.18%, +0.30%
InvThroughput: 24364743 -> 24373441 (+0.04%); split: -0.08%, +0.12%
VClause: 388318 -> 388557 (+0.06%); split: -0.06%, +0.13%
SClause: 774781 -> 776492 (+0.22%); split: -0.29%, +0.51%
Copies: 1416586 -> 1541199 (+8.80%); split: -0.16%, +8.96%
Branches: 419591 -> 419673 (+0.02%); split: -0.02%, +0.04%
PreSGPRs: 1330303 -> 1416540 (+6.48%)
PreVGPRs: 964864 -> 964863 (-0.00%)
VALU: 12919601 -> 12920254 (+0.01%); split: -0.01%, +0.01%
SALU: 2685402 -> 3224147 (+20.06%); split: -0.00%, +20.07%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
7159fd21f8
aco: don't restrict vmem load scheduling by inserting p_end_wqm early
...
Foz-DB GFX1201:
Totals from 7 (0.01% of 80251) affected shaders:
Instrs: 703 -> 729 (+3.70%)
CodeSize: 4032 -> 4136 (+2.58%)
Latency: 5840 -> 4715 (-19.26%)
InvThroughput: 441 -> 405 (-8.16%)
Copies: 61 -> 67 (+9.84%)
PreSGPRs: 216 -> 218 (+0.93%)
SALU: 93 -> 113 (+21.51%)
When reordered after the next commit:
Foz-DB GFX1201:
Totals from 1609 (2.00% of 80251) affected shaders:
MaxWaves: 47984 -> 47986 (+0.00%)
Instrs: 1326847 -> 1332797 (+0.45%); split: -0.05%, +0.50%
CodeSize: 7248720 -> 7275364 (+0.37%); split: -0.04%, +0.41%
VGPRs: 74968 -> 75148 (+0.24%); split: -0.06%, +0.30%
SpillSGPRs: 182 -> 184 (+1.10%)
Latency: 10370602 -> 10172524 (-1.91%); split: -2.06%, +0.15%
InvThroughput: 1446508 -> 1445920 (-0.04%); split: -0.11%, +0.06%
VClause: 23567 -> 23559 (-0.03%); split: -0.35%, +0.32%
SClause: 43143 -> 43203 (+0.14%); split: -0.52%, +0.66%
Copies: 80948 -> 81622 (+0.83%); split: -0.32%, +1.16%
Branches: 21599 -> 21727 (+0.59%)
PreSGPRs: 69963 -> 70732 (+1.10%)
VALU: 778968 -> 779024 (+0.01%); split: -0.02%, +0.03%
SALU: 159797 -> 165329 (+3.46%); split: -0.01%, +3.47%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
c1b29174b4
aco: use a smaller wqm section for strict_wqm sampling
...
It's only important that the coordinate is created in WQM,
the sample itself doesn't care.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
de4b345949
aco/insert_exec: remove per instruction wqm/exact exec handling
...
No Foz-DB changes on GFX1201.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
11cee3d634
aco: use new disable_wqm for p_dual_src_export_gfx11
...
No Foz-DB changes on GFX1201.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
8e53ba9a0a
aco: use new disable_wqm for exp
...
No Foz-DB changes on GFX1201.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
bd6647e21e
aco/builder: support new disable_wqm
...
Create the additional undef operands that are filled by insert_exec.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
0e66f2b2cc
aco: use new disable_wqm for mimg
...
Foz-DB GFX1201:
Totals from 88 (0.11% of 80251) affected shaders:
Instrs: 81954 -> 82218 (+0.32%); split: -0.02%, +0.34%
CodeSize: 451824 -> 452880 (+0.23%); split: -0.02%, +0.25%
Latency: 308818 -> 308746 (-0.02%); split: -0.05%, +0.02%
VClause: 1324 -> 1318 (-0.45%)
Copies: 2795 -> 2784 (-0.39%)
PreSGPRs: 4029 -> 4035 (+0.15%)
SALU: 6563 -> 6809 (+3.75%); split: -0.15%, +3.90%
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
922f559c3c
aco: use new disable_wqm for flatlike
...
No Foz-DB changes on GFX1201.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
a4c537c5b3
aco: use new disable_wqm for mubuf/mtbuf
...
Foz-DB GFX1201:
Totals from 66 (0.08% of 80251) affected shaders:
Instrs: 45373 -> 45663 (+0.64%); split: -0.01%, +0.65%
CodeSize: 251708 -> 252900 (+0.47%); split: -0.00%, +0.48%
Latency: 278977 -> 278652 (-0.12%); split: -0.14%, +0.02%
InvThroughput: 38259 -> 38245 (-0.04%); split: -0.05%, +0.02%
VClause: 982 -> 962 (-2.04%)
Copies: 2882 -> 2808 (-2.57%)
PreSGPRs: 2564 -> 2599 (+1.37%)
SALU: 4748 -> 5010 (+5.52%)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
63af48ae2e
aco/insert_exec: new way to handle instructions that need wqm disabled
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
ca25553b92
aco: add a post-RA pass to disable wqm
...
By disabling WQM post-RA, we don't have RA/spilling mov issues with image_sample
operands that need to be computed in WQM.
We also don't restrict scheduling by inserting exec writes.
The only downside is more scalar ALU usage, but the SALU is almost always underutilized.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Georg Lehmann
34b154866f
aco/insert_exec: remove p_jump_to_epilog from needs exact
...
p_end_wqm will always be emitted before it by isel.
No Foz-DB changes on GFX1201.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970 >
2025-08-15 07:03:46 +00:00
Yinjie Yao
4cb6094f2e
ac,radeonsi/vcn: Use correct swizzle_mode for vcn4
...
On VCN4 SWIZZLE_MODE_8x8_1D_THIN_12_24BPP use different value
than previous VCN generations
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36775 >
2025-08-14 17:24:40 +00:00
Samuel Pitoiset
0ac7f1888f
radv: reduce the combined image/sampler desc size on GFX11+
...
From 96 to 64 due to the 32 bytes descriptor alignment.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762 >
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
897201d710
radv: only write 32 bytes for combined image/sampler on GFX11+
...
It should be slightly more optimal.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762 >
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
b6d093c4f5
radv: do not hardcode the combined image/sampler offset in the db path
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762 >
2025-08-14 06:47:30 +00:00
Samuel Pitoiset
f2b5446cc4
radv: use radv_write_sampler_descriptor() for combined image/sampler
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36762 >
2025-08-14 06:47:29 +00:00
Samuel Pitoiset
3fb33aada6
radv: optimize the preprocess buffer size for DGC IES compute
...
Using the precomputed information.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753 >
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
e527d2d801
radv: pre-compute more information when updating DGC IES
...
These information need to consider that pipelines/shaders in the same
IES struct might slightly differ. They will be used to determine the
preprocess buffer size in a better way.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753 >
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
0db165ebda
radv: pass the IES struct when computing the DGC sequence size
...
I completely missed that it's required for the application to pass the
IES struct in vkGetGeneratedCommandsMemoryRequirementsEXT. Also any
changes to the IES struct requires to call it again.
This will allow us to do more optimizations.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753 >
2025-08-14 06:25:49 +00:00
Samuel Pitoiset
771d4b55e8
radv: remove redundant push constant size alignment for DGC
...
It's already aligned to 16 bytes when the pipeline layout is created.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753 >
2025-08-14 06:25:48 +00:00
Samuel Pitoiset
3359386145
radv: fix reserving space for emitting push constants with DGC IES
...
layout->push_constant_mask is only the DGC push constant mask (ie. the
tokens that are specified), but with IES all push constants are emitted
from the DGC shader. So it should be the total range of push constant.
This used to work by luck due to the preprocess buffer alignment.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36753 >
2025-08-14 06:25:48 +00:00
Yonggang Luo
fc1b26f4dc
aco: Fixes warning note: ambiguity is between a regular call to this operator and a call with the argument order reversed
...
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../../src/amd/compiler/aco_util.h:300:9: note: ambiguity is between a regular call to this operator and a call with the argument order reversed
300 | bool operator==(const monotonic_buffer_resource& other) { return buffer == other.buffer; }
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36722 >
2025-08-13 19:49:37 +00:00