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aco: disable wqm for sampled buffer loads when not needed

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Foz-DB GFX1201:
Totals from 318 (0.40% of 80287) affected shaders:
Instrs: 313039 -> 314064 (+0.33%); split: -0.00%, +0.33%
CodeSize: 1684104 -> 1688212 (+0.24%); split: -0.00%, +0.24%
VGPRs: 15120 -> 15144 (+0.16%)
Latency: 2515023 -> 2518610 (+0.14%); split: -0.06%, +0.20%
InvThroughput: 447468 -> 447615 (+0.03%); split: -0.02%, +0.05%
VClause: 4866 -> 4914 (+0.99%)
SClause: 6564 -> 6559 (-0.08%); split: -0.09%, +0.02%
Copies: 23577 -> 23673 (+0.41%); split: -0.04%, +0.45%
PreSGPRs: 16019 -> 16029 (+0.06%)
VALU: 172157 -> 172143 (-0.01%)
SALU: 52816 -> 53867 (+1.99%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35970>
This commit is contained in:
Georg Lehmann 2025-07-31 15:08:41 +02:00 • committed by Marge Bot
parent 883b1ca364
commit fc53cf146c
2 changed files with 12 additions and 4 deletions
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7
src/amd/compiler/aco_validate.cpp
View file

@ -805,15 +805,16 @@ validate_ir(Program* program)
}
case Format::MTBUF:
case Format::MUBUF: {
check(instr->operands.size() > 1, "VMEM instructions must have at least one operand",
unsigned non_mask_ops = instr->operands.size() - (instr_disables_wqm(instr.get()) * 2);
check(non_mask_ops > 1, "VMEM instructions must have at least one operand",
instr.get());
check(instr->operands[1].isOfType(RegType::vgpr),
"VADDR must be in vgpr for VMEM instructions", instr.get());
check(instr->operands[0].isOfType(RegType::sgpr), "VMEM resource constant must be sgpr",
instr.get());
check(instr->operands.size() < 4 || instr->operands[3].isOfType(RegType::vgpr),
check(non_mask_ops < 4 || instr->operands[3].isOfType(RegType::vgpr),
"VMEM write data must be vgpr", instr.get());
if (instr->operands.size() >= 3 && instr->operands[2].isConstant())
if (non_mask_ops >= 3 && instr->operands[2].isConstant())
check(program->gfx_level < GFX12 || instr->operands[2].constantValue() == 0,
"VMEM SOFFSET must not be non-zero constant on GFX12+", instr.get());

9
src/amd/compiler/instruction_selection/aco_select_nir.cpp
View file

@ -455,7 +455,8 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
}
}
aco_ptr<Instruction> mubuf{create_instruction(op, Format::MUBUF, 3 + instr->is_sparse, 1)};
aco_ptr<Instruction> mubuf{
create_instruction(op, Format::MUBUF, 3 + instr->is_sparse + 2 * disable_wqm, 1)};
mubuf->operands[0] = Operand(resource);
mubuf->operands[1] = Operand(coords[0]);
mubuf->operands[2] = Operand::c32(0);
@ -464,6 +465,12 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
mubuf->mubuf().tfe = instr->is_sparse;
if (mubuf->mubuf().tfe)
mubuf->operands[3] = emit_tfe_init(bld, tmp_dst);
if (disable_wqm) {
instr_exact_mask(mubuf.get()) = Operand();
instr_wqm_mask(mubuf.get()) = Operand();
mubuf->mubuf().disable_wqm = true;
bld.program->needs_exact = true;
}
ctx->block->instructions.emplace_back(std::move(mubuf));
expand_vector(ctx, tmp_dst, dst, instr->def.num_components, dmask);