Commit graph

35413 commits

Author SHA1 Message Date
Eric Engestrom
e27902a261 util: use C99 declaration in the for-loop set_foreach() macro
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-10-25 12:43:18 +01:00
Eric Engestrom
bb84fa146f util: use C99 declaration in the for-loop hash_table_foreach() macro
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-10-25 12:43:18 +01:00
Eduardo Lima Mitev
b0c427043b ir3_compiler/nir: fix imageSize() for buffer-backed images
GL_EXT_texture_buffer introduced texture buffers, which can be used
in shaders through a new type imageBuffer.

Because how image access is implemented in freedreno, calling
imageSize on an imageBuffer returns the size in bytes instead of texels,
which is incorrect.

This patch adds a division of imageSize result by the bytes-per-pixel
of the image format, when image is buffer-backed.

Fixes all tests under
dEQP-GLES31.functional.image_load_store.buffer.image_size.*

v2: Pre-compute and submit the log2 of the image format's bpp as shader
    constant instead of emitting the LOG2 instruction in code. (Rob Clark)

v3: Use ffs (find-first-bit) helper for computing log2 (Ilia Mirkin)

Reviewed-by: Rob Clark <robdclark@gmail.com>
2018-10-24 18:18:35 +02:00
Boyuan Zhang
55e7de7b19 radeonsi: enable vcn jpeg decode for raven
Enable vcn jpeg decode for raven.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
97c473bb29 winsys/amdgpu: add vcn jpeg cs support
Add vcn jpeg cs support, align cs by no-op.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
6d2d910653 radeon/vcn: implement jpeg target buffer cmd
Implement jpeg target buffer cmd by programming registers directly,
since there is no firmware for VCN Jpeg decode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
0ee5630cfc radeon/vcn: implement jpeg bitstream buffer cmd
Implement jpeg bitstream buffer cmd by programming registers directly,
since there is no firmware for VCN Jpeg decode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
9b478b0c7a radeon/uvd: remove get mjpeg slice header
Move the previous get_mjpeg_slice_heaeder function and eoi from
"radeon/vcn" to "st/va".

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
4fc2368e3b st/va: get mjpeg slice header
Move the previous get_mjpeg_slice_heaeder function and eoi from
"radeon/vcn" to "st/va".

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
c7a5ef26ad radeon/vcn: add jpeg decode implementation
Add a new file to handle VCN Jpeg decode specific functions. Use Jpeg
specific cmd sending function in end_frame call.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
40fceb55f3 radeon/vcn: separate send cmd call from end frame
Use function pointer for sending cmd in end_frame call. By doing this, we can
assign different cmd sending logics for Jpeg decode later.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
4f1f128f8e radeon/vcn: create cs based on ring type
Add RING_VCN_JPEG for VCN Jpeg decode, and keep RING_VCN_DEC for other codecs.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
f7116e4ff8 radeon/winsys: add vcn jpeg ring type
Add a new ring type for vcn jpeg.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
e7e68d15b5 radeon/vcn: add vcn jpeg decode interface
Add VCN Jpeg decode interfaces and register defines.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Boyuan Zhang
6bc0a3a834 radeon/vcn: move radeon decoder define to header file
Move radeon_decoder definition from "radeon_vcn_dec.c" to "radeon_vcn_dec.h",
so that it can be included by other files later.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2018-10-23 08:50:02 -04:00
Jason Ekstrand
8b626a22b2 st/mesa: Record shader access qualifiers for images
They're not required to be the same as the access flag on the image
unit.  For hardware that does shader image lowering based on the
qualifier (Intel), it may be required for state setup.

v2: (by Kenneth Graunke, incorporating feedback from Marek Olšák)
 - Reduce both access and shader_access to uint16_t to avoid making
   the pipe_image_view structure larger.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-23 02:36:24 -07:00
Rob Herring
2bb05d70af android: Build kms_swrast for the Android platform
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-22 13:08:17 +01:00
Eduardo Lima Mitev
fdd926d5b2 ir3/nir: Set up image_dims consts for image_deref_size intrinsic too
`nir_intrinsic_image_deref_size` is not being considered during scan for
driver constants, so image constants are not emitted if a shader
only ever query the size of an image (no load, store, atomic op, etc).
This is unlikely, but possible.

Reviewed-by: Rob Clark <robdclark@gmail.com>
2018-10-21 21:29:18 +02:00
Karol Herbst
2d235d69c8 nv50/ir: fix ConstantFolding::createMul for 64 bit muls
Fixes: 2f52925f5c
       "nv50/ir: move a * b -> a << log2(b) code into createMul()"

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2018-10-20 03:00:04 +02:00
Sonny Jiang
bfb2b90246 radeonsi: Disable clear_state with radeon kernel driver
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2018-10-19 16:16:57 -04:00
Jose Fonseca
45bacc4b63 scons: Remove gles option.
It's broken, and WGL state tracker is always built with GLES support
noawadays.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-10-19 16:50:26 +01:00
Marek Olšák
69a87b5d47 radeonsi: fix a typo in a comment in emit_guardband 2018-10-18 18:01:22 -04:00
Marek Olšák
2a26b1c045 radeonsi: fix gnome-shell crash
I wasn't expecting to get viewports with the center having
negative coordinates.

Broken by: 6cc79e4411
2018-10-18 17:55:44 -04:00
Marek Olšák
77bcbe712e radeonsi: clamp point size to the limit
This fixes dEQP-GLES2.functional.rasterization.limits.points.
Broken by: ea039f789d

Tested-by: Jakob Bornecrantz <jakob@collabora.com>
2018-10-18 16:08:56 -04:00
Marek Olšák
eae8f49fc6 radeonsi: fix a VGT hang with primitive restart on Polaris10 and later
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Tested-by: Jakob Bornecrantz <jakob@collabora.com>
2018-10-18 16:08:56 -04:00
Marek Olšák
165817d47f radeonsi: fix a deadlock due to partially-initialized context on CI 2018-10-18 16:08:56 -04:00
Jan Vesely
06bf56725d radeonsi: Bump number of allowed global buffers to 32
Fixes assertion failure/crash when running luxmark/luxball on clover.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108272
CC: mesa-stable@lists.freedesktop.org
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-10-18 16:02:42 -04:00
Marek Olšák
6cc79e4411 radeonsi: fix incorrect hw screen offset and guardband computation
It resulted in assertion failures or incorrect rendering.

Broken by: 9e182b8313
2018-10-18 14:42:42 -04:00
Michał Janiszewski
0ef50ecc69 st/xlib: Use more appropriate include guard
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com
2018-10-18 11:03:04 +01:00
Michał Janiszewski
bcc613acc1 gallium: Fix mismatched ifdef-guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-18 11:03:03 +01:00
Gert Wollny
74adc624b6 softpipe: dynamically allocate space for immediate constants
The number of immediate constants was fixed and the size check was
only done by means of an assertion. Given this a shader that emits
more immediate constants would result in a memory corruption when
mesa is build in release mode.

Instead of using this fixed limit allocate the space dynamically, let it
grow as needed, and also remove the unused ImmArray.

Fixes: dEQP-GLES31.functional.ssbo.layout.random.arrays_of_arrays.1

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2018-10-18 10:59:51 +02:00
Neil Roberts
a9475d9337 Fix setting indent-tabs-mode in the Emacs .dir-locals.el files
Some of the .dir-locals.el had the wrong name for the truthy value so
it wasn’t setting indent-tabs-mode.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-10-17 19:03:08 +02:00
Rob Clark
d27b1c83b9 freedreno/a6xx: don't allocate binning rb
Now that a single cmdstream is used for both binning and draw passes, we
can skip allocation of cmdstream buffer for binning.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:49 -04:00
Rob Clark
24d57a6d8f freedreno/a6xx: single cmdstream for draw+binning
Now that state which is different for draw vs binning pass is split out
into different state-groups with appropriate enable_mask (so the
appropriate one is chosen for draw vs binning), switch over to using a
single cmdstream for both passes.

This should significantly lower draw overhead for CPU bound benchmarks.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:49 -04:00
Rob Clark
72f6164fef freedreno/a6xx: split binning vs draw program stateobj's
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:49 -04:00
Rob Clark
3313d693af freedreno/a6xx: split VBO state into binning/draw variants
Blob seems to manage to use same input registers for BS (binning pass)
vs VS (draw pass) shaders, so it can use the same VBO state for both.
We can't quite do that yet, so split them.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:49 -04:00
Rob Clark
b23fc4cacb freedreno/a6xx: move VBO state to stateobj
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:49 -04:00
Rob Clark
e194056832 freedreno/a6xx: move ZSA state to stateobj
Step towards single cmdstream, where we need different state-group-id's
for binning vs draw ZSA state.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
a50a9a44e8 freedreno/a6xx: remove vismode param
We don't need to keep this IGNORE_VISIBILITY in binning pass.  Prep work
for using single cmdstream for both draw and binning passes.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
d9dbc9c21f freedreno/ir3: move binning-pass fixup for a6xx+
Move this to after ir3_cp (which can add lowered immediates to the const
state) for a6xx+, to ensure the uniform state matches between binning
and vertex shaders.  This way we can emit just a single VS_CONST state-
group when we re-use single cmdstream for both binning and draw passes.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
1a51c4a87e freedreno/a6xx: a bit more state emit cleanup
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
2ffc79c7d1 freedreno/a6xx: move framebuffer state emit to emit_mrt()
No point in checking this per-draw, since framebuffer change means new
batch.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
5894f37b85 freedreno/a6xx: small emit_mrt() cleanup
On a6xx, this is only used for pfb->cbufs so we can just directly pass
the pfb state.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
b4e94af37d freedreno/a6xx: use program cache
Use the in-memory cache to construct shader program state and re-use it
on subsequent draws, to lower driver overhead.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
1d7fbe2cd1 freedreno/ir3: shader variant cache
Cache that maps gallium hwcso (in this case, 'struct ir3_shader') plus
shader variant key to a generation specific state object.

This could eventually replace the linked list of shader variants, but
for now it lets us re-use the work currently done in fdN_program_emit()

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
2e9c08c0bc freedreno/ir3: move binning_pass out of shader variant key
Prep work for a following patch, that introduces a cache to map from
program state (all shader stages) plus variant key to pre-baked hw
state (which could be emit'd via CP_SET_DRAW_STATE, for example).
To do that, we really want the variant key to be immutable, and to
treat the binning pass shader as an extra shader stage, rather than
as a VS variant.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
8b1a3b5dde freedreno/ir3: track # of samplers used by shader
This is useful for a6xx to avoid program state from depending on bound
tex/samp state.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
1b9d69410c freedreno/a6xx: texture state obj
Unfortunately gallium doesn't match what the hw wants perfectly here, in
using a separate CSO for each texture/sampler.  So we have to use a hash
table to map the collection of texture/samplers to hw state object.

We probably could use separate hw state objects for texture and sampler
state, but mesa/st tends to update the tex and samp state together.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
e8606b11dd freedreno: add resource seqno
Intended to be something more compact than a 64b pointer, which could be
used as a key into hashtables.  Prep work for texture state objects.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00
Rob Clark
abcdf5627a freedreno/a6xx: move const emit to state group
Eventually we want to move nearly everything, but no other state depends
on const state, so this is the easiest one to move first.

For webgl aquarium, this reduces GPU load by about 10%, since for each
fish it does a uniform upload plus draw.. fish frequently are visible in
only a single tile, so this skips the uniform uploads for other tiles.

The additional step of avoiding WFI's when using CP_SET_DRAW_STATE seems
to be work an additional 10% gain for aquarium.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-17 12:44:48 -04:00