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radeonsi: fix incorrect hw screen offset and guardband computation
It resulted in assertion failures or incorrect rendering.
Broken by: 9e182b8313
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baa38c144f
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6cc79e4411
1 changed files with 2 additions and 2 deletions
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@ -176,8 +176,8 @@ static void si_emit_guardband(struct si_context *ctx)
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/* Determine the optimal hardware screen offset to center the viewport
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* within the viewport range in order to maximize the guardband size.
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*/
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int hw_screen_offset_x = (vp_as_scissor.maxx - vp_as_scissor.minx) / 2;
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int hw_screen_offset_y = (vp_as_scissor.maxy - vp_as_scissor.miny) / 2;
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int hw_screen_offset_x = (vp_as_scissor.maxx + vp_as_scissor.minx) / 2;
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int hw_screen_offset_y = (vp_as_scissor.maxy + vp_as_scissor.miny) / 2;
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const unsigned hw_screen_offset_max = 8176;
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/* SI-CI need to align the offset to an ubertile consisting of all SEs. */
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