Commit graph

8 commits

Author SHA1 Message Date
Marek Olšák
39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level"
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
2022-05-13 14:56:22 -04:00
Samuel Pitoiset
e928f475cc ac: add initial SPM support
SPM is hardware feature that allows us to dump performance counters
at a sampling interval to a buffer. It is used by RGP to report cache
counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13704>
2021-11-11 10:05:49 +00:00
Samuel Pitoiset
8f9368ddb7 ac/perfcounters: add a GPU block ID to every block definitions
The enumeration comes from AMDVLK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:55 +00:00
Samuel Pitoiset
5a8776fd8c ac/perfcounters: add more SPM configuration fields
Add the number of SPM wires because sometimes a block has eg.
2 counters but only holds 3 16-bit counters instead of 4.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:55 +00:00
Samuel Pitoiset
3d8d6ebcb0 ac/perfcounters: rename num_multi to num_spm_counters
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Samuel Pitoiset
da94772510 ac/perfcounters,radeonsi: rework performance counters layout
Instead of having different layouts which might complicate things when
some registers are missing, hardcode the SELECT and SELECT1 registers
into separate arrays.

The SELECT registers are "legacy" counters, while the SELECT1 registers
are SPM counters.

This is more verbose and emit more UCONFIG registers, but emitting the
SELECT registers is now much simpler and it seems less error prone.
This will also help emitting the SPM configuration.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Samuel Pitoiset
66a34be6ac ac/perfcounters: remove ac_pc_block_base::num_prelude
This seems unnecessary if the first select register is correctly set.
This CB filter was always disabled anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
2021-06-22 06:38:54 +00:00
Samuel Pitoiset
380ac28891 ac: import performance counters from RadeonSI
Performance counters will be used by RADV for VK_KHR_performance_query
and also for adding SPM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11140>
2021-06-03 07:15:21 +00:00