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ac/perfcounters: add a GPU block ID to every block definitions
The enumeration comes from AMDVLK. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11186>
This commit is contained in:
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2 changed files with 95 additions and 0 deletions
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@ -39,6 +39,7 @@ static unsigned cik_CB_select1[] = {
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R_037008_CB_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_CB = {
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.gpu_block = CB,
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.name = "CB",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -65,6 +66,7 @@ static unsigned cik_CPC_counters[] = {
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R_034010_CPC_PERFCOUNTER1_LO,
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};
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static struct ac_pc_block_base cik_CPC = {
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.gpu_block = CPC,
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.name = "CPC",
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.num_counters = 2,
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@ -90,6 +92,7 @@ static unsigned cik_CPF_counters[] = {
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R_034020_CPF_PERFCOUNTER1_LO,
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};
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static struct ac_pc_block_base cik_CPF = {
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.gpu_block = CPF,
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.name = "CPF",
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.num_counters = 2,
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@ -115,6 +118,7 @@ static unsigned cik_CPG_counters[] = {
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R_034000_CPG_PERFCOUNTER1_LO,
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};
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static struct ac_pc_block_base cik_CPG = {
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.gpu_block = CPG,
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.name = "CPG",
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.num_counters = 2,
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@ -139,6 +143,7 @@ static unsigned cik_DB_select1[] = {
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R_03710C_DB_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_DB = {
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.gpu_block = DB,
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.name = "DB",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -163,6 +168,7 @@ static unsigned cik_GDS_select1[] = {
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R_036A10_GDS_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_GDS = {
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.gpu_block = GDS,
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.name = "GDS",
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.num_counters = 4,
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@ -185,6 +191,7 @@ static unsigned cik_GRBM_counters[] = {
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R_03410C_GRBM_PERFCOUNTER1_LO,
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};
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static struct ac_pc_block_base cik_GRBM = {
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.gpu_block = GRBM,
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.name = "GRBM",
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.num_counters = 2,
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@ -200,6 +207,7 @@ static unsigned cik_GRBMSE_select0[] = {
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R_036114_GRBM_SE3_PERFCOUNTER_SELECT,
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};
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static struct ac_pc_block_base cik_GRBMSE = {
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.gpu_block = GRBMSE,
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.name = "GRBMSE",
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.num_counters = 4,
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@ -218,6 +226,7 @@ static unsigned cik_IA_select1[] = {
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R_036220_IA_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_IA = {
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.gpu_block = IA,
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.name = "IA",
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.num_counters = 4,
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@ -245,6 +254,7 @@ static unsigned cik_PA_SC_select1[] = {
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R_036504_PA_SC_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_PA_SC = {
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.gpu_block = PA_SC,
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.name = "PA_SC",
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.num_counters = 8,
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.flags = AC_PC_BLOCK_SE,
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@ -271,6 +281,7 @@ static unsigned cik_PA_SU_select1[] = {
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};
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/* According to docs, PA_SU counters are only 48 bits wide. */
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static struct ac_pc_block_base cik_PA_SU = {
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.gpu_block = PA_SU,
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.name = "PA_SU",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE,
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@ -300,6 +311,7 @@ static unsigned cik_SPI_select1[] = {
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R_03661C_SPI_PERFCOUNTER3_SELECT1
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};
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static struct ac_pc_block_base cik_SPI = {
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.gpu_block = SPI,
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.name = "SPI",
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.num_counters = 6,
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.flags = AC_PC_BLOCK_SE,
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@ -333,6 +345,7 @@ static unsigned cik_SQ_select0[] = {
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R_03673C_SQ_PERFCOUNTER15_SELECT,
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};
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static struct ac_pc_block_base cik_SQ = {
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.gpu_block = SQ,
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.name = "SQ",
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.num_counters = 16,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_SHADER,
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@ -357,6 +370,7 @@ static unsigned cik_SX_select1[] = {
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R_036914_SX_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_SX = {
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.gpu_block = SX,
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.name = "SX",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE,
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@ -379,6 +393,7 @@ static unsigned cik_TA_select1[] = {
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R_036B04_TA_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_TA = {
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.gpu_block = TA,
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.name = "TA",
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.num_counters = 2,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -401,6 +416,7 @@ static unsigned cik_TD_select1[] = {
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R_036C04_TD_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base cik_TD = {
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.gpu_block = TD,
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.name = "TD",
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.num_counters = 2,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -426,6 +442,7 @@ static unsigned cik_TCA_select1[] = {
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R_036E4C_TCA_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_TCA = {
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.gpu_block = TCA,
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.name = "TCA",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -451,6 +468,7 @@ static unsigned cik_TCC_select1[] = {
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R_036E0C_TCC_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_TCC = {
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.gpu_block = TCC,
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.name = "TCC",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -476,6 +494,7 @@ static unsigned cik_TCP_select1[] = {
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R_036D0C_TCP_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_TCP = {
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.gpu_block = TCP,
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.name = "TCP",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -501,6 +520,7 @@ static unsigned cik_VGT_select1[] = {
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R_036244_VGT_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base cik_VGT = {
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.gpu_block = VGT,
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.name = "VGT",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE,
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@ -522,6 +542,7 @@ static unsigned cik_WD_select0[] = {
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R_03620C_WD_PERFCOUNTER3_SELECT,
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};
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static struct ac_pc_block_base cik_WD = {
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.gpu_block = WD,
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.name = "WD",
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.num_counters = 4,
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@ -531,12 +552,14 @@ static struct ac_pc_block_base cik_WD = {
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/* cik_MC */
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static struct ac_pc_block_base cik_MC = {
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.gpu_block = MC,
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.name = "MC",
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.num_counters = 4,
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};
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/* cik_SRBM */
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static struct ac_pc_block_base cik_SRBM = {
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.gpu_block = SRBM,
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.name = "SRBM",
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.num_counters = 2,
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};
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@ -552,6 +575,7 @@ static unsigned gfx10_CHA_select1[] = {
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R_037784_CHA_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_CHA = {
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.gpu_block = CHA,
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.name = "CHA",
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.num_counters = 4,
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@ -575,6 +599,7 @@ static unsigned gfx10_CHCG_select1[] = {
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R_036F1C_CHCG_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_CHCG = {
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.gpu_block = CHCG,
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.name = "CHCG",
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.num_counters = 4,
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@ -598,6 +623,7 @@ static unsigned gfx10_CHC_select1[] = {
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R_036F04_CHC_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_CHC = {
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.gpu_block = CHC,
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.name = "CHC",
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.num_counters = 4,
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@ -612,6 +638,7 @@ static struct ac_pc_block_base gfx10_CHC = {
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/* gfx10_DB */
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static struct ac_pc_block_base gfx10_DB = {
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.gpu_block = DB,
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.name = "DB",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -634,6 +661,7 @@ static unsigned gfx10_GCR_select1[] = {
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R_037584_GCR_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GCR = {
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.gpu_block = GCR,
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.name = "GCR",
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.num_counters = 2,
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@ -668,6 +696,7 @@ static unsigned gfx10_GE_select1[] = {
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R_03621C_GE_PERFCOUNTER3_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GE = {
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.gpu_block = GE,
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.name = "GE",
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.num_counters = 12,
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@ -691,6 +720,7 @@ static unsigned gfx10_GL1A_select1[] = {
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R_037704_GL1A_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GL1A = {
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.gpu_block = GL1A,
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.name = "GL1A",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -715,6 +745,7 @@ static unsigned gfx10_GL1C_select1[] = {
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R_036E84_GL1C_PERFCOUNTER0_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GL1C = {
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.gpu_block = GL1C,
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.name = "GL1C",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -740,6 +771,7 @@ static unsigned gfx10_GL2A_select1[] = {
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R_036E4C_GL2A_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GL2A = {
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.gpu_block = GL2A,
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.name = "GL2A",
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.num_counters = 4,
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@ -764,6 +796,7 @@ static unsigned gfx10_GL2C_select1[] = {
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R_036E0C_GL2C_PERFCOUNTER1_SELECT1,
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};
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static struct ac_pc_block_base gfx10_GL2C = {
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.gpu_block = GL2C,
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.name = "GL2C",
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.num_counters = 4,
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@ -794,6 +827,7 @@ static unsigned gfx10_PA_PH_select1[] = {
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R_037648_PA_PH_PERFCOUNTER3_SELECT1,
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};
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static struct ac_pc_block_base gfx10_PA_PH = {
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.gpu_block = PA_PH,
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.name = "PA_PH",
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.num_counters = 8,
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.flags = AC_PC_BLOCK_SE,
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@ -821,6 +855,7 @@ static unsigned gfx10_PA_SU_select1[] = {
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R_03641C_PA_SU_PERFCOUNTER3_SELECT1,
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};
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static struct ac_pc_block_base gfx10_PA_SU = {
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.gpu_block = PA_SU,
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.name = "PA_SU",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE,
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@ -840,6 +875,7 @@ static unsigned gfx10_RLC_select0[] = {
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R_037308_RLC_PERFCOUNTER1_SELECT,
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};
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static struct ac_pc_block_base gfx10_RLC = {
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.gpu_block = RLC,
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.name = "RLC",
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.num_counters = 2,
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@ -860,6 +896,7 @@ static unsigned gfx10_RMI_select1[] = {
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R_037410_RMI_PERFCOUNTER2_SELECT1,
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};
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static struct ac_pc_block_base gfx10_RMI = {
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.gpu_block = RMI,
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.name = "RMI",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS,
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@ -875,6 +912,7 @@ static struct ac_pc_block_base gfx10_RMI = {
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/* gfx10_SQ */
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static struct ac_pc_block_base gfx10_SQ = {
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.gpu_block = SQ,
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.name = "SQ",
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.num_counters = 16,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_SHADER,
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@ -889,6 +927,7 @@ static struct ac_pc_block_base gfx10_SQ = {
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/* gfx10_TCP */
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static struct ac_pc_block_base gfx10_TCP = {
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.gpu_block = TCP,
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.name = "TCP",
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.num_counters = 4,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_INSTANCE_GROUPS | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -908,6 +947,7 @@ static unsigned gfx10_UTCL1_select0[] = {
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R_037590_UTCL1_PERFCOUNTER1_SELECT,
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};
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static struct ac_pc_block_base gfx10_UTCL1 = {
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.gpu_block = UTCL1,
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.name = "UTCL1",
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.num_counters = 2,
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.flags = AC_PC_BLOCK_SE | AC_PC_BLOCK_SHADER_WINDOWED,
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@ -55,7 +55,62 @@ enum ac_pc_block_flags
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AC_PC_BLOCK_SHADER_WINDOWED = (1 << 4),
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};
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enum ac_pc_gpu_block {
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CPF = 0x0,
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IA = 0x1,
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VGT = 0x2,
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PA_SU = 0x3,
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PA_SC = 0x4,
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SPI = 0x5,
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SQ = 0x6,
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SX = 0x7,
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TA = 0x8,
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TD = 0x9,
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TCP = 0xA,
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TCC = 0xB,
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TCA = 0xC,
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DB = 0xD,
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CB = 0xE,
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GDS = 0xF,
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SRBM = 0x10,
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GRBM = 0x11,
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GRBMSE = 0x12,
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RLC = 0x13,
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DMA = 0x14,
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MC = 0x15,
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CPG = 0x16,
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CPC = 0x17,
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WD = 0x18,
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TCS = 0x19,
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ATC = 0x1A,
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ATCL2 = 0x1B,
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MCVML2 = 0x1C,
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EA = 0x1D,
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RPB = 0x1E,
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RMI = 0x1F,
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UMCCH = 0x20,
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GE = 0x21,
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GE1 = GE,
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GL1A = 0x22,
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GL1C = 0x23,
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GL1CG = 0x24,
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GL2A = 0x25,
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GL2C = 0x26,
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CHA = 0x27,
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CHC = 0x28,
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CHCG = 0x29,
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GUS = 0x2A,
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GCR = 0x2B,
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PA_PH = 0x2C,
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UTCL1 = 0x2D,
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GEDIST = 0x2E,
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GESE = 0x2F,
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DF = 0x30,
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NUM_GPU_BLOCK,
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};
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struct ac_pc_block_base {
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enum ac_pc_gpu_block gpu_block;
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const char *name;
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unsigned num_counters;
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unsigned flags;
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