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Author SHA1 Message Date
Rhys Perry
0619e4db63 nir,aco,ac/llvm: add nir_op_alignbyte_amd 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31904>
 2024-11-13 12:59:26 +00:00
Georg Lehmann
2cd8a9fef7 amd: lower gl_FragCoord.w rcp in NIR 
This allows NIR to remove the rcps if the application uses rcp(gl_FragCoord.w).
D3D provides w, not 1/w like GL/VK in the shader, so this is commonly used.

Foz-DB Navi21:
Totals from 2068 (2.61% of 79206) affected shaders:
MaxWaves: 45636 -> 45652 (+0.04%)
Instrs: 2173444 -> 2169671 (-0.17%); split: -0.18%, +0.00%
CodeSize: 11881304 -> 11867208 (-0.12%); split: -0.12%, +0.01%
VGPRs: 118000 -> 117968 (-0.03%)
Latency: 35689676 -> 35675909 (-0.04%); split: -0.06%, +0.02%
InvThroughput: 9167199 -> 9159801 (-0.08%); split: -0.08%, +0.00%
VClause: 45076 -> 45078 (+0.00%); split: -0.01%, +0.02%
SClause: 92503 -> 92366 (-0.15%); split: -0.31%, +0.17%
Copies: 140282 -> 140303 (+0.01%); split: -0.13%, +0.14%
Branches: 53347 -> 53346 (-0.00%); split: -0.01%, +0.00%
PreVGPRs: 96495 -> 96465 (-0.03%)
VALU: 1522980 -> 1519252 (-0.24%); split: -0.25%, +0.01%
SALU: 213451 -> 213460 (+0.00%); split: -0.02%, +0.02%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31967>
 2024-11-06 12:57:08 +00:00
Georg Lehmann
42d5cb62bb ac/llvm: implement load_pixel_coord 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
 2024-11-04 12:34:30 +00:00
Georg Lehmann
a2baff4810 ac/llvm: handle shared atomic base offset 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31080>
 2024-10-29 09:31:08 +00:00
Rhys Perry
d227968201 ac/llvm: cast to integer after derivative intrinsics 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: daa97bb41a ("amd: switch to derivative intrinsics")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31788>
 2024-10-24 11:23:07 +00:00
Ganesh Belgur Ramachandra
cc27e3ea29 amd: remove the redundant target library info instance in LLVM compiler 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30506>
 2024-10-05 09:10:06 +00:00
Ganesh Belgur Ramachandra
0a352a838a amd,radeonsi: reduce legacy::PassManager use to only run backend passes 
The legacy::PassManager is only required to run backend optimizations
and for code generation. It should be deprecated when the new PM
can handle code generation on its own.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30506>
 2024-10-05 09:10:06 +00:00
Ganesh Belgur Ramachandra
38e50221cd amd,radeonsi: use new pass manager to handle midend optimizations 
Adds an optimizer structure that builds an optimization
pipeline to run LLVM passes using the new pass manager.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30506>
 2024-10-05 09:10:06 +00:00
Marek Olšák
f7199b9971 ac/llvm: don't use the 64-bit umul_hi workaround with LLVM 19.1 
It's fixed there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31187>
 2024-09-27 19:21:55 +00:00
Georg Lehmann
bcfc5c09fa amd: add offset to is_subgroup_invocation_lt_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31184>
 2024-09-26 14:29:13 +00:00
Caio Oliveira
74be809237 compiler: Allow derivative_group to be used for all stages in shader_info 
These will now also be used by stages that have workgroups.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30950>
 2024-09-03 20:03:18 +00:00
Qiang Yu
a37933b721 ac/llvm: build wqm for quad intrinsics only when fragment shader 
Otherwise we get wrong result when non-fragment shader.

Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30610>
 2024-08-26 10:46:11 +08:00
Karol Herbst
74dafa3c79 ac/llvm: fix umul_high 
LLVM optimizes umul_hi with a constant to v_mul_hi_i32_i24_e32 which isn't
always what we need here. This causes miscalculations. To prevent LLVM to
apply this optimization, we insert a optimization barrier.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11761
Suggested-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30810>
 2024-08-24 16:10:20 +00:00
Alyssa Rosenzweig
daa97bb41a amd: switch to derivative intrinsics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30565>
 2024-08-08 15:26:07 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag 
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:16 +00:00
Marek Olšák
678d520162 as/llvm: add s_nops before the ordered add loop and s_wait_alu workaround 
The s_nops improve performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
bd8d20543d ac/llvm: fix inline assembly register constraints for ordered_add_loop_gfx12_amd 
This is only known to fix the assembly code when num_atomics > 6, which is
not currently used.

The VGPRs are reordered to simplify the clobber constraint.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
b617c3b06e ac/llvm: remove s_nop from ordered_add_loop_gfx12_amd 
This is faster.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
1b2cd628b8 nir: rename ordered_xfb_counter_add_gfx12_amd -> ordered_add_loop_gfx12_amd 
because it can also be used by compute.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Khem Raj
5a9c052ba7 amd: Include missing llvm IR header Module.h 
With LLVM-19, Module.h header is not being pulled, which results in
compile errors e.g.

src/amd/llvm/ac_llvm_helper.cpp:102:10: error: no matching function for call to ‘unwrap(LLVMOpaqueModule*&)’
  102 |    unwrap(module)->setTargetTriple(TM->getTargetTriple().getTriple());
      |    ~~~~~~^~~~~~~~
In file included from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/Type.h:18,
                 from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/DerivedTypes.h:23,
                 from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/IR/InstrTypes.h:26,
                 from /mnt/b/yoe/master/build/tmp/work/x86_64-linux/mesa-native/24.0.7/recipe-sysroot-native/usr/include/llvm/Analysis/TargetLibraryInfo.h:14,
                 from ../mesa-24.0.7/src/amd/llvm/ac_llvm_helper.cpp:8:

Its getting the definition from llvm/IR/Type.h instead of Module.h and caused
confusion to compiler

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11424

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29993>
 2024-07-03 19:26:47 +00:00
David Heidelberg
68215332a8 build: pass licensing information in SPDX form 
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29972>
 2024-06-29 12:42:49 -07:00
Georg Lehmann
3dfc8b3bcf ac/llvm: implement ford, funord, fneo, fequ, fltu, fgeu 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Rhys Perry
38d1456931 ac/llvm: remove push constants 
These are lowered in NIR.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675>
 2024-06-20 12:09:29 +00:00
Daniel Schürmann
9b1a748b5e nir: remove nir_intrinsic_discard 
The semantics of discard differ between GLSL and HLSL and
their various implementations. Subsequently, numerous application
bugs occurred and SPV_EXT_demote_to_helper_invocation was written
in order to clarify the behavior. In NIR, we now have 3 different
intrinsics for 2 things, and while demote and terminate have clear
semantics, discard still doesn't and can mean either of the two.

This patch entirely removes nir_intrinsic_discard and
nir_intrinsic_discard_if and replaces all occurences either with
nir_intrinsic_terminate{_if} or nir_intrinsic_demote{_if} in the
case that the NIR option 'discard_is_demote' is being set.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
 2024-06-17 19:37:16 +00:00
Daniel Schürmann
d5821bdf7d radv: emit discard as demote by default 
Also removes radv_lower_discard_to_demote debug option.

Totals from 1506 (1.90% of 79439) affected shaders: (GFX11)
MaxWaves: 46432 -> 46448 (+0.03%)
Instrs: 664515 -> 667914 (+0.51%); split: -0.15%, +0.67%
CodeSize: 3569656 -> 3583440 (+0.39%); split: -0.12%, +0.51%
VGPRs: 50100 -> 49680 (-0.84%); split: -0.96%, +0.12%
Latency: 4221359 -> 4217875 (-0.08%); split: -0.67%, +0.59%
InvThroughput: 628809 -> 625565 (-0.52%); split: -0.53%, +0.02%
VClause: 9948 -> 9965 (+0.17%); split: -0.36%, +0.53%
SClause: 19656 -> 19695 (+0.20%); split: -0.77%, +0.97%
Copies: 32113 -> 33513 (+4.36%); split: -1.59%, +5.95%
Branches: 8406 -> 8378 (-0.33%)
PreSGPRs: 42328 -> 42555 (+0.54%); split: -0.39%, +0.93%
PreVGPRs: 38451 -> 38203 (-0.64%); split: -0.78%, +0.14%
VALU: 390770 -> 390208 (-0.14%); split: -0.16%, +0.02%
SALU: 43318 -> 46374 (+7.05%); split: -0.08%, +7.14%
VMEM: 15052 -> 15051 (-0.01%)
SMEM: 37225 -> 37215 (-0.03%); split: -0.03%, +0.01%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27617>
 2024-06-17 19:37:15 +00:00
Rhys Perry
167b6cac45 ac: stop using radeon_info for ac_get_hw_cache_flags 
This makes the function easier to use when radeon_info is not available.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243>
 2024-06-07 13:22:43 +00:00
Rhys Perry
e21312018e ac/llvm: remove support for sub-dword push constants 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480>
 2024-06-06 17:52:05 +00:00
Rhys Perry
61531b19cd ac/llvm: implement load_subgroup_id 
Usually this is lowered in NIR, but GFX12 needs to use an intrinsic.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466>
 2024-06-06 14:26:51 +00:00
Konstantin Seurer
b100d3f731 ac/llvm: Enable helper invocations for vote_all/any 
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293>
 2024-06-05 13:41:47 +00:00
Konstantin Seurer
2b38d4922e ac/llvm: Fix DENORM_FLUSH_TO_ZERO with exact instructions 
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293>
 2024-06-05 13:41:47 +00:00
Marek Olšák
35c5435eae ac/llvm: fix incorrect parameter type in llvm.amdgcn.s.nop 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313>
 2024-05-24 13:48:28 +00:00
Marek Olšák
5a115b1055 ac/llvm: global stores should have no holes in the writemask 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29282>
 2024-05-21 18:20:30 +00:00
Mike Lothian
3be436830e ac/llvm: Remove global access ops handling 
They have been lowered in nir

v2: Keep the _amd versions
v3: Fix if's with removed ops

Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29280>
 2024-05-20 18:41:20 +00:00
Marek Olšák
573b2b813a ac/llvm: improve/simplify/fix load_ssbo 
Effects:
- multi-component subdword handling removed because it's lowered
- 3-dword loads selected correctly instead of 4-dword loads
- the failure of dEQP-GLES3.functional.buffer.copy.subrange.large_to_small
  due to LLVM exposed by a future commit is mysteriously fixed by this

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
 2024-05-15 06:42:33 +00:00
Marek Olšák
686e5a03f5 ac/llvm: add a workaround for nir_intrinsic_load_constant for LLVM on gfx12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
546465e1ba ac/llvm: implement nir_intrinsic_ordered_xfb_counter_add_gfx12_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
5d94ec9ec4 ac/llvm: handle nir_atomic_op_ordered_add_gfx12_amd 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
542c7ee75f ac/nir: add ac_nir_sleep and handle the intrinsics 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
af9f04ad59 ac/llvm: update inline assembly for buffer_load_format_xyzw with TFE for gfx12 
Only the scope and the temporal hint are new.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
9d33e66ad6 ac/llvm: add CS SGPR changes for gfx12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:06 -04:00
Marek Olšák
a6c46509cc ac/llvm: use new s_wait instructions and split the existing ones for gfx12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Marek Olšák
12bca6123a ac/nir,llvm: add GS VGPR changes for gfx12 
See the big comment.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Marek Olšák
2adc66e586 amd: add initial common code for gfx12 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007>
 2024-05-11 22:14:05 -04:00
Marek Olšák
cce1aa4766 ac/llvm: always trim components of texture instructions, trim DMASK 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:09 +00:00
Marek Olšák
83a601d420 ac/llvm: fix assertions for texture instructions with 16-bit LOD bias 
A16 dictates the type.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28725>
 2024-04-24 19:17:09 +00:00
Marek Olšák
c1f750eed9 nir: add nir_intrinsic_optimization_barrier_sgpr_amd 
for radeonsi

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28606>
 2024-04-13 16:45:08 +00:00
Marek Olšák
8597870dcb ac/llvm: simplify the optimization barrier and apply it to the whole vector 
Use the same code as the pointer type. It works with all types and works
with any vector, but we need to handle i1 and v3i16 as special cases,
otherwise LLVM fails when it sees them. The previous code only extracted
the first component, which is not what we want.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
c7e30cdbbb ac/llvm: remove unused fields of ac_shader_abi 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
105e22f6fd ac/llvm: remove handling of input and output loads/stores that are lowered 
There is a lot that we still use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00
Marek Olšák
ce7ca0d80b ac/llvm: allow image loads to return less than 4 components, trim DMASK 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28607>
 2024-04-12 22:22:04 -04:00