Commit graph

115447 commits

Author SHA1 Message Date
Alyssa Rosenzweig
3d7874c699 panfrost/midgard: Fix integer selection
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:51 +00:00
Alyssa Rosenzweig
31f5a43bf0 panfrost: Support RGB565 FBOs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
f8c7ffa07a panfrost/midgard/disasm: Handle dest_override generalized
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
b6b534c733 panfrost/midgard/disasm: Stub out 64-bit
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
8c36ecd4b1 panfrost/midgard/disasm: Print 8-bit sources
This handles the usual case. 8-bit register access parallels 16-bit
access, but with one major caveat: in 8-bit mode, only half of the
register file is actually (directly) accessible as sources. In
particular, for each 16-bit integer register (hrN), we can only index a
*single* 8-bit integer (qrN), corresponding to the lower 8-bits. To get
the upper 8-bits, it is required to do an explicit shift. For example,
to add the bytes of a 16-bit integer hr0.x and get the result as an
8-bit qr0, you'd need to do something like:

   ilsr hr1.x, hr0.x, #8
   iadd qr0.x, qr0.x, qr1.x

This scheme diverges from 32-bit registers, in that both the upper and
lower halves of a 32-bit register are individually accessible as a pair
of half registers. For contrast, to add the lower and upper 16-bits of a
32-bit integer r0.x, you can just:

   iadd hr0.x, hr0.x, hr1.x

Since hr1.x = upper 16-bit of r0.x.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
2800e822a4 panfrost/midgard/disasm: Support 8-bit destination
Meanwhile, we're forced to disable dest_override, since it's not yet
clear how this interacts with other bitnesses (it'll likely need to be
overhauled in any case).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
d42c37e494 panfrost/midgard: Rename ilzcnt8 -> iclz
Per OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
9559280fc3 panfrost/midgard: Fix crash on unknown op
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
96eed4e04b panfrost/midgard/disasm: Fill in .int mod
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
7469df70c8 panfrost/midgard/disasm: Extend print_reg to 8-bit
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
055f6def30 panfrost/midgard/disasm: Catch mask errors
We silently ignored certain bits of the mask, which causes issues when
disassembly 8/64-bit ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Alyssa Rosenzweig
576a27fd55 panfrost/midgard: reg_mode_full -> reg_mode_32, etc
In preparation for 8-bit and 64-bit operands, let's not reinforce the
32-bit-centric biases in the ISA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2019-05-04 19:08:50 +00:00
Rob Clark
2da36dd0b6 freedreno/a6xx: deduplicate a few lines
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
555ca49d2b freedreno: add ubwc_enabled helper
Since it is dependent on the tile mode (ie. disabled for smaller mipmap
levels), we should handle it a similar way to fd_resource_level_linear().
The code previously mostly did the right thing because the old helper
took the tile mode.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
62c0b02717 freedreno: move UBWC color offset to fd_resource_offset()
Best to keep it encapsulated in the helper which returns layer/level
offset (and actually use that helper everywhere) rather than spreading
the logic around the code.

Also add a helper to find UBWC offset, to complete the encapsulation.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
a871b5ffaa freedreno/a6xx: buffer resources cannot be compressed
Small cleanup.  They are just an array of data and only ever linear/
uncompressed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
05f5122d4a freedreno: mark imported resources as valid
If someone is importing a buffer, we can't really know the state of it's
contents, so assume it is valid.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
11583dc655 freedreno/a6xx: UBWC support for images
There are still some fallbacks we'll need to handle before we can enable
UBWC by default.  I think we may need to fallback to uncompressed if
image atomic operations are used.  And we still need to sort out how to
handle image and sampler views of compressed resources if the image/
sampler view is using a format that does not support compression.  (I
think the latter should hopefully be uncommon outside of deqp/piglit.)

But at least this gets us to the point where supertuxkart works properly
with UBWC enabled ;-)

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
857d9f3b02 freedreno/a6xx: UBWC fixes
A few fixes that get UBWC working for the games/benchmarks where I
noticed problems before (in particular and manhattan, and stk (modulo
image support for UBWC when compute shaders are used for post-process
effects):

  + fix the size of the UBWC meta buffer (ie, the offset to color
    pixel data) that is returned by ->fill_ubwc_buffer_sizes()
  + correct size/layout for 8 and 16 byte per pixel formats
  + limit the supported formats.. Note all formats that can be
    tiled can be compressed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
6ffb58726b freedreno: update generated headers
Corrects tex state ubwc pitch/size

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
fb1488a800 freedreno/a6xx: OUT_RELOC vs OUT_RELOCW fixes
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Rob Clark
8c97b3c546 freedreno/ir3: remove assert
Fixes dEQP-GLES31.functional.ubo.random.all_per_block_buffers.13 and .20

ca3eb5db66 went from silently truncating
the constant state, which was also the wrong thing to do, to an assert.
Which then showed up in a couple of dEQPs.  Actually there is nothing
wrong with larger constant file so just drop the assert.

Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-05-04 11:50:44 -07:00
Karol Herbst
7f85283103 spirv/cl: support vload/vstore
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-05-04 12:27:51 +02:00
Karol Herbst
d11b807da5 nir: Add nir_op_vec helper
with that we can simplify code where nir vectors are created

v2: merge both lines in nir_vec

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-05-04 12:27:51 +02:00
Karol Herbst
681fb7ea05 nir: Add a nir_builder_alu variant which takes an array of components
v2: rename to nir_build_alu_src_arr

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-05-04 12:27:51 +02:00
Karol Herbst
c91ea6343f vtn: handle bitcast with pointer src/dest
v2: use vtn_push_ssa and vtn_ssa_value

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-05-04 12:27:51 +02:00
Mathias Fröhlich
c989661985 mesa: Leave aliasing of vertex and generic0 attribute to the dlist code.
Now that dlist compilation again knows if it is inside glBegin/glEnd,
we can leave the decision if aliasing should occur to the vertex attribute
setter functions instead of doing that at glArrayElement time.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
c869387d8a mesa: Correct the is_vertex_position decision for dlists.
We have to use _mesa_inside_dlist_begin_end instead of
_mesa_inside_begin_end to see if we are inside a glBegin/glEnd block in
case of display lists.
So split the is_vertex_position function used in vertex attribute processing
into a imm and dlist variant and use the appropriate _mesa_inside_begin_end
variant.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
5ad54217ff mesa: Set CurrentSavePrimitive in vbo_save_NotifyBegin.
That seems to be lost somewhere. Is needed for correct outside begin/end
detection in display list compilation. And is needed for correct aliasing
in dlists restablished in the next changes.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
0ed7603d97 mesa: Remove the _glapi_table argument from _mesa_array_element.
The value is now unused.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
3b6f32907f mesa: Constify static const array in api_arrayelt.c
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
68aaf0a4e3 mesa: Remove the now unused _NEW_ARRAY state change flag.
Is no longer used, so we have less occasions where NewState is non zero.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
7af047c373 mesa: Rip out now unused gl_context::aelt_context.
Now this part of gl_context state is unused and can be removed.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:35 +02:00
Mathias Fröhlich
b9de48581a mesa: Implement _mesa_array_element by walking enabled arrays.
In glArrayElement, use the bitmask trick to just walk the enabled
vao arrays. This should be about equivalent in execution time to
walk the prepare aelt_context list. Finally this will allow us to
reduce the _mesa_update_state calls in a few patches.

v2: Add comments.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:40:19 +02:00
Mathias Fröhlich
7a5dea6320 mesa: Use glVertexAttrib*NV functions for fixed function attribs.
In the glArrayElement implementation, use glVertexAttrib*NV type
functions for fixed function attributes. We do the same in display
execution when the list is replayed using immediate mode attribute
functions. Using a single set of function pointers enables to
use a unified loop to walk the vertex array attributes.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:39:42 +02:00
Mathias Fröhlich
60076a6171 mesa: Factor out index function that will have multiple use.
For access to glArrayElement methods factor out a function to
get the table lookup index for normalized/integer/double access.
The function will be used in the next patch at least twice.

v2: Use vertex_format_to_index instead of NORM_IDX.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
2019-05-04 07:39:18 +02:00
Jason Ekstrand
91899495a1 nir: Add a SSA type gathering pass
This new pass (which isn't even compile-tested) attempts to determine
the ALU type of all the SSA values in a function impl.  It takes a
greedy approach and assigns intness or floatness to everything it thinks
can possibly contain an int or a float.  Some values will be labled as
both int and float and some will be labled as neither and it is up to
the caller to decide what to do with this information.  However, for a
"nice" shader where the original source contained no bit-casts and no
implicit bit-casts were introduced by optimizations, there shouldn't be
any overlap in the two sets save for the odd CSEd zero constant.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
2019-05-04 03:52:05 +00:00
Kenneth Graunke
694d1a08d3 iris: Delete bucketing allocators
These add a lot of complexity, and I currently can't measure any
performance benefit from having them.  In the past, I seem to recall
seeing a benefit in drawoverhead scores, but currently it looks like
dropping them is either a wash or 1-2% faster.

Drop them to simplify allocations.
2019-05-03 19:50:26 -07:00
Kenneth Graunke
bd4b18d255 iris: Force VMA alignment to be a multiple of the page size.
This should happen regardless, but let's be paranoid.
2019-05-03 19:48:37 -07:00
Kenneth Graunke
068a700195 iris: leave the top 4Gb of the high heap VMA unused
This ports commit 9e7b0988d6 from anv
to iris.  Thanks to Lionel for noticing that it was missing!
2019-05-03 19:48:37 -07:00
Kenneth Graunke
21062e21d9 iris: Fix 4GB memory zone heap sizes.
The STATE_BASE_ADDRESS "Size" fields can only hold 0xfffff in pages,
and 0xfffff * 4096 = 4294963200, which is 1 page shy of 4GB.

So we can't use the top page.
2019-05-03 19:48:37 -07:00
Julien Isorce
8cd71f399e st/va: check resource_get_info nullity in vlVaDeriveImage
This pipe_screen function is not implemented by all backends.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110443
Signed-off-by: Julien Isorce <jisorce@oblong.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2019-05-03 16:11:55 -07:00
Jason Ekstrand
30fa15e36b anv,i965: Stop warning about incomplete gen11 support
Both drivers are feature-complete and should be running more-or-less at
perf at this point.  Drop the warning.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2019-05-03 22:57:35 +00:00
Connor Abbott
d0ea9877b8 nir/algebraic: Don't emit empty initializers for MSVC
Just don't emit the transform array at all if there are no transforms

v2:
- Don't use len(array) > 0 (Dylan)
- Keep using ARRAY_SIZE to make the generated C code easier to read
(Jason).
2019-05-04 00:13:21 +02:00
Kenneth Graunke
8987152ac1 iris: Resolve textures used by the program, not merely bound textures
st/mesa's PBO upload path binds a vertex shader that doesn't use any
textures, but leaves the existing sampler views bound in place.  This
was tricking us into thinking the PBO destination might be bound for
texturing in some cases.  In Civilization VI, this fixes a false self-
dependency issue that was preventing CCS_E compression on upload.
Fixing this slightly improves frame times.
2019-05-03 13:03:22 -07:00
Dylan Baker
c613861b23 meson: Don't build glsl cache_test when shader cache is disabled
v2: - Use new with_shader_cache variable instead of
      host_machine.system() == 'windows'

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-05-03 10:58:31 -07:00
Dylan Baker
a216aea7af tests/vma: fix build with MSVC
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-05-03 10:58:27 -07:00
Dylan Baker
5eb0f33e4f glsl/tests: define ssize_t on windows
Reviewed-by: Eric Anholt <eric@anholt.net>
2019-05-03 10:58:24 -07:00
Dylan Baker
76338933e9 util/tests: Use define instead of VLA
To allow the this test to be built with MSVC, which doesn't support
VLAs.

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-05-03 10:58:17 -07:00
Dylan Baker
ff9bf223c2 meson: make nm binary optional
This makes nm not required, but used if found. In general I imagine that
this means that on windows nm wont be found, and on other platforms it
will.

v2: - fix gbm and egl symbols check tests to only be run if nm is found
    - reword commit message to reflect the code change

Reviewed-by: Eric Anholt <eric@anholt.net>
2019-05-03 10:58:05 -07:00