Commit graph

97259 commits

Author SHA1 Message Date
Jason Ekstrand
87ffdbae1c anv: Stop advertising VK_KHX_multiview
We don't want to advertise experimental extensions in actual releases.
However, there's no harm in leaving the code lying around in the tree.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/intel/vulkan/anv_device.c
2018-02-09 04:20:27 +00:00
Lucas Stach
ac087eb40d renderonly: fix dumb BO allocation for non 32bpp formats
Take into account the resource format, instead of applying a hardcoded
32bpp. This not only over-allocates 16bpp formats, but also results in
a wrong stride being filled into the handle.

Fixes: 848b49b288 ("gallium: add renderonly library")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
(cherry picked from commit 0c71a19fe4)
2018-02-09 03:50:11 +00:00
Jason Ekstrand
6a7e3a152e anv/cmd_buffer: Re-emit the pipeline at every subpass
If we ever hit this edge-case, it can theoretically cause problem for
CNL because we could end up changing render targets without re-emitting
3DSTATE_MULTISAMPLE which is part of the pipeline.  Just get rid of the
edge case.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 97938dac36)
2018-02-09 03:50:11 +00:00
Dave Airlie
b75f12a2f2 r600/sb: insert the else clause when we might depart from a loop
If there is a break inside the else clause and this means we
are breaking from a loop, the loop finalise will want to insert
the LOOP_BREAK/CONTINUE instruction, however if we don't emit
the else there is no where for these to end up, so they will end
up in the wrong place.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101442
Tested-By: Gert Wollny <gw.fossdev@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 8d633f067b)
2018-02-09 03:50:10 +00:00
Emil Velikov
9161ac5c6d cherry-ignore: nir: mark unused space in packed_tex_data
stable: The commit covers nir serialise, which did not land in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Emil Velikov
56427ff05e cherry-ignore: add i965 shader cache fixes
The feature is available in the 18.0 branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Emil Velikov
e1ab1de6b6 cherry-ignore: add r600/amdgpu 18.0 nominations
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Emil Velikov
eaa9449c26 cherry-ignore: add gen10 fixes
Initial gen10 support landed in the 18.0 series.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Eleni Maria Stea
62e0a8893b mesa: Fix function pointers initialization in status tracker
We assigned the function that gets the device uuid to the GetDriverUuid
function pointer and the function that gets the driver uuid to the
GetDeviceUuid function pointer inside the state tracker. Exchanged the
pointers.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 8096b558a7)
[Emil Velikov: trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collaboral.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Conflicts:
	src/mesa/state_tracker/st_context.c
2018-02-09 03:50:10 +00:00
Emil Velikov
7e7b4c2c68 cherry-ignore: ac/nir: set amdgpu.uniform and invariant.load for UBOs
stable: The commit requires earlier commit w41c36c45 which did not land
in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Jason Ekstrand
ae5e793fd7 anv/pipeline: Don't look at blend state unless we have an attachment
Without this, we may end up dereferencing blend before we check for
binding->index != UINT32_MAX.  However, Vulkan allows the blend state to
be NULL so long as you don't have any color attachments.  This fixes a
segfault when running The Talos Principal.

Fixes: 12f4e00b69
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c8949e2498)
2018-02-09 03:50:10 +00:00
Jason Ekstrand
0bc9182f89 intel/fs: Use the original destination region for int MUL lowering
Some hardware (CHV, BXT) have special restrictions on register regions
when doing integer multiplication.  We want to respect those when we
lower to DxW multiplication.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 18fde36ced)

Squashed with:

i965/fs: Reset the register file to VGRF in lower_integer_multiplication

18fde36ced changed the way temporary
registers were allocated in lower_integer_multiplication so that we
allocate regs_written(inst) space and keep the stride of the original
destination register.  This was to ensure that any MUL which originally
followed the CHV/BXT integer multiply regioning restrictions would
continue to follow those restrictions even after lowering.  This works
fine except that I forgot to reset the register file to VGRF so, even
though they were assigned a number from alloc.allocate(), they had the
wrong register file.  This caused some GLES 3.0 CTS tests to start
failing on Sandy Bridge due to attempted reads from the MRF:

    ES3-CTS.functional.shaders.precision.int.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.int.lowp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.highp_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.mediump_mul_fragment.snbm64
    ES3-CTS.functional.shaders.precision.uint.lowp_mul_fragment.snbm64

This commit remedies this problem by, instead of copying inst->dst and
overwriting nr, just make a new register and set the region to match
inst->dst.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103626
Fixes: 18fde36ced
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit db682b8f0e)
2018-02-09 03:50:10 +00:00
Emil Velikov
a094314340 Revert "cherry-ignore: intel/fs: Use the original destination region for int MUL lowering"
This reverts commit 7295b97d61.

Originally the nomination was causing a regression. With that addressed,
we can pick it up alongside it's fix.
2018-02-09 03:50:10 +00:00
Chuck Atkins
557f2cd46c configure.ac: add missing llvm dependencies to .pc files
v2: Only add as dependencies for gallium-osmesa and gallium-xlib

CC: <mesa-stable@lists.freedesktop.org>
Signed-of-by: Chuck Atkins <chuck.atkins@kitware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 6ac5e851f1)
2018-02-09 03:50:10 +00:00
Emil Velikov
f23257b623 cherry-ignore: swr/rast: support llvm 3.9 type declarations
stable: The commit requires earlier commit 01ab218bbc which did not land
in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Dave Airlie
a78ff020c6 radv: move spi_baryc_cntl to pipeline
We need to enable the pos float location 2 mode anytime we have
persample not just when forced by the frag shader.

This fixes:
dEQP-VK.pipeline.multisample.min_sample_shading*

Fixes: 58c97a079 (radv: enable location at sample when persample is forced.)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 298554541d)
2018-02-09 03:50:10 +00:00
Emil Velikov
5ef3cadf15 cherry-ignore: meson: multiple fixes
stable: The commits address the Meson build that is explicitly disabled
in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:10 +00:00
Jason Ekstrand
4987b561b5 i965/surface_state: Drop brw_aux_surface_disabled
The only purpose of this function is to disable aux on texture surfaces
when the corresponding renderbuffer has aux disabled.  However, the act
of disabling aux on the renderbuffer will cause it to be resolved and
intel_miptree_texture_aux_usage will already check the resolved status
of a texture and return ISL_AUX_USAGE_NONE for it.  Even if we used CCS
for it, that wouldn't really be a problem because the CCS will be in the
pass-through state and so it would effectively be ignored.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 468ea3cc45)
2018-02-09 03:50:10 +00:00
Jason Ekstrand
468a2b6525 i965/miptree: Add an aux_disabled parameter to render_aux_usage
Only one of the callers of intel_miptree_render_aux_usage actually took
brw->draw_aux_buffer_disabled into account.  This was causing us to
ignore draw_aux_buffer_disabled for the intel_miptree_prepare_render.
This isn't a problem because the draw_aux_buffer_disabled entry was set
during texture preparation and we already did the resolve at that time.
However, this also meant that the aux_usage we were passing to
brw_cache_flush_for_render and brw_render_cache_add_bo was wrong so our
automatic cache flushing around aux_usage changes wasn't happening.
This was causing GPU hangs in Oxenfree.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104711
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104411
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104383
Fixes: ea0d2e98ec
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit d38ec24f53)
2018-02-09 03:50:10 +00:00
Jason Ekstrand
0dd5120ded i965/miptree: Take an aux_usage in prepare/finish_render
Both callers of intel_miptree_prepare/finish_render have to call
intel_miptree_render_aux_usage anyway for other reasons.  They may as
well pass the result in instead of us calling it again.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit dfe0217905)
2018-02-09 03:50:10 +00:00
Marek Olšák
1d7d13ffc6 radeonsi: don't ignore pitch for imported textures
Cc: 17.2 17.3 <mesa-stable@lists.freedesktop.org>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 022c5b22fe)
[Emil Velikov: attribute for lack of slice_size_dw]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

Conflicts:
	src/gallium/drivers/radeon/r600_texture.c
2018-02-09 03:50:10 +00:00
Boyuan Zhang
36e1b57bad radeon/uvd: add and manage render picture list
Create a list in decoder to store all render picture buffer pointers that
currently being used in reference picture lists.

During get message buffer call, check each pointer in render_pic_list[]
within given pic->ref[] list, remove pointer that no longer being used by
pic->ref[]. Then add current render surface pointer to the render_pic_list[]
and assign the associated index to result.curr_idx.

As a result, result.curr_idx will have the correct index to represent the
current render picture, instead of the previous increamenting values.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 2ec48039b8)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104745
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/gallium/drivers/radeon/radeon_uvd.c
2018-02-09 03:50:10 +00:00
Boyuan Zhang
2b6d2f6a81 radeon/vcn: add and manage render picture list
Create a list in decoder to store all render picture buffer pointers that
currently being used in reference picture lists.

During get message buffer call, check each pointer in render_pic_list[]
within given pic->ref[] list, remove pointer that no longer being used by
pic->ref[]. Then add current render surface pointer to the render_pic_list[]
and assign the associated index to result.curr_idx.

As a result, result.curr_idx will have the correct index to represent the
current render picture, instead of the previous increamenting values.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit f2bfd1cbb7)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104745
2018-02-09 03:50:10 +00:00
Indrajit Das
30a35f8d43 st/va: clear pointers for mpeg2 quantiser matrices
This is to fix VA-API issues with GStreamer and MPEG2.
Since gstreamer does not pass quantiser matrices with each frame, invalid
pointers were being passed to the driver. This patch addresses the same.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 338638a8af)
2018-02-09 03:50:09 +00:00
Indrajit Das
e46597f273 radeon/vcn: update quantiser matrices only when requested
Only update them when the pointers are valid.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit f5277e8492)
2018-02-09 03:50:09 +00:00
Indrajit Das
08ad68ea19 radeon/uvd: update quantiser matrices only when requested
Only upload them when the pointers are valid.

Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 38dee62c9a)
2018-02-09 03:50:09 +00:00
Indrajit Das
339b43b0af st/omx_bellagio: Update default intra matrix per MPEG2 spec
Signed-off-by: Indrajit Das <indrajit-kumar.das@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit e05d5b0cf3)
2018-02-09 03:50:09 +00:00
Emil Velikov
1bfeb763fb cherry-ignore: radv: fix sample_mask_in loading. (v3.1)
fixes: The commit requires earlier commit 49d035122e which did not land
in branch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-09 03:50:08 +00:00
Emil Velikov
c465067ff8 cherry-ignore: anv: add explicit 18.0 only nominations
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-25 05:09:02 +00:00
Emil Velikov
b31e232baa cherry-ignore: swr: refactor swr_create_screen to allow for proper cleanup on error
stable: The commit depends on earlier commit a4be2bcee2 which did not
land in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-25 05:09:01 +00:00
Emil Velikov
d20d97ec8f cherry-ignore: i965: Accept CONTEXT_ATTRIB_PRIORITY for brwCreateContext
stable: The commit addresses earlier commit 6d87500fe1 which did not
land in branch

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-25 05:08:57 +00:00
Dave Airlie
eaa3da4189 radv: don't use hw resolves for r16g16 norm formats.
radeonsi has a workaround for this, but it uses a R16A16 format,
which vulkan doesn't have, we could probably come up with a work
around but for now just avoid hw resolves.

Fixes:
dEQP-VK.renderpass.suballocation.multisample.r16g16_*norm*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 2a04f5481d (radv/meta: select resolve paths)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit c727ea9370)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_meta_resolve.c
2018-01-25 02:57:56 +00:00
Dave Airlie
c30a6252c2 radv: don't use hw resolve for integer image formats
From reading AMDVLK it currently never uses hw resolve paths.

This patch takes from radeonsi which doesn't use hw resolve
for integer formats, and does the same for radv.

This fixes:
dEQP-VK.renderpass.suballocation.multisample*uint tests.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 2a04f5481d (radv/meta: select resolve paths)
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4df414bbd2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/vulkan/radv_meta_resolve.c
2018-01-25 02:55:57 +00:00
Dave Airlie
1bd25a4d99 radv: add fs_key meta format support to resolve passes.
Some of the hw resolve passes need the SPI color format setup
correctly.

This fixes lots of 16-bit and 32-bit format tests in
dEQP-VK.renderpass.suballocation.multisample*

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 316d762186)
2018-01-25 02:52:34 +00:00
Samuel Pitoiset
5e889ae22c radv: create pipeline layout objects for all meta operations
They are dummy objects but the spec requires layout to not be
NULL, this just makes sure we are creating valid pipeline layout
objects. This will allow us to remove some useless checks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 3595a11648)
2018-01-25 02:52:20 +00:00
Eric Engestrom
558411c21e radeon: remove left over dead code
Fixes: 4e0d99a635 "r100: Use shared debug code"
Cc: Pauli Nieminen <suokkos@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit eee8dd7c33)
2018-01-25 02:46:25 +00:00
Bas Nieuwenhuizen
4a79113e2b ac/nir: Fix vector extraction if source vector has >4 elements.
v2: Add forgotten argument and start offset.

Fixes: 91074bb11b "radv/ac: Implement Float64 SSBO stores."
Tested-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit 32170d87e3)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2018-01-25 02:30:50 +00:00
Bas Nieuwenhuizen
022cdd4eaa ac/nir: Use correct 32-bit component writemask for 64-bit SSBO stores.
Fixes: 91074bb11b "radv/ac: Implement Float64 SSBO stores."
Tested-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
(cherry picked from commit f4211e6f93)
2018-01-25 02:26:30 +00:00
Timothy Arceri
a45a6ed808 ac: fix visit_ssa_undef() for doubles
V2: use LLVMIntTypeInContext()

Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 3bccb5dba9)
2018-01-25 02:26:18 +00:00
Dave Airlie
a060dc27b0 ac/nir: account for view index in the user sgpr allocation.
The view index user sgpr wasn't being accounted for properly,
this refactors out the code to decide if it's required and then
uses that info to account for it.

Fixes: 180c1b924e (ac/nir: Add shader support for multiviews.)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 3153d74207)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2018-01-25 02:24:37 +00:00
Timothy Arceri
78e1165645 ac: fix buffer overflow bug in 64bit SSBO loads
Fixes: 441ee1e65b "radv/ac: Implement Float64 SSBO loads"

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e2b9296146)
2018-01-25 02:13:19 +00:00
Samuel Thibault
ff06368950 glx: fix non-dri build
glXGetDriverConfig parameters do not provide a context to dynamically
check for the presence of the function, so the dispatcher directly calls
glXGetDriverConfig, but in non-dri builds dri_glx.c didn't provide
glXGetDriverConfig.

This change make it just return NULL in that case.

Fixes: 84f764a759 "glxglvnddispatch: Add missing dispatch for GetDriverConfig
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 47ac11bcf8)
2018-01-25 02:13:07 +00:00
Bas Nieuwenhuizen
ad764e365b ac/nir: Use instance_rate_inputs per attribute, not per variable.
This did the wrong thing if we had e.g. an array for which only some
of the attributes use the instance index. Tripped up some new CTS
tests.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 5a4dc28500)

Conflicts:
	src/amd/common/ac_nir_to_llvm.c
2018-01-25 02:09:22 +00:00
Jose Fonseca
473d665a4d svga: Prevent use after free.
Courtesy of clang static analyzer.

I was hunting for potential sources of memory corruption using Mesa with
a GL trace, and happened to find this (unrelated) issue.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit dcbb224c68)
2018-01-24 21:06:26 +00:00
Matthew Nicholls
93ffa56658 radv: restore previous stencil reference after depth-stencil clear
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alex Smith <asmith@feralinteractive.com>
(cherry picked from commit 005375717b)
2018-01-24 20:33:57 +00:00
Jason Ekstrand
623d843692 i965: Set tiling on BOs imported with modifiers
We need this to ensure that GTT maps work on buffers we get from Vulkan
on the off chance that someone does a readpixels or something.  Soon, we
will be removing GTT maps from i965 entirely and this can be reverted.
None the less, it's needed for stable.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 5048572352)
2018-01-24 20:33:57 +00:00
Jason Ekstrand
8ebfa265e2 i965/bufmgr: Add a create_from_prime_tiled function
This new function is an import and a set tiling in one go.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit b9e7b29705)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
	src/mesa/drivers/dri/i965/brw_bufmgr.c
2018-01-24 20:33:00 +00:00
Jason Ekstrand
9b2ac06cd6 i965/miptree: Use the tiling from the modifier instead of the BO
This fixes a bug where we were taking the tiling from the BO regardless
of what the modifier said.  When we got images in from Vulkan where it
doesn't set the tiling on the BO, we would treat them as linear even
though the modifier expressly said to treat it as Y-tiled.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ad424b2243)
2018-01-24 20:20:27 +00:00
Jason Ekstrand
be2a7b6a28 i965/miptree: Add an explicit tiling parameter to create_for_bo
Otherwise, create_for_bo will just grab the tiling from the BO which is
not what we want when using modifiers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0465dd13d2)
2018-01-24 20:20:27 +00:00
Bas Nieuwenhuizen
17647d08a5 radv: Don't allow 3d or 1d depth/stencil textures.
addrlib asserts when that happens, and supporting it is not
required so lets not allow this for now.

It also assert on fmask, but we don't have the number of samples here.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 4584c4ef04)
2018-01-24 20:20:27 +00:00