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1197 commits

Author SHA1 Message Date
Daniel Schürmann
3aaf5188fe aco: remove divergent branches which only jump over very few instructions 
Totals from 18436 (13.23% of 139391) affected shaders (NAVI10):
CodeSize: 138428504 -> 138172588 (-0.18%)
Instrs: 26605127 -> 26541176 (-0.24%)
Cycles: 1624994088 -> 1622461620 (-0.16%)
VMEM: 3689892 -> 3689102 (-0.02%)
SMEM: 1131767 -> 1131761 (-0.00%)
Branches: 851796 -> 787852 (-7.51%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7814>
(cherry picked from commit 288032a873)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
0d63d9463e aco: propagate swizzles when optimizing packed clamp & fma 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 412291ddef)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
71a58f02e5 aco: optimize v_pk_fma_f16 -> v_pk_fmac_f16 on GFX10 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 6ecbccfb23)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
4562f9f894 aco: optimize packed fneg 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit b03be30e07)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
3760fdf7e6 aco: optimize packed clamp 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit e3790fc458)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
28df87bbe2 aco: optimize packed mul+add to v_pk_fma_f16 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit a9fd9187e8)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
7f40dc9760 aco: simplify multiply-add combining 
When both operands of a v_sub (same apply for v_add) are mul and one
already uses clamp/omod, pick the other operand to get a chance to
combine to a MAD.

No fossils-db changes.

Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 01134b0bfe)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
6a7552aa10 aco: emit packed 16bit instructions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 454bbf8f23)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
01a7662154 aco: create helpers to emit vop3p instructions 
Also make get_alu_src() capable to return
unswizzled multi-component SGPR sources.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 5ad52ac906)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
65288fe496 aco: change usesModifiers() considering opsel_hi on packed instructions 
opsel_hi == 1 means that the high operand selects the
high bits of the input, which is the normal behavior.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 036a369f46)
 2021-01-13 11:24:11 -08:00
Daniel Schürmann
0319695645 aco: allow SGPRs on every src position for VOP3P 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 178b33c870)
 2021-01-13 11:24:10 -08:00
Daniel Schürmann
126cc30440 aco: allow constants/literals on every src position for VOP3P 
and prevent literals on VOP3P pre-GFX10.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 0db4263a3a)
 2021-01-13 11:24:10 -08:00
Daniel Schürmann
3714b68ec1 aco/RA: fix subdword operands on VOP3P instructions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 4a75a28698)
 2021-01-13 11:24:10 -08:00
Daniel Schürmann
ac4caa502f aco: fix VOP3P assembly, VN and validation 
aco/opcodes: rename v_pk_fma_mix* -> v_fma_mix*
and add modifier capabilities for VOP3P.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6680>
(cherry picked from commit 2caba08c1a)
 2021-01-13 11:24:10 -08:00
Rhys Perry
8301d483ff aco/tests: don't rely on argument evaluation order 
The argument evaluation order is implementation-defined and affects the
order the instructions are inserted.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3938
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7945>
 2021-01-13 13:04:26 +00:00
Timur Kristóf
4ee6d68d1f aco: Wait for stores when NGG or legacy VS can finish early. 
When there are no param exports in an NGG (or legacy VS) shader,
the NO_PC_EXPORT=1 is set, which means PS waves can launch before
the current stage finishes.

If the current stage has any stores, we need to make sure to wait for
those before we allow PS waves to start, so that PS can read what
these instructions stored.

Fossil DB results on Navi 10:
Totals from 45 (0.03% of 136420) affected shaders:
CodeSize: 87224 -> 87404 (+0.21%)
Instrs: 16750 -> 16795 (+0.27%)
Cycles: 69580 -> 69760 (+0.26%)
VMEM: 8022 -> 8167 (+1.81%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7868>
 2021-01-12 16:43:27 +00:00
Timur Kristóf
38da379b3e aco: Note if rasterization can start early. 
When there are no param exports in an NGG (or legacy VS) shader,
the NO_PC_EXPORT=1 is set by RADV, which means PS waves can launch
before the current stage finishes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7868>
 2021-01-12 16:43:27 +00:00
Daniel Schürmann
00cf077c15 aco/ra: fix infinite recursion in get_reg_simple() with subdword registers 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Fixes: f8c7661eca ('aco: try to better align 8+ dword SGPR vectors')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00
Daniel Schürmann
7b669ff789 aco: simplify and fix operand/definition sizes 
These are mainly needed for constant propagation
and subdword register allocation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00
Daniel Schürmann
d495a5c183 radv: enable .lower_ineg 
We already emit ineg as isub most of the time.

The results are a bit mixed, but shouldn't really make a difference.
A couple of additional copies are needed as isub writes scc.

Totals from 5975 (4.29% of 139391) affected shaders:
CodeSize: 31508648 -> 31509264 (+0.00%); split: -0.00%, +0.00%
Instrs: 6073379 -> 6073531 (+0.00%); split: -0.00%, +0.00%
Cycles: 47186280 -> 47187116 (+0.00%); split: -0.00%, +0.00%
VMEM: 2528515 -> 2529139 (+0.02%); split: +0.03%, -0.01%
SMEM: 596842 -> 596924 (+0.01%); split: +0.02%, -0.00%
SClause: 280596 -> 280594 (-0.00%)
Copies: 288554 -> 288669 (+0.04%); split: -0.00%, +0.04%
PreSGPRs: 240390 -> 240397 (+0.00%)
PreVGPRs: 349630 -> 349749 (+0.03%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00
Rhys Perry
04e3d7ad93 aco: improve nir_op_vec with constant operands 
Could still be improved a little. For example, 8-bit pack without
constants could be:
(s_pack_ll(x, z) & 0x00ff00ff) | ((s_pack_ll(y, w) & 0x00ff00ff) << 8)

fossil-db (Sienna):
Totals from 136 (0.10% of 139391) affected shaders:
CodeSize: 279776 -> 278144 (-0.58%)
Instrs: 50742 -> 50470 (-0.54%)
Cycles: 211560 -> 210472 (-0.51%)
SMEM: 3607 -> 3557 (-1.39%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8421>
 2021-01-12 15:50:54 +00:00
Samuel Pitoiset
c24d6916e6 aco: fix inserting expcnt for MIMG on GFX6 
MIMG VDATA has moved to its own operand.

Fixes: 962c917cea ("aco: move MIMG VDATA to its own operand")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8435>
 2021-01-12 11:32:12 +00:00
Rhys Perry
4ea0ce2f55 aco: remove can_reorder semantic in get_sync_info_with_hack 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8416>
 2021-01-11 16:35:19 +00:00
Rhys Perry
f8c7661eca aco: try to better align 8+ dword SGPR vectors 
This doesn't have much of an effect, but it helps avoid a
pathological case for Assassin's Creed Valhalla and a RDR2 shader with a
future change.

fossil-db (Sienna):
Totals from 55074 (39.51% of 139391) affected shaders:
SGPRs: 3515076 -> 3567744 (+1.50%); split: -0.01%, +1.51%
CodeSize: 206942120 -> 206941868 (-0.00%); split: -0.00%, +0.00%
Instrs: 39625900 -> 39625837 (-0.00%); split: -0.00%, +0.00%
Cycles: 1640088780 -> 1640088828 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4070
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8416>
 2021-01-11 16:35:19 +00:00
Timur Kristóf
b75d8052a7 aco: Spill more optimally before loops. 
This further reduces the dead code emitted by the spiller.
Some minimal amount of dead IR is still emitted sometimes,
but that doesn't generate any compiled code at the end.

Totals from 1953 (1.40% of 139391) affected shaders:
VGPRs: 206980 -> 206588 (-0.19%)
SpillSGPRs: 24719 -> 16423 (-33.56%); split: -33.58%, +0.02%
CodeSize: 28448516 -> 28343836 (-0.37%); split: -0.38%, +0.01%
MaxWaves: 8960 -> 8992 (+0.36%)
Instrs: 5422049 -> 5408334 (-0.25%); split: -0.26%, +0.01%
Cycles: 511240864 -> 512460764 (+0.24%); split: -0.02%, +0.26%
VMEM: 346681 -> 346468 (-0.06%); split: +0.27%, -0.33%
SMEM: 124160 -> 122802 (-1.09%); split: +0.33%, -1.42%
VClause: 81102 -> 81163 (+0.08%); split: -0.01%, +0.09%
SClause: 174404 -> 174237 (-0.10%); split: -0.23%, +0.13%
Copies: 530216 -> 532961 (+0.52%); split: -0.90%, +1.42%
Branches: 189114 -> 189221 (+0.06%); split: -0.13%, +0.18%
PreSGPRs: 206017 -> 206526 (+0.25%); split: -0.08%, +0.33%
PreVGPRs: 183103 -> 182964 (-0.08%)

Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8026>
 2021-01-11 12:25:29 +00:00
Timur Kristóf
b03fbec4f1 aco: Keep live-though variables and constants spilled. 
This noticably reduces the amount of dead code emitted by our
spiller, when eg. previously a constant was spilled then
rematerialized before a loop, but then spilled again inside the loop.

Fossil DB changes on Navi 10:
Totals from 263 (0.19% of 139391) affected shaders:
VGPRs: 30044 -> 30028 (-0.05%)
SpillSGPRs: 8800 -> 4948 (-43.77%)
CodeSize: 4496040 -> 4335448 (-3.57%); split: -3.57%, +0.00%
Instrs: 843942 -> 819219 (-2.93%); split: -2.93%, +0.00%
Cycles: 76485744 -> 73549080 (-3.84%); split: -4.04%, +0.20%
VMEM: 38204 -> 38147 (-0.15%); split: +0.08%, -0.23%
SMEM: 17872 -> 17959 (+0.49%)
SClause: 24298 -> 24012 (-1.18%)
Copies: 98023 -> 82960 (-15.37%); split: -15.38%, +0.01%
Branches: 29074 -> 27632 (-4.96%)
PreVGPRs: 25291 -> 25241 (-0.20%)

Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8026>
 2021-01-11 12:25:29 +00:00
Rhys Perry
a502aa7b04 aco: form sparse load clauses 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
0bd14be962 aco: implement sparse image loads 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
382f50ad2c aco: implement sparse texture fetches 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
5a4f6313b1 aco: implement nir_op_vec5 
Since sparse fetch/load uses vec5 destinations, it may be possible that we
encounter nir_op_vec5.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
962c917cea aco: move MIMG VDATA to its own operand 
We will want both a VDATA operand and a sampler for some TFE/LWE MIMG
instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
2aaf52bb85 aco: fix MIMG_instruction::lwe comment 
The ISA docs were inconsistent about what this flag does, but that seems
fixed in the RDNA doc.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7775>
 2021-01-08 14:27:07 +00:00
Rhys Perry
816b7fb5cb aco: fix unreachable() for uniform 8/16-bit nir_op_mov from VGPR 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: d20a752c0d ("aco: use Builder::copy more")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8380>
 2021-01-08 12:54:36 +00:00
Samuel Pitoiset
d2f4934121 radv/llvm,aco: always split typed vertex buffer loads on GFX6 and GFX10+ 
To avoid any alignment issues that triggers memory violations and
eventually a GPU. This can happen if the stride (static or dynamic)
is unaligned and also if the VBO offset is aligned to scalar
(eg. stride is 8 and VBO offset is 2 for R16G16B16A16_SNORM).

The AMD Windows driver also always splits typed vertex fetches.

fossils-db (Sienna Cichlid):
Totals from 56508 (40.54% of 139391) affected shaders:
SGPRs: 2643545 -> 2664516 (+0.79%); split: -0.19%, +0.98%
VGPRs: 2007472 -> 1995408 (-0.60%); split: -0.74%, +0.13%
CodeSize: 70596372 -> 73913312 (+4.70%); split: -0.00%, +4.70%
MaxWaves: 772653 -> 774916 (+0.29%); split: +0.37%, -0.08%
Instrs: 14074162 -> 14567072 (+3.50%); split: -0.00%, +3.51%
Cycles: 69281276 -> 71253252 (+2.85%); split: -0.00%, +2.85%
VMEM: 22047039 -> 25554196 (+15.91%); split: +17.20%, -1.29%
SMEM: 4120370 -> 4360820 (+5.84%); split: +7.41%, -1.58%
VClause: 416913 -> 438361 (+5.14%); split: -1.86%, +7.01%
SClause: 536739 -> 542637 (+1.10%); split: -0.33%, +1.43%
Copies: 977194 -> 970015 (-0.73%); split: -2.43%, +1.69%
Branches: 241205 -> 241193 (-0.00%); split: -0.06%, +0.06%
PreVGPRs: 1505645 -> 1505379 (-0.02%)

This fixes GPU hangs with bin/draw-vertices from Piglit on GFX10+
with Zink.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8363>
 2021-01-07 17:28:00 +00:00
Samuel Pitoiset
68c2537062 aco: fix creating the dest vector when 16-bit vertex fetches are splitted 
Compute the number of components of the destination vector from the
bitsize when eg. a 16-bit vec2 vertex fetches is splitted. This is
because the dst will be a v1, so the p_create_vector should be created
from two v2b fro both sizes to match.

This prevents a regression from the next change which will split
typed vertex buffer loads on GFX6 and GFX10+.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8363>
 2021-01-07 17:28:00 +00:00
Rhys Perry
b2d000513e aco: fix incorrect address calculation for load_barycentric_at_sample 
Fix address calculation for indirect load_barycentric_at_sample on GFX6-8
with a uniform sample index.

A non-zero uniform sample index does not seem to be tested by CTS.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3966
Fixes: 93c8ebfa78 ("aco: Initial commit of independent AMD compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8302>
 2021-01-04 16:53:29 +00:00
Tony Wasserka
9d59c84e31 aco/ra: Avoid redundant RegisterFile copies in get_reg_impl 
Now that this function does not block RegisterFile entries anymore,
the temporary copy is only needed upon reaching the collect_vars call.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8261>
 2020-12-30 17:36:33 +01:00
Tony Wasserka
6b538506f2 aco/ra: Fix register allocation for subdword operands 
ACO attempts to store the output of an instruction in the same register
occupied by its operands where possible. Importantly this only works if
the operands are large enough to store the result register size. The code
failed to consider subdword operands when checking for this, causing
entire register slots to be freed up even though subdword parts were still
used.

In Mafia 3, this affected the following code:
v2b: %363:v[2][0:16],  v2b: %362:v[2][16:32] = p_split_vector %360:v[2]
v1:  %116:v[2] = v_cvt_f32_f16 %362:v[2][16:32]
v1:  %117:v[2] = v_cvt_f32_f16 %363:v[2][0:16]
where v[2] is allocated to %116 even though its original lower 16 bits are
still used in the instruction after.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3717
Fixes: 031edbc4a5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
187b185502 aco/ra: Add some documentation 
This should make these somewhat tricky bits easier to follow.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
b841b4fde8 aco: Add tests for subdword register allocation 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
6a246f5c6d aco/tests: Fix deadlock for too large test lists 
The write() to the communication pipe shared with check_output.py would block
for large test output streams since the pipe's consumer wouldn't be launched
until the write already completed.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
a240341ec9 aco/tests: Allow specifiying the test subvariant in setup_cs 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
05ca6758cb aco/tests: Fix GFX10_3 being printed as gfx11 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Tony Wasserka
d06abc263d aco/ra: Add policy parameter to select implementation details for testing 
This new policy parameter allows disabling the optimistic path of get_reg
(i.e. get_reg_simple) to improve test coverage of the pessimistic path
provided by get_reg_impl.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
 2020-12-29 18:57:10 +00:00
Daniel Schürmann
b1e12747b9 aco: create VMEM clauses slightly more aggressive 
Totals from 3325 (2.39% of 139391) affected shaders (NAVI10):
SGPRs: 331528 -> 331056 (-0.14%); split: -0.14%, +0.00%
VGPRs: 306164 -> 337764 (+10.32%); split: -0.02%, +10.34%
CodeSize: 38843180 -> 38865388 (+0.06%); split: -0.04%, +0.10%
MaxWaves: 18908 -> 17028 (-9.94%); split: +0.01%, -9.95%
Instrs: 7423908 -> 7427934 (+0.05%); split: -0.06%, +0.12%
Cycles: 527411756 -> 526388408 (-0.19%); split: -0.21%, +0.02%
VMEM: 1148421 -> 992660 (-13.56%); split: +0.10%, -13.67%
SMEM: 227337 -> 232380 (+2.22%); split: +2.26%, -0.04%
VClause: 146416 -> 111171 (-24.07%); split: -24.10%, +0.03%
SClause: 243674 -> 243689 (+0.01%); split: -0.00%, +0.01%
Copies: 663496 -> 660333 (-0.48%); split: -0.85%, +0.37%
Branches: 223725 -> 223721 (-0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00
Daniel Schürmann
ac40301dbb aco: schedule position exports in the same pass as memory operations 
No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00
Daniel Schürmann
0287ebeef3 aco: fix def-use distance calculation when scheduling. 
This change also increases the VMEM_MAX_MOVES
to mitigate some of the scheduling changes.

Totals from 34301 (24.61% of 139391) affected shaders:
SGPRs: 2515440 -> 2552304 (+1.47%); split: -1.25%, +2.71%
VGPRs: 1786676 -> 1794724 (+0.45%); split: -0.31%, +0.76%
CodeSize: 151079856 -> 151209828 (+0.09%); split: -0.06%, +0.15%
MaxWaves: 392454 -> 388966 (-0.89%); split: +0.39%, -1.28%
Instrs: 28870746 -> 28895907 (+0.09%); split: -0.09%, +0.17%
Cycles: 960450680 -> 961315796 (+0.09%); split: -0.09%, +0.18%
VMEM: 19027987 -> 19796223 (+4.04%); split: +7.49%, -3.45%
SMEM: 2434691 -> 2394829 (-1.64%); split: +2.80%, -4.43%
VClause: 551776 -> 543051 (-1.58%); split: -1.73%, +0.15%
SClause: 1230147 -> 1227637 (-0.20%); split: -1.40%, +1.20%
Copies: 1957640 -> 1963617 (+0.31%); split: -1.11%, +1.41%
Branches: 611747 -> 612504 (+0.12%); split: -0.11%, +0.23%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00
Daniel Schürmann
3f14140f48 aco: allow to schedule SALU/SMEM through exec changes 
Totals from 16794 (12.05% of 139391) affected shaders (NAVI10):
SGPRs: 757760 -> 762048 (+0.57%); split: -0.39%, +0.95%
VGPRs: 402844 -> 402744 (-0.02%); split: -0.04%, +0.02%
CodeSize: 22290900 -> 22285068 (-0.03%); split: -0.06%, +0.04%
MaxWaves: 294163 -> 294222 (+0.02%); split: +0.03%, -0.01%
Instrs: 4190074 -> 4188513 (-0.04%); split: -0.08%, +0.04%
Cycles: 40685028 -> 40678640 (-0.02%); split: -0.03%, +0.02%
VMEM: 7711867 -> 7704315 (-0.10%); split: +0.28%, -0.38%
SMEM: 942472 -> 1007052 (+6.85%); split: +7.15%, -0.30%
VClause: 92990 -> 92974 (-0.02%); split: -0.03%, +0.01%
SClause: 263700 -> 263810 (+0.04%); split: -0.38%, +0.42%
Copies: 277467 -> 276988 (-0.17%); split: -0.37%, +0.20%
Branches: 45899 -> 45896 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00
Daniel Schürmann
4a70c4d383 aco: make pred_by_exec_mask() accessible in other files 
and rename to needs_exec_mask().

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00
Daniel Schürmann
2116b4504e aco: don't emit parallelcopy when switching to WQM. 
The reason was an RA bug which has been fixed a while ago.
This change fixes some register demand miscalculations.

Totals from 1013 (0.73% of 139391) affected shaders (NAVI10):
CodeSize: 6050408 -> 6047504 (-0.05%); split: -0.05%, +0.00%
Instrs: 1160533 -> 1159765 (-0.07%); split: -0.07%, +0.00%
Cycles: 8027212 -> 8024140 (-0.04%); split: -0.04%, +0.00%
VMEM: 296195 -> 296091 (-0.04%)
SMEM: 73003 -> 73011 (+0.01%); split: +0.05%, -0.04%
SClause: 37221 -> 37222 (+0.00%)
Copies: 70931 -> 70166 (-1.08%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7903>
 2020-12-22 15:08:40 +01:00