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aco: Add tests for subdword register allocation
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7461>
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5 changed files with 86 additions and 1 deletions
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@ -351,7 +351,7 @@ bool validate_ir(Program* program)
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has_literal |= op.isLiteral();
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}
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check(!is_subdword || !has_const_sgpr || program->chip_class >= GFX9,
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check(!is_subdword || !has_const_sgpr || program->chip_class >= GFX9 || instr->opcode == aco_opcode::p_unit_test,
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"Sub-dword pseudo instructions can only take constants or SGPRs on GFX9+", instr.get());
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}
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@ -165,6 +165,25 @@ void finish_opt_test()
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aco_print_program(program.get(), output);
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}
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void finish_ra_test(ra_test_policy policy)
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{
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finish_program(program.get());
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if (!aco::validate_ir(program.get())) {
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fail_test("Validation before register allocation failed");
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return;
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}
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program->workgroup_size = program->wave_size;
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aco::live live_vars = aco::live_var_analysis(program.get());
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aco::register_allocation(program.get(), live_vars.live_out, policy);
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if (aco::validate_ra(program.get())) {
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fail_test("Validation after register allocation failed");
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return;
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}
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aco_print_program(program.get(), output);
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}
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void finish_to_hw_instr_test()
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{
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finish_program(program.get());
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@ -67,6 +67,10 @@ extern aco::Builder bld;
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extern aco::Temp exec_input;
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extern aco::Temp inputs[16];
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namespace aco {
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struct ra_test_policy;
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}
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void create_program(enum chip_class chip_class, aco::Stage stage,
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unsigned wave_size=64, enum radeon_family family=CHIP_UNKNOWN);
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bool setup_cs(const char *input_spec, enum chip_class chip_class,
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@ -76,6 +80,7 @@ bool setup_cs(const char *input_spec, enum chip_class chip_class,
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void finish_program(aco::Program *program);
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void finish_validator_test();
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void finish_opt_test();
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void finish_ra_test(aco::ra_test_policy);
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void finish_to_hw_instr_test();
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void finish_assembler_test();
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@ -26,6 +26,7 @@ aco_tests_files = files(
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'test_builder.cpp',
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'test_isel.cpp',
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'test_optimizer.cpp',
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'test_regalloc.cpp',
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'test_to_hw_instr.cpp',
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'test_tests.cpp',
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)
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60
src/amd/compiler/tests/test_regalloc.cpp
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60
src/amd/compiler/tests/test_regalloc.cpp
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@ -0,0 +1,60 @@
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/*
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* Copyright © 2020 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "helpers.h"
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using namespace aco;
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BEGIN_TEST(regalloc.subdword_alloc.reuse_16bit_operands)
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/* Registers of operands should be "recycled" for the output. But if the
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* input is smaller than the output, that's not generally possible. The
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* first v_cvt_f32_f16 instruction below uses the upper 16 bits of v0
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* while the lower 16 bits are still live, so the output must be stored in
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* a register other than v0. For the second v_cvt_f32_f16, the original
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* value stored in v0 is no longer used and hence it's safe to store the
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* result in v0.
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*/
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for (chip_class cc = GFX8; cc < NUM_GFX_VERSIONS; cc = (chip_class)((unsigned)cc + 1)) {
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for (bool pessimistic : { false, true }) {
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const char* subvariant = pessimistic ? "/pessimistic" : "/optimistic";
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//>> v1: %_:v[#a], s2: %_:exec = p_startpgm
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if (!setup_cs("v1", (chip_class)cc, CHIP_UNKNOWN, subvariant))
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return;
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//! v2b: %_:v[#a][0:16], v2b: %res1:v[#a][16:32] = p_split_vector %_:v[#a]
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Builder::Result tmp = bld.pseudo(aco_opcode::p_split_vector, bld.def(v2b), bld.def(v2b), inputs[0]);
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//! v1: %_:v[#b] = v_cvt_f32_f16 %_:v[#a][16:32]
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//! v1: %_:v[#a] = v_cvt_f32_f16 %_:v[#a][0:16]
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//; success = (b != a)
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auto result1 = bld.vop1(aco_opcode::v_cvt_f32_f16, bld.def(v1), tmp.def(1).getTemp());
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auto result2 = bld.vop1(aco_opcode::v_cvt_f32_f16, bld.def(v1), tmp.def(0).getTemp());
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writeout(0, result1);
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writeout(1, result2);
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finish_ra_test(ra_test_policy { pessimistic });
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}
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}
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END_TEST
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