Chia-I Wu
045bf0db52
ilo: honor surface padding requirements
...
The PRM specifies several padding requirements that we failed to honor.
2013-07-10 12:40:22 +08:00
Chia-I Wu
39226705b7
ilo: update winsys interface
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The motivation is to kill tiling and pitch in struct intel_bo. That requires
us to make tiling and pitch not queryable, and be passed around as function
parameters.
2013-06-12 17:46:52 +08:00
Chia-I Wu
cdfb2163c4
ilo: get rid of function tables in winsys
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We are moving toward making struct intel_bo alias drm_intel_bo. As a first
step, we cannot have function tables.
2013-06-12 17:46:52 +08:00
Chia-I Wu
3f79188854
ilo: remove unnecessary tex_set_bo/buf_set_bo
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Merge the bodies to tex_create_bo/buf_create_bo respectively.
2013-06-12 17:46:52 +08:00
Chia-I Wu
6b894e6900
ilo: add support for stencil resources on GEN7+
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For allocations, we need to support stencil-only and separate stencil
resources. For mapping, we need to support software tiling and
packing/unpacking for separate stencil resources.
2013-05-16 18:20:17 +08:00
Chia-I Wu
ca349e0217
ilo: simplify ilo_texture_get_slice_offset()
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Always return a tile-aligned offset. Also fix for W tiling.
2013-05-15 15:08:54 +08:00
Chia-I Wu
176ad54c04
ilo: rework ilo_texture
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Use ilo_buffer for buffer resources and ilo_texture for texture resources. A
major cleanup is necessitated by the separation.
2013-05-14 16:07:22 +08:00
Chia-I Wu
768296dd05
ilo: rename ilo_resource to ilo_texture
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In preparation for the introduction of ilo_buffer.
2013-05-14 16:01:25 +08:00
Chia-I Wu
528ac68f7a
ilo: move transfer-related functions to a new file
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Resource mapping is distinct from resource allocation, and is going to get
more and more complex. Move the related functions to a new file to make the
separation clear.
2013-05-14 16:01:20 +08:00
Vinson Lee
5471e3949c
ilo: Initialize read_back in transfer_map_sys.
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Fixes "Uninitialized scalar variable" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2013-05-10 15:29:40 +08:00
Chia-I Wu
a8e4614071
ilo: add support for PIPE_FORMAT_ETC1_RGB8
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It is decompressed to and stored as PIPE_FORMAT_R8G8B8X8_UNORM on-the-fly.
2013-05-09 16:05:48 +08:00
Chia-I Wu
183ea823fd
ilo: support mapping with a staging system buffer
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It can be used for unpacking compressed texture on-the-fly or to support
explicit transfer flushing.
2013-05-09 16:05:47 +08:00
Chia-I Wu
baa44db065
ilo: allow for different mapping methods
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We want to or need to use a different mapping method when when the resource is
busy, the bo format differs from the requested format, and etc.
2013-05-09 16:05:47 +08:00
Chia-I Wu
7cca1aac9d
ilo: allow bo format to differ from that requested
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For separate stencil buffer or formats not supported natively, the real format
of the bo may differ from that requested.
2013-05-09 16:05:47 +08:00
Chia-I Wu
dd62e7bc02
ilo: fix tiling/size for special-purpose resources
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We do not allocate such resources yet though.
2013-05-01 12:00:32 +08:00
Chia-I Wu
7726e9500c
ilo: use UMS layout for render targets
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As we do not advertise MSAA support, this change should not make any
difference yet.
2013-05-01 11:56:43 +08:00
Chia-I Wu
334abed828
ilo: support and prefer compact array spacing
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There is no reason to waste the memory when the HW can support compact array
spacing (ARYSPC_LOD0).
2013-05-01 11:31:15 +08:00
Chia-I Wu
bb1f635dcc
ilo: add ilo_dev_info shared by the screen and contexts
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The struct is used to describe the device information, such as PCI ID, GEN,
GT, and etc.
2013-05-01 11:20:41 +08:00
Chia-I Wu
d3602dfac6
ilo: add GEN6 GPE
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GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D
commands and states.
2013-04-26 16:16:43 +08:00
Chia-I Wu
8f949bc1da
ilo: hook up pipe context transfer functions
2013-04-26 16:16:42 +08:00
Chia-I Wu
3a4a570c34
ilo: hook up pipe screen resource functions
2013-04-26 16:16:42 +08:00
Chia-I Wu
63b5720105
ilo: new pipe driver for Intel GEN6+
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This commit adds some boilerplate code. The header files found under include/
are copied from i965.
2013-04-26 16:16:41 +08:00
