Brian
b02fc94834
gallium/i915: compute vertex size _after_ state validation in emit_prim().
...
Fixes crash when drawing aa lines.
2008-02-25 17:01:20 -07:00
Brian
bc3f2c908e
Added line smooth test
2008-02-25 16:26:37 -07:00
Brian
09ba1dd4cc
gallium: clamp line width when creating raster state object
2008-02-25 16:25:24 -07:00
Brian
99047e0968
gallium/i915: plug in aaline draw stage
2008-02-25 16:24:47 -07:00
Brian
92650aeadd
gallium/i915: make sure state is up to date in i915_vbuf_render_get_vertex_info(), also disable bogus assertion
2008-02-25 16:22:58 -07:00
Brian
f41e957557
gallium/i915: need to recompute vertex info if vertex shader changes
2008-02-25 16:20:04 -07:00
Oliver McFadden
57f310b2c9
r300: Corrected a cache flush bug in r300EmitCacheFlush.
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Corrects commit 74ae5a875d
2008-02-25 23:18:15 +00:00
Brian
b53110c789
gallium/i915: call draw_flush() in i915_flush()
2008-02-25 16:16:07 -07:00
Oliver McFadden
40a3b16183
r300: Moved the state code into separate functions.
2008-02-25 22:52:27 +00:00
Brian
cc0cf1154b
gallium: fix bad ptr assignment
2008-02-25 15:34:46 -07:00
Christoph Brill
0253357e16
[r300] revert complete stupid changes
2008-02-25 23:20:23 +01:00
Christoph Brill
7d83618f99
[r300] Document registers completed 10.1 to 10.3
2008-02-25 23:08:02 +01:00
Christoph Brill
4cba59f8e7
[r300] Add more register from the AMD spec
2008-02-25 23:04:17 +01:00
Christoph Brill
ed29d145f4
[r300] Document POLY_MODE and add some TODOs that might have triggered some bugs
2008-02-25 22:55:13 +01:00
Brian
846b7fbc6c
gallium/i915: use draw_find_vs_output() directly, fix broken fogcoords.
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We now produce the correct 915 vertex layout regardless of the order in
which fragment shader inputs are declared.
2008-02-25 14:48:31 -07:00
Brian
c037b4d45a
softpipe: use draw_find_vs_output() directly
2008-02-25 14:47:13 -07:00
Brian
d6c7f7e314
gallium: modify draw_find_vs_output() to search vertex shader outputs
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This simplifies drivers using the draw module and removes the last dependency
on vertex-shader "internals". Since the draw module is producing the
post-transformed vertices, it makes sense to ask it where specific vertex
attributes are located.
This could also simplify some things in the state tracker code for selection,
feedback, rasterpos...
2008-02-25 14:46:42 -07:00
Christoph Brill
090e2adaa8
[r300] Document some registers in the POINT area
2008-02-25 22:45:36 +01:00
Christoph Brill
a7fa3e093c
[r300] Further document and add register definitions (found bugs in LINE handling)
2008-02-25 22:36:16 +01:00
Christoph Brill
60e1703727
[r300] Sync fog color register names
2008-02-25 21:48:25 +01:00
Christoph Brill
fa088bfe9d
[r300] Sync fog register names to the AMD spec
2008-02-25 21:44:11 +01:00
Christoph Brill
d08b1fe2a4
[r300] Further document FG_ALPHA_FUNC (renamed from R300_PP_ALPHA_TEST) and finally add some information to R300_RB3D_DSTCACHE_CTLSTAT
2008-02-25 21:35:13 +01:00
Christoph Brill
f399ed7d55
[r300] Document R300_RB3D_COLORMASK properly and rename it to RB3D_COLOR_CHANNEL_MASK
2008-02-25 21:04:23 +01:00
Christoph Brill
6087b00b27
[r300] Add register definitions based on AMD spec starting with chapter 10
2008-02-25 20:54:23 +01:00
Christoph Brill
a195f7162a
[r300] Add some more register from the AMD spec in the area of AARESOLVE
2008-02-25 20:30:40 +01:00
Christoph Brill
74ae5a875d
[r300] Sync the names for Z-Buffer registers with the AMD spec
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This patch tries to get the Z-Buffer register names in sync with the AMD spec
so that talking to AMD engineers is much simpler.
2008-02-25 20:24:00 +01:00
Christoph Brill
1b51c135fc
[r300] Add more struct names for r300_hw_state
2008-02-25 20:20:59 +01:00
Christoph Brill
02926a2977
[r300] rename all unkown structs r300_hw_state to readable names
2008-02-25 20:18:10 +01:00
Christoph Brill
86039ae413
[r300] Add RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD and some HyperZ defintions
2008-02-25 20:15:20 +01:00
Christoph Brill
df344b171c
[r300] Replace more magic number by register definitions from AMD
2008-02-25 20:11:46 +01:00
Christoph Brill
a3cee7cafb
[r300] clean some more magic registers based on AMD spec
2008-02-25 20:08:33 +01:00
Christoph Brill
6051e68a64
[r300] Update some magic registers to real names
2008-02-25 20:03:35 +01:00
Christoph Brill
d1f2d56a75
[r300] Document Z-buffer related register ZB_BW_CNTL
2008-02-25 20:01:27 +01:00
Christoph Brill
091225eebb
[r300] document VAP_CNTL based on AMD spec
2008-02-25 19:50:05 +01:00
Christoph Brill
059aca86ba
[r300] Document some of the wild guesses in VAP_OUTPUT_VTX_FMT based on AMD spec
2008-02-25 19:39:16 +01:00
Christoph Brill
ff8bb004b1
[r300] document type 3 packets to draw primitives based on AMD spec
2008-02-25 19:32:05 +01:00
Brian
ea02342c11
gallium/i915: Use hardware rendering, unless INTEL_SP env var is set
2008-02-25 11:21:03 -07:00
Brian
20839b37ed
gallium/i915: added SGT/SLE opcodes
2008-02-25 11:13:58 -07:00
Brian
93d1ecdbd6
Obsolete, replaced by glut_fcb.c (fortran callbacks)
2008-02-25 11:01:23 -07:00
Brian
65685785fa
Replace glut_fbc.c with glut_fcb.c (cb=callback)
2008-02-25 11:01:23 -07:00
Kristian Høgsberg
45a800a2e7
intel: Only enable GL_ARB_occlusion_query on i965.
2008-02-25 12:03:28 -05:00
José Fonseca
e4e3008923
Make the pipe headers C++ friendly.
2008-02-25 20:05:41 +09:00
José Fonseca
c8b069cc1e
Get more debugging info out of MSVC.
2008-02-25 17:55:45 +09:00
José Fonseca
2d38d1b300
Remove files of unsupported build systems.
2008-02-25 17:11:28 +09:00
José Fonseca
9bcc8ad0ca
Update git ignores.
2008-02-25 17:05:15 +09:00
José Fonseca
2a0675eb75
Replace standand library functions by portable ones.
2008-02-25 16:39:39 +09:00
Zou Nan hai
1d14da9a89
[intel] fix random ut2004 crash on some machine, for cubemap textures,
...
image offset is already considered when map, add it again in
StoreImage may lead to wrong result and crash.
2008-02-25 15:27:47 +08:00
José Fonseca
b75706764b
Add Zack's comments about CSOs.
2008-02-25 15:18:33 +09:00
José Fonseca
efd336887f
Cleanup scons files.
2008-02-25 14:46:53 +09:00
Xiang, Haihao
5b6ca237ee
i965: fix assertion failure caused by commit dd1d66fc4a.
2008-02-25 11:04:59 +08:00
