Commit graph

6085 commits

Author SHA1 Message Date
Dave Airlie
5692e2dda5 intel/isl: move get_tile dims/masks to common isl header
Both classic and iris have the same code for this, but none of it
is dependent on drivers, so just add inline helpers to isl.

Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8253>
2020-12-30 06:06:33 +10:00
Yevhenii Kolesnikov
5ad54d498c intel/fs: don't spill a register, set by undef
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3941
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8185>
2020-12-21 21:18:01 +00:00
Michael Forney
434da21a7c meson: add missing dependency on generated git_sha1.h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8121>
2020-12-17 00:03:22 +00:00
Robin Ole Heinemann
df76963a5c anv: Add DRM_RDWR flag in anv_gem_handle_to_fd
The DRM_RDWR flag is needed for mmap with PROT_WRITE to work.

Cc: mesa-stable
Signed-off-by: Robin Ole Heinemann <robin.ole.heinemann@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8075>
2020-12-15 08:20:34 +00:00
Vinson Lee
56cb5cf34e intel/genxml: Avoid generating identical 12.5 and 12 branches.
Fix defects reported by Coverity Scan.

Identical code for different branches (IDENTICAL_BRANCHES)

identical_branches: The same code is executed regardless of
whether 0 is true, because the 'then' and 'else' branches are
identical. Should one of the branches be modified, or the entire
'if' statement replaced?

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8001>
2020-12-12 02:36:20 +00:00
Nanley Chery
574429f952 intel/blorp: Drop support for STC_CCS resolves
There are no users of this feature.

Reverts the following commits:

* 87c57b8dae (effectively)
* 53d472df24
* 9ab0e92cff

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8021>
2020-12-10 22:41:33 +00:00
Tapani Pälli
5998a6543a anv: fix calculation of buffer size in case dynamic size is used
VK spec got clarification about the pSizes parameter.

Fixes set of new tests:
   dEQP-VK.pipeline.extended_dynamic_state*with_offset*

v2: move offset subtract to be part of size calculation (Jason)

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3871
Fixes: b9a05447a1 ("anv: dynamic vertex input binding stride and size support")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7439>
2020-12-10 08:26:34 +02:00
Marcin Ślusarz
aff845da67 intel/tools/aubinator_error_decode: fix small memory leaks
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7994>
2020-12-09 12:15:56 +00:00
Marcin Ślusarz
00cd3f7d13 intel/tools/aubinator_error_decode: cleanup path/file handling
Should help some compilers/static analyzers understand this code and avoid
things like this:

../src/intel/tools/aubinator_error_decode.c:850:19: warning: "path" may be used uninitialized in this function [-Wmaybe-uninitialized]
  850 |             ret = asprintf(&filename, "%s/%d/i915_error_state", path, minor);

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7994>
2020-12-09 12:15:56 +00:00
Lionel Landwerlin
87ad5f5b0d isl: Fix android build
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Mauro Rossi <issor.oruam@gmail.com>
Fixes: f08d8c849e ("intel/isl: Build gen 12.5")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3931
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7938>
2020-12-05 11:42:15 +00:00
Caio Marcelo de Oliveira Filho
0a7abee60b anv: Avoid a couple of warnings related to vk_error macros
When DEBUG is not defined, no error reporting is done, the error is
just returned back.  The current definition a couple of warnings in
anv_formats.c.  First when the return value is intentionally ignored

  ../src/intel/vulkan/anv_formats.c:989:48: warning: statement with no effect [-Wunused-value]
    989 |          vk_errorfi(instance, physical_device, VK_ERROR_FORMAT_NOT_SUPPORTED,
        |                                                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  ../src/intel/vulkan/anv_private.h:486:55: note: in definition of macro ‘vk_errorfi’
    486 | #define vk_errorfi(instance, obj, error, format, ...) error
        |                                                       ^~~~~

and also when an argument is used only

  ../src/intel/vulkan/anv_formats.c:908:25: warning: unused variable ‘instance’ [-Wunused-variable]
    908 |    struct anv_instance *instance = physical_device->instance;
        |                         ^~~~~~~~
  ../src/intel/vulkan/anv_formats.c: In function ‘anv_GetPhysicalDeviceImageFormatProperties2’:
  ../src/intel/vulkan/anv_formats.c:1231:25: warning: unused variable ‘instance’ [-Wunused-variable]
   1231 |    struct anv_instance *instance = physical_device->instance;
        |                         ^~~~~~~~

to avoid both issues, use a static inline function that just returns
it's argument but can consume other input. Ignoring the return value
of a function is OK, and the extra input can be tagged as UNUSED
getting rid of both warnings.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7860>
2020-12-02 08:30:46 -09:00
Jason Ekstrand
a1976e1cb2 intel/fs: Implement nir_jump_halt
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5071>
2020-12-01 16:19:18 -06:00
Jason Ekstrand
6992d2f625 intel/fs: Emit HALT_TARGET in emit_nir_code()
Instead of making it a fragment-specific thing based on uses_kill, track
whether or not we need one in fs_visitor and emit HALT_TARGET at the end
of emit_nir_code() if needed.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5071>
2020-12-01 16:19:14 -06:00
Jason Ekstrand
4a7f0aa2e0 intel/fs: Remove unnecessary HALT_TARGET in opt_redundant_halt()
This means the pass has to walk all the instructions but it was doing
that in a bunch of cases anyway when it didn't have a HALT_TARGET.
However, removing HALT_TARGET frees up the scheduler a bit because
HALT_TARGET is considered a scheduling barrier.  The shader-db results
are kind-of a wash but we're about to add HALT_TARGET unconditionally so
we want to be able to get rid of it.

Shader-db results on Ice Lake:

    total instructions in shared programs: 19935623 -> 19935623 (0.00%)
    instructions in affected programs: 0 -> 0
    helped: 0
    HURT: 0

    total cycles in shared programs: 976758472 -> 976766135 (<.01%)
    cycles in affected programs: 11097707 -> 11105370 (0.07%)
    helped: 1750
    HURT: 875
    helped stats (abs) min: 1 max: 866 x̄: 26.39 x̃: 4
    helped stats (rel) min: <.01% max: 39.24% x̄: 1.25% x̃: 0.46%
    HURT stats (abs)   min: 1 max: 1678 x̄: 61.54 x̃: 10
    HURT stats (rel)   min: <.01% max: 65.69% x̄: 1.86% x̃: 0.42%
    95% mean confidence interval for cycles value: -2.48 8.32
    95% mean confidence interval for cycles %-change: -0.40% -0.03%
    Inconclusive result (value mean confidence interval includes 0).

    LOST:   62
    GAINED: 46

All of the lost/gained programs are SIMD32 fragment shaders.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5071>
2020-12-01 16:19:10 -06:00
Jason Ekstrand
f9d549b2bf intel/fs: Use BRW_OPCODE_HALT for discards
We're about to start using it to implement nir_jump_halt which has
nothing inherently to do with fragment shaders or discards.  May as well
name it for the HW instruction it generates.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5071>
2020-12-01 16:19:08 -06:00
Jason Ekstrand
e76e359007 intel/fs: Rename PLACEHOLDER_HALT to HALT_TARGET
It's a bit more explicit and will play more nicely with what we're about
to do.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5071>
2020-12-01 16:18:50 -06:00
Jordan Justen
071fd55381 intel/compiler: Add GEN125 to enum gen
Recommended-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
3b953f0f7a intel/anv: Build gen 12.5
Reworks:
 * Jason: call gen125_init_device_state

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
f08d8c849e intel/isl: Build gen 12.5
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
032be8c4d4 intel/genxml: Build gen 12.5
Reworks:
 * Fix typo always returning gen12 for 12.5 (found by Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
569afd37f1 intel/genxml: Copy gen12.xml to gen125.xml
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
99fb15cd31 intel/dev: Add gen_device_info_is_12hp
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Jordan Justen
b257795b10 intel/dev: Use GEN_GEN if defined for gen_device_info_is_9lp
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
2020-12-01 19:06:22 +00:00
Marcin Ślusarz
c2974a1d45 intel/tools/aubinator_error_decode: allow 0 arguments
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7833>
2020-12-01 14:44:04 +00:00
Marcin Ślusarz
7a7010d4f5 intel/tools/aubinator_error_decode: allow "-" as an input file
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7833>
2020-12-01 14:44:04 +00:00
Marcin Ślusarz
8ffa45a775 intel/tools/aubinator_error_decode: exit with an error on unknown option
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7833>
2020-12-01 14:44:04 +00:00
Marek Olšák
9c84ca574d util: add a common ALIGN16 macro for m_matrix and u_threaded_context
to prevent conflicts in the next commit

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6946>
2020-12-01 11:52:10 +00:00
James Park
f86668f487 vulkan/util: Consolidate typed_memcpy
Collapse typed_memcpy definitions into one header.

Use do/while(0) pattern to fix MSVC compilation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7830>
2020-12-01 07:48:08 +00:00
Jason Ekstrand
73c6899285 intel/fs: DISCARD_JUMP does not have side-effects
This accidentally snuck into 75209d5bd1 due to a rebase fail.

Fixes: 75209d5bd1 "intel/fs: Add and implement intel-specific..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3897
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7839>
2020-11-30 20:33:48 +00:00
Jason Ekstrand
b70847a389 nir: Use the right argument order for load_scratch_base_ptr
Fixes: c9bcad2573 "nir: add generated intrinsic builders"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7836>
2020-11-30 12:03:33 -06:00
Rhys Perry
c9bcad2573 nir: add generated intrinsic builders
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6587>
2020-11-26 17:50:38 +00:00
Lionel Landwerlin
5d55ca9c30 anv: fix descriptor pool leak in VMA object
Quoting the spec :

   "When a pool is destroyed, all descriptor sets allocated from the
    pool are implicitly freed and become invalid. Descriptor sets
    allocated from a given pool do not need to be freed before
    destroying that descriptor pool."

This implies we might leak nodes allocated in the vma object.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a6d2593b8 ("anv: Allocate descriptor buffers from the BO cache")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7796>
2020-11-26 16:01:20 +00:00
Caio Marcelo de Oliveira Filho
ff9ea469f6 intel/disasm: Don't rely on FALLTHROUGHTs to print unsupported SFID
The code works but is a bit fragile if we ever add a case that has a
less strict requirement (a smaller gen) than the case above.  To avoid
having to reason about this, refactor code to use a variable to
indicate whether the SFID is supported or not.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7742>
2020-11-25 16:46:16 +00:00
Jason Ekstrand
9fa1cdfe7f intel/rt: Implement push constants as global memory reads
They're not really "push" anymore but that's because there is no such
thing as push constants in bindless shaders on Intel.  They should be
fast enough, though.  There is some room for debate here as to whether
we want to do the pull in NIR or push it into the back-end.  The
advantage of doing it in the back-end is that it'd be easier to use
MOV_INDIRECT for indirect push constant access rather than falling back
to a dataport message.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
f7e24e559f intel/rt: Add support for hit attributes
For triangle geometry, the hit attributes are always two floats which
contain the barycentric coordinates of the hit.  For procedural
geometry, they're an arbitrary blob of data passed from the intersection
shader to the hit shaders.  In our implementation, we stash that data
right after the HW RayQuery in the ray stack.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
96fde5518b intel/rt: Add a helper to create the raygen trampoline shader
Unlike graphics and compute pipelines, Vulkan ray-tracing pipelines do
not have a single entrypoint.  Instead, the raygen shader is specified
as a one-element shader binding table in the vkCmdTraceRay call.  This
means that raygen shaders have to be bindless shaders just like any
other ray tracing shader.  To launch them, we have a tiny compute shader
that acts as a trampoline and sets up the hotzone and uses btd_spawn to
fire off the raygen shader.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
303378e1dd intel/rt: Add lowering for combined intersection/any-hit shaders
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
cb261b03e5 intel/rt: Add lowering for ray-walk intrinsics in any-hit shaders
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
c3ddefa000 intel/rt: Add support for shader buffer record memory
Most of the work for this is done for us by spirv_to_nir which gives us
a load_global from a memory address based on the shader_record_ptr
system values.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
9ba7d459a3 intel/rt: Implement the new ray-tracing system values
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
7ce7c93755 intel/rt: Implement traceRay()
This is a little bit more work than executeCallable() because we also
have to set up the MemRay data structure which the ray traversal
hardware uses to keep its state.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
75209d5bd1 intel/fs: Add and implement intel-specific ray-tracing intrinsics
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
1f6ae809ef intel/rt: Implement support for shader call payloads
Both traceRay() and executeCallable() take a payload parameter which
gets passed from the caller to the callee and which the callee can write
to pass data back to the caller.  We implement these by passing a
pointer to the data structure in the callee to the caller as the second
QWord on its stack.  Coming out of spirv_to_nir, the incoming call
payloads get the nir_var_shader_call_data variable mode allowing us to
easily identify them.  Outgoing call payloads get assigned the
nir_var_shader_temp mode and will have been turned into function_temp by
nir_lower_global_vars_to_local.  All we have to do is crawl the shader
looking for references to the nir_var_shader_call_data variable and
rewrite those to use the passed in pointer.  nir_lower_explicit_io will
do the rest for us.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
72354b0e9d intel/rt: Add a helper to create a trivial return shader
These are required for ray-tracing.  There are many cases where the
ray-tracing hardware may decide to execute some but not all of our
shaders.  In these cases, it needs a shader to execute at the end which
will pop the stack back to the shader which called traceRay().

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
fad81a3968 intel/rt: Add a pass to lower shader call instructions
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
ca88cd8e5a intel/rt: Add return instructions at the end of ray-tracing shaders
Each callable ray-tracing shader shader stage has to perform a return
operation at the end.  In the case of raygen shaders, it retires the
bindless thread because the raygen shader is always the root of the call
tree.  In the case of any-hit shaders, the default action is accep the
hit.  For callable, miss, and closest-hit shaders, it does a return
operation.  The assumption is that the calling shader has placed a
BINDLESS_SHADER_RECORD address for the return in the first QWord of the
callee's scratch space.  The return operation simply loads this value
and calls a btd_spawn intrinsic to jump to it.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
49778a7253 intel/rt: Add support for scratch in ray-tracing shaders
In ray-tracing shader stages, we have a real call stack and so we can't
use the normal scratch mechanism.  Instead, the invocation's stack lives
in a memory region of the RT scratch buffer that sits after the HW ray
stacks.  We handle this by asking nir_lower_io to lower local variables
to 64-bit global memory access.  Unlike nir_lower_io for 32-bit offset
scratch, when 64-bit global access is requested, nir_lower_io generates
an address calculation which starts from a load_scratch_base_ptr.  We
then lower this intrinsic to the appropriate address calculation in
brw_nir_lower_rt_intrinsics.

When a COMPUTE_WALKER command is sent to the hardware with the BTD Mode
bit set to true, the hardware generates a set of stack IDs, one for each
invocation.  These then get passed along from one shader invocation to
the next as we trace the ray.  We can use those stack IDs to figure out
which stack our invocation needs to access.  Because we may not be the
first shader in the stack, there's a per-stack offset that gets stored
in the "hotzone".

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
2b3f6cdc6c intel/rt: Add lowering functions for each ray-tracing stage
These will eventually contain per-stage lowering for various ray-tracing
things.  This is separate from brw_nir_lower_rt_intrinsics because, for
reasons that will become apparent later, brw_nir_lower_rt_intrinsics has
to be run very late in the compile process, right before brw_compile_bs.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
c7660918d7 intel/rt: Add a pass to lower the new ray-tracing intrinsics
The new intrinsics we added for doing address calculations are all
things we fetch from the RT_DISPATCH_GLOBALS struct.  We could emit an
RT_DISPATCH_GLOBALS load at every point we want it and trust NIR to CSE
it for us but it's easier to use intermediate intrinsics.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00
Jason Ekstrand
6e50db4eda intel/rt: Add builder helpers for accessing RT data structures
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
2020-11-25 05:37:10 +00:00