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Author SHA1 Message Date
Samuel Pitoiset
7dbef85365 spirv: change the resource/sampler builtins variable mode 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40768>
 2026-04-07 18:55:49 +00:00
Samuel Pitoiset
457eac7d66 nir: add new variable modes for the resource/sampler heap pointers 
These two new variable modes are used to relax restrictions on deref
casts through because it's possible to cast different modes from the
heap pointers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40768>
 2026-04-07 18:55:49 +00:00
Daniel Schürmann
daa3d5292f nir/opt_if: allow undef instructions on ELSE side for if-simplification
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Details 
Totals from 72 (0.04% of 202440) affected shaders: (Navi48)

Instrs: 213900 -> 213873 (-0.01%); split: -0.03%, +0.02%
CodeSize: 1215012 -> 1214924 (-0.01%); split: -0.01%, +0.01%
Latency: 4458993 -> 4458679 (-0.01%)
Copies: 18840 -> 18816 (-0.13%)
Branches: 5044 -> 5043 (-0.02%)
VALU: 116547 -> 116529 (-0.02%)
SALU: 28686 -> 28669 (-0.06%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40738>
 2026-04-07 17:28:11 +00:00
Daniel Schürmann
1394f79517 nir/opt_if: allow load_const instructions on ELSE-side for if-simplifaction 
Totals from 1974 (0.98% of 202440) affected shaders: (Navi48)

Instrs: 6438920 -> 6437055 (-0.03%); split: -0.06%, +0.03%
CodeSize: 35080732 -> 35075136 (-0.02%); split: -0.04%, +0.02%
SpillSGPRs: 2106 -> 2122 (+0.76%)
Latency: 52684517 -> 52677236 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 8977644 -> 8976740 (-0.01%); split: -0.01%, +0.00%
VClause: 124447 -> 124444 (-0.00%)
SClause: 117561 -> 117560 (-0.00%); split: -0.00%, +0.00%
Copies: 413450 -> 410708 (-0.66%); split: -0.67%, +0.01%
Branches: 136429 -> 136169 (-0.19%); split: -0.20%, +0.01%
PreSGPRs: 114813 -> 114918 (+0.09%); split: -0.01%, +0.10%
PreVGPRs: 108142 -> 108145 (+0.00%); split: -0.00%, +0.00%
VALU: 3275624 -> 3274927 (-0.02%); split: -0.03%, +0.00%
SALU: 1166159 -> 1165039 (-0.10%); split: -0.17%, +0.07%
VOPD: 333456 -> 333183 (-0.08%); split: +0.02%, -0.10%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40738>
 2026-04-07 17:28:11 +00:00
Job Noorman
cc6eec79c2 nir/opt_uniform_subgroup: fix ballot_bit_count components
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ballot_bit_count_reduce expects the ballot to have 4 components causing
validation failures on targets where 1 < ballot_components < 4. Fix this
by padding the ballot to 4 components.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: ae66bd1c00 ("nir/opt_uniform_subgroup: use ballot_bit_count")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40792>
 2026-04-04 17:48:34 +00:00
Georg Lehmann
8730c039bf nir/opt_algebraic: move some lower_lerp patterns
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If we rely on the pattern order here, we don't need to duplicate per bit size.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40730>
 2026-04-04 10:44:09 +00:00
Georg Lehmann
f192fe99eb nir/opt_algebraic: update open coded flerp(..., b2f(c)) to bcsel patterns 
We remove 1.0 - b2f(a) since 6a662a59b7.

Foz-DB Navi48:
Totals from 200 (0.10% of 205032) affected shaders:

Instrs: 410309 -> 409750 (-0.14%); split: -0.18%, +0.05%
CodeSize: 2140424 -> 2136956 (-0.16%); split: -0.21%, +0.05%
Latency: 5834394 -> 5834042 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 906879 -> 906374 (-0.06%); split: -0.06%, +0.01%
VClause: 8247 -> 8244 (-0.04%)
SClause: 7721 -> 7723 (+0.03%); split: -0.03%, +0.05%
Copies: 20515 -> 20487 (-0.14%); split: -0.29%, +0.16%
PreVGPRs: 14510 -> 14481 (-0.20%)
VALU: 228703 -> 228235 (-0.20%); split: -0.28%, +0.07%
SALU: 62832 -> 62914 (+0.13%); split: -0.18%, +0.31%
VOPD: 929 -> 927 (-0.22%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40730>
 2026-04-04 10:44:09 +00:00
Georg Lehmann
fc19ce6c17 nir/opt_load_skip_helpers: don't skip helpers for store_scratch data 
Scratch stores store data for helper lanes that might be used later by an
instruction that cares about helpers, or even by control flow.

Fixes: a65009e808 ("nir: Add a nir_opt_tex_skip_helpers optimization")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/14965
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40770>
 2026-04-04 09:41:00 +00:00
Lionel Landwerlin
30fda4488f nir: divergence analysis support for image_heap_load_param_intel
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 22b16d54ab ("nir: add heap variant of load_param_intel")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40777>
 2026-04-03 07:49:24 +00:00
Job Noorman
adfc1086c9 nir/recompute_io_bases: fix num_slots for per_view outputs 
per_view outputs use one slot per enabled view.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40651>
 2026-04-03 08:18:08 +02:00
Job Noorman
a72704d0fb nir/gather_info: clear interpolation qualifiers before gathering 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Fixes: 66740d9c91 ("nir: gather interpolation qualifiers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40651>
 2026-04-03 08:18:08 +02:00
Job Noorman
2403e88a76 nir/gather_info: gather per_view info 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40651>
 2026-04-03 08:18:08 +02:00
Job Noorman
273fd18b89 nir/opt_varyings: fix alu def cloning 
nir_builder_alu_instr_finish_and_insert initialized the def's bit_size
and num_components so we should set them afterwards.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Fixes: c66967b5cb ("nir: add nir_opt_varyings, new pass optimizing and compacting varyings")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40651>
 2026-04-03 08:18:08 +02:00
Job Noorman
d56d35aa76 nir/opt_varyings_bulk: add data parameter to optimize callback 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40651>
 2026-04-03 08:18:08 +02:00
Marek Olšák
27a4c58745 nir/tests: test nir_opt_varyings with sysvals 
Test that view_index is moved, and sample_mask_in isn't.

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
 2026-04-02 14:38:56 +00:00
Marek Olšák
f3e208ee6c nir/opt_varyings: move expressions with view_index into preceding shaders 
Example:

Before:
    VS output0 = v0
    VS output1 = v1
    FS output = gl_ViewIndex == 0 ? input0 : input1;

After:
    VS output0 = gl_ViewIndex == 0 ? v0 : v1;
    FS output = input0;

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
 2026-04-02 14:38:56 +00:00
Marek Olšák
92cf9af827 nir: factor out nir_system_value_from_instr from nir_opt_varyings 
Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
 2026-04-02 14:38:56 +00:00
Marek Olšák
bfc75c0641 nir: return a failure value from nir_system_value_from_intrinsic 
We need to be able to check whether an intrinsic loads a sysval.

Acked-by: Pierre-Eric
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40664>
 2026-04-02 14:38:56 +00:00
Lionel Landwerlin
b4aaa17a11 nir/lower_io: add index support for load_param_intel 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
 2026-04-01 12:56:43 +00:00
Lionel Landwerlin
22b16d54ab nir: add heap variant of load_param_intel 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
 2026-04-01 12:56:43 +00:00
Lionel Landwerlin
4f74d9293f nir/divergence: handle resource_intel like other intrinsics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40729>
 2026-04-01 12:56:43 +00:00
Georg Lehmann
0975e1513a nir/opt_large_constants: optimize constant arrays with just two different values
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Often, games just use arrays to select between 1.0 and 0.0 or -1.0.

In the case where all values are the same except one index, use a
compare instead of a shift. It's impossible to optimize the shift to
just a compare because of NIR's SM5 shift semantics, but when we know the
array length, it works just fine.

Foz-DB Navi21:
Totals from 3393 (2.96% of 114627) affected shaders:
MaxWaves: 87039 -> 87087 (+0.06%)
Instrs: 4991034 -> 4977962 (-0.26%); split: -0.28%, +0.02%
CodeSize: 27505196 -> 27509988 (+0.02%); split: -0.08%, +0.10%
VGPRs: 156216 -> 154720 (-0.96%)
SpillSGPRs: 812 -> 801 (-1.35%); split: -1.60%, +0.25%
Latency: 38221096 -> 38207053 (-0.04%); split: -0.10%, +0.06%
InvThroughput: 9518564 -> 9469903 (-0.51%); split: -0.52%, +0.01%
VClause: 121340 -> 121370 (+0.02%); split: -0.05%, +0.07%
SClause: 127822 -> 127996 (+0.14%); split: -0.01%, +0.14%
Copies: 437743 -> 437832 (+0.02%); split: -0.40%, +0.43%
Branches: 173910 -> 173893 (-0.01%); split: -0.17%, +0.16%
PreSGPRs: 147137 -> 147957 (+0.56%); split: -0.01%, +0.57%
PreVGPRs: 126313 -> 126296 (-0.01%); split: -0.09%, +0.08%
VALU: 3309713 -> 3288169 (-0.65%); split: -0.66%, +0.01%
SALU: 762369 -> 770904 (+1.12%); split: -0.03%, +1.15%
VMEM: 182394 -> 182392 (-0.00%)
SMEM: 201777 -> 201801 (+0.01%); split: -0.00%, +0.01%

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40539>
 2026-04-01 12:23:18 +00:00
Samuel Pitoiset
98d486ea77 spirv: handle untyped pointer storage class with descriptor heap 
It's possible with descriptor heap.

Original patch by Faith Ekstrand <faith.ekstrand@collabora.com>.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40731>
 2026-04-01 11:46:16 +00:00
Samuel Pitoiset
1f8be7bfad spirv: fix OpUntypedVariableKHR with optional data type parameter 
This would read OOB and crash because data type is optional per the
SPIRV spec.

Original patch by Faith Ekstrand <faith.ekstrand@collabora.com>.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40731>
 2026-04-01 11:46:16 +00:00
Georg Lehmann
eff9f00533 nir/search: remove matching variable type
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Now unused, and if you really need it use a search helper.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40713>
 2026-04-01 09:52:45 +00:00
Georg Lehmann
5b1405dcbf nir/opt_algebraic: remove a few non 1bit bool patterns 
We almost exclusive optimize 1bit booleans nowadays,
so I think these shouldn't be needed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40713>
 2026-04-01 09:52:45 +00:00
Samuel Pitoiset
e27e41a842 vulkan,spirv: update headers
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40721>
 2026-04-01 07:39:37 +00:00
Lionel Landwerlin
d6bc20160e nir/lower_robust_access: add heap/bindless support
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
a7cc97ac86 nir/opt_shrink_stores: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
a075b4f501 nir/lower_helper_writes: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
fed72f015d nir/gather_info: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
ce1082c026 nir/validate: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
ffeafc9ef1 nir/opt_preamble: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
ca4facb568 nir/opt_group_loads: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
2e969dc5c7 nir/opt_access: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
def3af6171 nir/opt_uniform_atomics: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
4dd3ff8b99 nir/opt_intrinsics: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
e7af65d1fe nir/divergence_analysis: add missing nir_intrinsic_image_heap_texel_address 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40710>
 2026-03-31 12:42:57 +00:00
Samuel Pitoiset
4cf6cd85e0 nir/lower_image: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
78d1aa018a nir/opt_move_discards_to_top: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
22e1d1a1f4 nir/opt_sink: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
8a26bbc525 nir/opt_shrink_vectors: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
6479c1092c nir/lower_mediump: add heap support 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Lionel Landwerlin
b81d13bec3 nir/lower_non_uniform: add heap support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Lionel Landwerlin
6a89c29029 nir/lower_image_atomics_to_global: add heap support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
fb0647fb25 nir: add texture_heap_offset/sampler_heap_offset to nir_build_tex() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40657>
 2026-03-31 10:10:17 +00:00
Samuel Pitoiset
c4e3380187 nir,treewide: add nir_image_intrinsic_type 
We have 4 image intrinsic variants now. This enum is useful for
nir_rewrite_image_intrinsic() and it will be used by other NIR passes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40709>
 2026-03-31 09:10:27 +00:00
Samuel Pitoiset
9d059a60f5 nir: introduce nir_descriptor_type for Vulkan like descriptors 
This removes a Vulkan dependency in NIR core.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40670>
 2026-03-31 07:16:20 +00:00
Karol Herbst
b7ca34db13 nir: unvendor ac_nir_lower_sin_cos 
So we can use it for Nvidia.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
 2026-03-31 01:47:31 +02:00
Karol Herbst
5bb3c9f69c nir: rename fsin_amd and fcos_amd to a more generic name 
Nvidia implements both the same way as AMD does, so it makes sense to
allow for code sharing here.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40541>
 2026-03-31 01:47:29 +02:00