Commit graph

51169 commits

Author SHA1 Message Date
Marek Olšák
507337864f gallium: change set_constant_buffer to be UBO-friendly 2012-04-30 01:09:57 +02:00
Marek Olšák
1b749dc34f gallium: add PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
This is required for any serious constant buffer support.
Constant buffer offsets on ATI and NVIDIA DX10 and DX11 GPUs must be
a multiple of 256.

In OpenGL, this can be queried via GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT.
2012-04-30 01:09:57 +02:00
Marek Olšák
8c655f499c st/mesa: make user index buffers optional
v2: use a separate upload buffer for indices
2012-04-30 01:09:57 +02:00
Marek Olšák
989bdaab51 st/mesa: only set index buffer when drawing is indexed
and restructure the code a bit
2012-04-30 01:09:57 +02:00
Marek Olšák
437ab1d6df gallium: add PIPE_CAP_USER_INDEX_BUFFERS and PIPE_CAP_USER_CONSTANT_BUFFERS 2012-04-30 01:09:57 +02:00
José Fonseca
4c15a77f27 scons: Parse = operator in source lists too.
Should fix the scons build.
2012-04-29 21:44:05 +01:00
Christoph Bumiller
b328949a37 nv50,nvc0: fix depth/stencil resolve
Cannot sample depth/stencil with a single view, and needed to use
different shader code for nve4.
2012-04-29 18:03:18 +02:00
Christoph Bumiller
d46f969b84 nvc0/ir/opt: INTERP does not support JOIN 2012-04-29 18:03:15 +02:00
Christoph Bumiller
1f4c154f02 nv50/ir/opt: try to convert ABS(SUB) to SAD 2012-04-29 18:03:11 +02:00
Christoph Bumiller
d6ab3106cf nvc0/ir: try to use the optimal texture op mode
Don't really know what they are yet but for groups of textures, the
last one should use mode "p" and the others "t".
2012-04-29 18:02:37 +02:00
Christoph Bumiller
afcd7b5d16 nvc0/ir: initial implementation of nve4 scheduling hints 2012-04-29 17:59:06 +02:00
Christoph Bumiller
00fe442253 nvc0/ir: implement better placement of texture barriers
Put them before first uses instead of right after the texturing
instruction and cull unnecessary barriers.
2012-04-29 17:56:57 +02:00
Christoph Bumiller
163b290f88 nv50/ir/tgsi: fix handling of early RET
We have to actually emit RET, too, of course, not just the PRERET.
2012-04-29 17:55:36 +02:00
Christoph Bumiller
d9baa004ea nvc0/ir/emit: fix emitTXQ 2nd src 2012-04-29 17:55:13 +02:00
Christoph Bumiller
3a9f036e00 nvc0/ir/target: integer ADD doesn't support ABS modifier 2012-04-29 17:54:34 +02:00
Marek Olšák
18bcb962bb u_vbuf: unbind vertex buffers on destroy 2012-04-29 17:41:37 +02:00
Marek Olšák
7622496d7b u_blitter: fix resource leak 2012-04-29 17:31:27 +02:00
Marek Olšák
63ca2eda13 radeonsi: make r600_buffer_transfer_unmap a no-op
It's a no-op already in the winsys.
2012-04-29 14:48:45 +02:00
Marek Olšák
c69248fa3f r600g: make r600_buffer_transfer_unmap a no-op
It's a no-op already in the winsys.
2012-04-29 14:48:45 +02:00
Marek Olšák
498e71c156 r300g: make r300_buffer_transfer_unmap a no-op
It's a no-op already in the winsys.
2012-04-29 14:48:45 +02:00
Marek Olšák
a784d86508 r300g: use u_default_transfer_inline_write 2012-04-29 14:48:45 +02:00
Marek Olšák
2ed1cdb2a5 radeonsi: use u_default_transfer_inline_write 2012-04-29 14:48:45 +02:00
Marek Olšák
0a6120244e winsys/radeon: simplify buffer map/unmap functions
The idea is not to use pb_map and pb_unmap wrappers, calling straight
into the winsys.
2012-04-29 14:46:52 +02:00
Dylan Noblesmith
8e90913e9f mesa: require GL_MAX_SAMPLES >= 4 for GL 3.0
As noted in commit be4e46b21a,
this was missing before.

NOTE: This is a candidate for the 8.0 branch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-04-29 11:18:31 +00:00
Dylan Noblesmith
e4c97f1e60 autoconf: pass -Wall to automake
And fix these warning that appear at autoreconf time:
"`:='-style assignments are not portable"

v2: Fix the recently-converted-to-automake r600.
2012-04-29 11:17:47 +00:00
Vinson Lee
e372aa6949 glsl: Remove unused member predicate from ir_dead_functions_visitor.
Fix uninitialized pointer field defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2012-04-28 14:00:36 -07:00
Kenneth Graunke
b443ca96a5 i965/fs: Fix FB writes that tried to use the non-existent m16 register.
A little analysis shows that the worst-case value for "nr" is 17:
- base_mrf = 2                       ... 2
- header present (say gen == 5)      ... 4
- aa_dest_stencil_reg (stencil test) ... 5
- SIMD16 mode: += 4 * reg_width      ... 13
- source_depth_to_render_target      ... 15
- dest_depth_reg                     ... 17

This resulted in us setting base_mrf to 2 and mlen to 15.  In other
words, we'd try to use m2..m16.  But m16 doesn't exist pre-Gen6.  Also,
the instruction scheduler data structures use arrays of size 16, so this
would cause us to access them out of bounds.

While the debugger system routine may need m0 and m1, we don't use it
today, so the simplest solution is just to move base_mrf back to 1.
That way, our worst case message fits in m1..m15, which is legal.

An alternative would be to fail on SIMD16 in this case, but that seems
a bit unfortunate if there's no real need to reserve m0 and m1.

Fixes new piglit test shaders/depth-test-and-write on Ironlake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48218
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2012-04-27 16:53:37 -07:00
Vinson Lee
6af4c9006c glsl: Remove unused member mem_ctx from ir_dead_functions_visitor.
Fix uninitialized pointer field defect reported by Coverity.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-04-26 21:09:42 -07:00
Ben Skeggs
9856fd02a0 nv30: properly init window information
Should fix >2k rendering issues reported on nv4x.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-04-27 09:32:57 +10:00
Tom Stellard
a2f7ecfa74 radeonsi/llvm: Silence a warning 2012-04-25 18:09:05 -04:00
Tom Stellard
21d3dd831e radeon/llvm: Remove unused header files 2012-04-25 12:52:44 -04:00
Tom Stellard
30f2a38cef radeon/llvm: Remove AMDILMachineFunctionInfo.cpp 2012-04-25 12:52:44 -04:00
Tom Stellard
540ec964db radeon/llvm: Remove AMDILModuleInfo.cpp 2012-04-25 12:52:43 -04:00
José Fonseca
914244e59d gallivm: Use lp_build_alloca instead of LLVMBuildAlloca on the loop limiter.
To ensure that the alloca is at the top of the function body, otherwise
LLVM will not eliminate them, causing stack misalignment on 32bits.

Reviewed-by: James Benton <jbenton@vmware.com>
2012-04-25 18:09:38 +01:00
Tom Stellard
9f45093433 radeon/llvm: Remove AMDILELFWriterInfo.cpp 2012-04-25 09:02:17 -04:00
Tom Stellard
d96682169e radeon/llvm: Remove AMDILLiteralManager.cpp 2012-04-25 09:02:17 -04:00
Tom Stellard
ba333a6518 radeon/llvm: Remove AMDILInliner.cpp 2012-04-25 09:02:17 -04:00
Tom Stellard
160d4a7891 radeon/llvm: Remove AMDILBarrierDetect.cpp 2012-04-25 09:02:16 -04:00
Tom Stellard
0e7161cce8 radeon/llvm: Remove AMDILPrintfConvert.cpp 2012-04-25 09:02:16 -04:00
Tom Stellard
04993c9630 radeon/llvm: Remove GlobalManager and KernelManager 2012-04-25 09:02:16 -04:00
Tom Stellard
8d3bf7ced5 radeon/llvm: Remove AsmPrinter files 2012-04-25 09:02:16 -04:00
Tom Stellard
ba9bd41880 radeon/llvm: Remove IOExpansion files 2012-04-25 09:02:16 -04:00
Tom Stellard
4b11f4321b radeon/llvm: Remove AMDILPointerManager.cpp 2012-04-25 09:02:16 -04:00
Tom Stellard
76940ba852 radeonsi/llvm: Fix initialization of SIMachineFunctionInfo
SIMachineFunctionInfo needs to be initialized before any of the
AMDIL passes.
2012-04-25 09:02:16 -04:00
José Fonseca
63da1aa5be mesa/st: Fix derreference after free. 2012-04-25 11:41:13 +01:00
Marek Olšák
1781d26faa gallium/docs: document the new vertex fetch CAPs 2012-04-24 23:10:46 +02:00
Christoph Bumiller
29a0c8cd60 nv50: fix typo in nv50_fragprog_assign_slots 2012-04-24 20:05:35 +02:00
Eric Anholt
e9df9636b9 glsl: Add implementation of inverse() for mat2/3/4.
This is taken from the ogl-math project, with Inverse renamed to adj
(since it's not actually the inverse), transposed, and our types
plugged in.  There are potential CSE opportunities in this code
(particularly for hardware with RCP but not DIV), but we should be
doing CSE anyway, so don't hand-optimize.

Fixes piglit inverse tests.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2012-04-24 10:15:47 -07:00
Eric Anholt
7de1331662 glsl: Add support for generating builtin code from GLSL instead of IR.
This takes advantage of the builtin compiler to generate IR into a
string, the same way we read GLSL for function prototypes for our
profiles.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-04-24 10:01:10 -07:00
Eric Anholt
41b47441d7 glsl: Make ir_reader parse the "temporary" variable qualifier.
This lets ir_reader eat the output of builtin_compiler on actual
function definitions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2012-04-24 10:01:07 -07:00