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radeon/llvm: Remove AMDILMachineFunctionInfo.cpp
This commit is contained in:
parent
540ec964db
commit
30f2a38cef
14 changed files with 6 additions and 1176 deletions
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@ -119,10 +119,6 @@ AMDGPUPassConfig::addPreISel()
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}
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bool AMDGPUPassConfig::addInstSelector() {
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const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
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if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
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PM.add(createSIInitMachineFunctionInfoPass(*TM));
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}
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PM.add(createAMDILPeepholeOpt(*TM));
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PM.add(createAMDILISelDag(getAMDGPUTargetMachine()));
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return false;
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@ -14,7 +14,6 @@
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#include "AMDGPUUtil.h"
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#include "AMDGPURegisterInfo.h"
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#include "AMDIL.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -14,8 +14,6 @@
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#define DEBUGME 0
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#endif
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#include "AMDILCompilerErrors.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILTargetMachine.h"
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#include "AMDILUtilityFunctions.h"
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#include "llvm/ADT/SCCIterator.h"
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@ -111,8 +109,6 @@ void ReverseVector(SmallVector<NodeT *, DEFAULT_VEC_SLOTS> &Src) {
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//
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//===----------------------------------------------------------------------===//
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#include "AMDILCompilerErrors.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILTargetMachine.h"
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#include "AMDILUtilityFunctions.h"
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#include "llvm/ADT/SCCIterator.h"
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@ -709,10 +705,7 @@ bool CFGStructurizer<PassT>::run(FuncT &func, PassT &pass) {
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}
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if (!finish) {
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MachineFunction *MF = &func;
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AMDILMachineFunctionInfo *mMFI =
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MF->getInfo<AMDILMachineFunctionInfo>();
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mMFI->addErrorMsg(amd::CompilerErrorMessage[IRREDUCIBLE_CF]);
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assert(!"IRREDUCIBL_CF");
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}
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return true;
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@ -1,75 +0,0 @@
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//===-- AMDILCompilerErrors.h - TODO: Add brief description -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#ifndef _AMDIL_COMPILER_ERRORS_H_
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#define _AMDIL_COMPILER_ERRORS_H_
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// Compiler errors generated by the backend that will cause
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// the runtime to abort compilation. These are mainly for
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// device constraint violations or invalid code.
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namespace amd {
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#define INVALID_COMPUTE 0
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#define GENERIC_ERROR 1
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#define INTERNAL_ERROR 2
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#define MISSING_FUNCTION_CALL 3
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#define RESERVED_FUNCTION 4
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#define BYTE_STORE_ERROR 5
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#define UNKNOWN_TYPE_NAME 6
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#define NO_IMAGE_SUPPORT 7
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#define NO_ATOMIC_32 8
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#define NO_ATOMIC_64 9
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#define IRREDUCIBLE_CF 10
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#define INSUFFICIENT_RESOURCES 11
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#define INSUFFICIENT_LOCAL_RESOURCES 12
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#define INSUFFICIENT_PRIVATE_RESOURCES 13
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#define INSUFFICIENT_IMAGE_RESOURCES 14
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#define DOUBLE_NOT_SUPPORTED 15
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#define INVALID_CONSTANT_WRITE 16
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#define INSUFFICIENT_CONSTANT_RESOURCES 17
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#define INSUFFICIENT_COUNTER_RESOURCES 18
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#define INSUFFICIENT_REGION_RESOURCES 19
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#define REGION_MEMORY_ERROR 20
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#define MEMOP_NO_ALLOCATION 21
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#define RECURSIVE_FUNCTION 22
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#define INCORRECT_COUNTER_USAGE 23
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#define INVALID_INTRINSIC_USAGE 24
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#define NUM_ERROR_MESSAGES 25
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static const char *CompilerErrorMessage[NUM_ERROR_MESSAGES] =
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{
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"E000:Compute Shader Not Supported! ",
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"E001:Generic Compiler Error Message! ",
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"E002:Internal Compiler Error Message!",
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"E003:Missing Function Call Detected! ",
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"E004:Reserved Function Call Detected!",
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"E005:Byte Addressable Stores Invalid!",
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"E006:Kernel Arg Type Name Is Invalid!",
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"E007:Image 1.0 Extension Unsupported!",
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"E008:32bit Atomic Op are Unsupported!",
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"E009:64bit Atomic Op are Unsupported!",
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"E010:Irreducible ControlFlow Detected",
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"E011:Insufficient Resources Detected!",
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"E012:Insufficient Local Resources! ",
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"E013:Insufficient Private Resources! ",
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"E014:Images not currently supported! ",
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"E015:Double precision not supported! ",
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"E016:Invalid Constant Memory Write! ",
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"E017:Max number Constant Ptr reached!",
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"E018:Max number of Counters reached! ",
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"E019:Insufficient Region Resources! ",
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"E020:Region address space invalid! ",
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"E021:MemOp with no memory allocated! ",
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"E022:Recursive Function detected! ",
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"E023:Illegal Inc+Dec to same counter!",
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"E024:Illegal usage of intrinsic inst!"
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};
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}
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#endif // _AMDIL_COMPILER_ERRORS_H_
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@ -15,7 +15,6 @@
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#include "AMDILISelLowering.h"
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#include "AMDILDevices.h"
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#include "AMDILIntrinsicInfo.h"
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILSubtarget.h"
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#include "AMDILTargetMachine.h"
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#include "AMDILUtilityFunctions.h"
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@ -2206,8 +2205,6 @@ const
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{
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MachineFunction &MF = DAG.getMachineFunction();
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AMDILMachineFunctionInfo *FuncInfo
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= MF.getInfo<AMDILMachineFunctionInfo>();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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//const Function *Fn = MF.getFunction();
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//MachineRegisterInfo &RegInfo = MF.getRegInfo();
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@ -2284,14 +2281,12 @@ const
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// See MipsISelLowering.cpp for ideas on how to implement
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}*/
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unsigned int StackSize = CCInfo.getNextStackOffset();
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if (isVarArg) {
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assert(0 && "Variable arguments are not yet supported");
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// See X86/PPC/CellSPU ISelLowering.cpp for ideas on how to implement
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}
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// This needs to be changed to non-zero if the return function needs
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// to pop bytes
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FuncInfo->setBytesToPopOnReturn(StackSize);
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return Chain;
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}
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/// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified
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@ -1,591 +0,0 @@
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//===-- AMDILMachineFunctionInfo.cpp - TODO: Add brief description -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//==-----------------------------------------------------------------------===//
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#include "AMDILMachineFunctionInfo.h"
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#include "AMDILCompilerErrors.h"
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#include "AMDILSubtarget.h"
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#include "AMDILTargetMachine.h"
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#include "AMDILUtilityFunctions.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Instructions.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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static const AMDILConstPtr *getConstPtr(const AMDILKernel *krnl, const std::string &arg) {
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llvm::SmallVector<AMDILConstPtr, DEFAULT_VEC_SLOTS>::const_iterator begin, end;
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for (begin = krnl->constPtr.begin(), end = krnl->constPtr.end();
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begin != end; ++begin) {
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if (!strcmp(begin->name.data(),arg.c_str())) {
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return &(*begin);
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}
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}
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return NULL;
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}
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void PrintfInfo::addOperand(size_t idx, uint32_t size) {
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mOperands.resize((unsigned)(idx + 1));
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mOperands[(unsigned)idx] = size;
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}
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uint32_t PrintfInfo::getPrintfID() {
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return mPrintfID;
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}
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void PrintfInfo::setPrintfID(uint32_t id) {
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mPrintfID = id;
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}
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size_t PrintfInfo::getNumOperands() {
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return mOperands.size();
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}
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uint32_t PrintfInfo::getOperandID(uint32_t idx) {
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return mOperands[idx];
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}
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AMDILMachineFunctionInfo::AMDILMachineFunctionInfo()
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: CalleeSavedFrameSize(0), BytesToPopOnReturn(0),
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DecorationStyle(None), ReturnAddrIndex(0),
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TailCallReturnAddrDelta(0),
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SRetReturnReg(0), UsesLDS(false), LDSArg(false),
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UsesGDS(false), GDSArg(false),
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mReservedLits(9)
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{
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for (uint32_t x = 0; x < AMDILDevice::MAX_IDS; ++x) {
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mUsedMem[x] = false;
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}
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mMF = NULL;
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mKernel = NULL;
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mScratchSize = -1;
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mArgSize = -1;
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mStackSize = -1;
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}
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AMDILMachineFunctionInfo::AMDILMachineFunctionInfo(MachineFunction& MF)
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: CalleeSavedFrameSize(0), BytesToPopOnReturn(0),
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DecorationStyle(None), ReturnAddrIndex(0),
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TailCallReturnAddrDelta(0),
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SRetReturnReg(0), UsesLDS(false), LDSArg(false),
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UsesGDS(false), GDSArg(false),
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mReservedLits(9)
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{
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for (uint32_t x = 0; x < AMDILDevice::MAX_IDS; ++x) {
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mUsedMem[x] = false;
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}
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mMF = &MF;
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const AMDILTargetMachine *TM =
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reinterpret_cast<const AMDILTargetMachine*>(&MF.getTarget());
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mSTM = TM->getSubtargetImpl();
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mScratchSize = -1;
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mArgSize = -1;
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mStackSize = -1;
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}
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AMDILMachineFunctionInfo::~AMDILMachineFunctionInfo()
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{
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for (std::map<std::string, PrintfInfo*>::iterator pfb = printf_begin(),
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pfe = printf_end(); pfb != pfe; ++pfb) {
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delete pfb->second;
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}
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}
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unsigned int
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AMDILMachineFunctionInfo::getCalleeSavedFrameSize() const
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{
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return CalleeSavedFrameSize;
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}
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void
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AMDILMachineFunctionInfo::setCalleeSavedFrameSize(unsigned int bytes)
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{
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CalleeSavedFrameSize = bytes;
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}
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unsigned int
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AMDILMachineFunctionInfo::getBytesToPopOnReturn() const
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{
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return BytesToPopOnReturn;
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}
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void
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AMDILMachineFunctionInfo::setBytesToPopOnReturn(unsigned int bytes)
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{
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BytesToPopOnReturn = bytes;
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}
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NameDecorationStyle
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AMDILMachineFunctionInfo::getDecorationStyle() const
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{
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return DecorationStyle;
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}
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void
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AMDILMachineFunctionInfo::setDecorationStyle(NameDecorationStyle style)
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{
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DecorationStyle = style;
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}
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int
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AMDILMachineFunctionInfo::getRAIndex() const
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{
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return ReturnAddrIndex;
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}
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void
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AMDILMachineFunctionInfo::setRAIndex(int index)
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{
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ReturnAddrIndex = index;
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}
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int
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AMDILMachineFunctionInfo::getTCReturnAddrDelta() const
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{
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return TailCallReturnAddrDelta;
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}
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void
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AMDILMachineFunctionInfo::setTCReturnAddrDelta(int delta)
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{
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TailCallReturnAddrDelta = delta;
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}
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unsigned int
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AMDILMachineFunctionInfo::getSRetReturnReg() const
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{
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return SRetReturnReg;
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}
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void
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AMDILMachineFunctionInfo::setSRetReturnReg(unsigned int reg)
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{
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SRetReturnReg = reg;
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}
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void
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AMDILMachineFunctionInfo::setUsesLocal()
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{
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UsesLDS = true;
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}
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bool
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AMDILMachineFunctionInfo::usesLocal() const
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{
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return UsesLDS;
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}
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void
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AMDILMachineFunctionInfo::setHasLocalArg()
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{
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LDSArg = true;
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}
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bool
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AMDILMachineFunctionInfo::hasLocalArg() const
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{
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return LDSArg;
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}
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void
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AMDILMachineFunctionInfo::setUsesRegion()
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{
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UsesGDS = true;
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}
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bool
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AMDILMachineFunctionInfo::usesRegion() const
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{
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return UsesGDS;
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}
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void
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AMDILMachineFunctionInfo::setHasRegionArg()
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{
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GDSArg = true;
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}
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bool
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AMDILMachineFunctionInfo::hasRegionArg() const
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{
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return GDSArg;
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}
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bool
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AMDILMachineFunctionInfo::usesHWConstant(std::string name) const
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{
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const AMDILConstPtr *curConst = getConstPtr(mKernel, name);
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if (curConst) {
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return curConst->usesHardware;
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} else {
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return false;
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}
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}
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uint32_t
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AMDILMachineFunctionInfo::getLocal(uint32_t dim)
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{
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if (mKernel && mKernel->sgv) {
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AMDILKernelAttr *sgv = mKernel->sgv;
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switch (dim) {
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default: break;
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case 0:
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case 1:
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case 2:
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return sgv->reqGroupSize[dim];
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break;
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case 3:
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return sgv->reqGroupSize[0] * sgv->reqGroupSize[1] * sgv->reqGroupSize[2];
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};
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}
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switch (dim) {
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default:
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return 1;
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case 3:
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return mSTM->getDefaultSize(0) *
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mSTM->getDefaultSize(1) *
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mSTM->getDefaultSize(2);
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case 2:
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case 1:
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case 0:
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return mSTM->getDefaultSize(dim);
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break;
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};
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return 1;
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}
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bool
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AMDILMachineFunctionInfo::isKernel() const
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{
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return mKernel != NULL && mKernel->mKernel;
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}
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AMDILKernel*
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AMDILMachineFunctionInfo::getKernel()
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{
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return mKernel;
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}
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std::string
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AMDILMachineFunctionInfo::getName()
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{
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if (mMF) {
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return mMF->getFunction()->getName();
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} else {
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return "";
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}
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}
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uint32_t
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AMDILMachineFunctionInfo::getArgSize()
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{
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if (mArgSize == -1) {
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Function::const_arg_iterator I = mMF->getFunction()->arg_begin();
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Function::const_arg_iterator Ie = mMF->getFunction()->arg_end();
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uint32_t Counter = 0;
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while (I != Ie) {
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Type* curType = I->getType();
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if (curType->isIntegerTy() || curType->isFloatingPointTy()) {
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++Counter;
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} else if (const VectorType *VT = dyn_cast<VectorType>(curType)) {
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Type *ET = VT->getElementType();
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int numEle = VT->getNumElements();
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switch (ET->getPrimitiveSizeInBits()) {
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default:
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if (numEle == 3) {
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Counter++;
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} else {
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Counter += ((numEle + 2) >> 2);
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}
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break;
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case 64:
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if (numEle == 3) {
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Counter += 2;
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} else {
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Counter += (numEle >> 1);
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}
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break;
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case 16:
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case 8:
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switch (numEle) {
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default:
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Counter += ((numEle + 2) >> 2);
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case 2:
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Counter++;
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break;
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}
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break;
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}
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} else if (const PointerType *PT = dyn_cast<PointerType>(curType)) {
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Type *CT = PT->getElementType();
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const StructType *ST = dyn_cast<StructType>(CT);
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if (ST && ST->isOpaque()) {
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bool i1d = ST->getName() == "struct._image1d_t";
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bool i1da = ST->getName() == "struct._image1d_array_t";
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bool i1db = ST->getName() == "struct._image1d_buffer_t";
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bool i2d = ST->getName() == "struct._image2d_t";
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bool i2da = ST->getName() == "struct._image2d_array_t";
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bool i3d = ST->getName() == "struct._image3d_t";
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bool is_image = i1d || i1da || i1db || i2d || i2da || i3d;
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if (is_image) {
|
||||
if (mSTM->device()->isSupported(AMDILDeviceInfo::Images)) {
|
||||
Counter += 2;
|
||||
} else {
|
||||
addErrorMsg(amd::CompilerErrorMessage[NO_IMAGE_SUPPORT]);
|
||||
}
|
||||
} else {
|
||||
Counter++;
|
||||
}
|
||||
} else if (CT->isStructTy()
|
||||
&& PT->getAddressSpace() == AMDILAS::PRIVATE_ADDRESS) {
|
||||
StructType *ST = dyn_cast<StructType>(CT);
|
||||
Counter += ((getTypeSize(ST) + 15) & ~15) >> 4;
|
||||
} else if (CT->isIntOrIntVectorTy()
|
||||
|| CT->isFPOrFPVectorTy()
|
||||
|| CT->isArrayTy()
|
||||
|| CT->isPointerTy()
|
||||
|| PT->getAddressSpace() != AMDILAS::PRIVATE_ADDRESS) {
|
||||
++Counter;
|
||||
} else {
|
||||
assert(0 && "Current type is not supported!");
|
||||
addErrorMsg(amd::CompilerErrorMessage[INTERNAL_ERROR]);
|
||||
}
|
||||
} else {
|
||||
assert(0 && "Current type is not supported!");
|
||||
addErrorMsg(amd::CompilerErrorMessage[INTERNAL_ERROR]);
|
||||
}
|
||||
++I;
|
||||
}
|
||||
// Convert from slots to bytes by multiplying by 16(shift by 4).
|
||||
mArgSize = Counter << 4;
|
||||
}
|
||||
return (uint32_t)mArgSize;
|
||||
}
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::getScratchSize()
|
||||
{
|
||||
if (mScratchSize == -1) {
|
||||
mScratchSize = 0;
|
||||
Function::const_arg_iterator I = mMF->getFunction()->arg_begin();
|
||||
Function::const_arg_iterator Ie = mMF->getFunction()->arg_end();
|
||||
while (I != Ie) {
|
||||
Type *curType = I->getType();
|
||||
mScratchSize += ((getTypeSize(curType) + 15) & ~15);
|
||||
++I;
|
||||
}
|
||||
mScratchSize += ((mScratchSize + 15) & ~15);
|
||||
}
|
||||
return (uint32_t)mScratchSize;
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::getStackSize()
|
||||
{
|
||||
if (mStackSize == -1) {
|
||||
uint32_t privSize = 0;
|
||||
const MachineFrameInfo *MFI = mMF->getFrameInfo();
|
||||
privSize = MFI->getOffsetAdjustment() + MFI->getStackSize();
|
||||
const AMDILTargetMachine *TM =
|
||||
reinterpret_cast<const AMDILTargetMachine*>(&mMF->getTarget());
|
||||
bool addStackSize = TM->getOptLevel() == CodeGenOpt::None;
|
||||
Function::const_arg_iterator I = mMF->getFunction()->arg_begin();
|
||||
Function::const_arg_iterator Ie = mMF->getFunction()->arg_end();
|
||||
while (I != Ie) {
|
||||
Type *curType = I->getType();
|
||||
++I;
|
||||
if (dyn_cast<PointerType>(curType)) {
|
||||
Type *CT = dyn_cast<PointerType>(curType)->getElementType();
|
||||
if (CT->isStructTy()
|
||||
&& dyn_cast<PointerType>(curType)->getAddressSpace()
|
||||
== AMDILAS::PRIVATE_ADDRESS) {
|
||||
addStackSize = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (addStackSize) {
|
||||
privSize += getScratchSize();
|
||||
}
|
||||
mStackSize = privSize;
|
||||
}
|
||||
return (uint32_t)mStackSize;
|
||||
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addi32Literal(uint32_t val, int Opcode) {
|
||||
// Since we have emulated 16/8/1 bit register types with a 32bit real
|
||||
// register, we need to sign extend the constants to 32bits in order for
|
||||
// comparisons against the constants to work correctly, this fixes some issues
|
||||
// we had in conformance failing for saturation.
|
||||
if (Opcode == AMDIL::LOADCONST_i16) {
|
||||
val = (((int32_t)val << 16) >> 16);
|
||||
} else if (Opcode == AMDIL::LOADCONST_i8) {
|
||||
val = (((int32_t)val << 24) >> 24);
|
||||
}
|
||||
if (mIntLits.find(val) == mIntLits.end()) {
|
||||
mIntLits[val] = getNumLiterals();
|
||||
}
|
||||
return mIntLits[val];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addi64Literal(uint64_t val) {
|
||||
if (mLongLits.find(val) == mLongLits.end()) {
|
||||
mLongLits[val] = getNumLiterals();
|
||||
}
|
||||
return mLongLits[val];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addi128Literal(uint64_t val_lo, uint64_t val_hi) {
|
||||
std::pair<uint64_t, uint64_t> a;
|
||||
a.first = val_lo;
|
||||
a.second = val_hi;
|
||||
if (mVecLits.find(a) == mVecLits.end()) {
|
||||
mVecLits[a] = getNumLiterals();
|
||||
}
|
||||
return mVecLits[a];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addf32Literal(const ConstantFP *CFP) {
|
||||
uint32_t val = (uint32_t)CFP->getValueAPF().bitcastToAPInt().getZExtValue();
|
||||
if (mIntLits.find(val) == mIntLits.end()) {
|
||||
mIntLits[val] = getNumLiterals();
|
||||
}
|
||||
return mIntLits[val];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addf64Literal(const ConstantFP *CFP) {
|
||||
union dtol_union {
|
||||
double d;
|
||||
uint64_t ul;
|
||||
} dval;
|
||||
const APFloat &APF = CFP->getValueAPF();
|
||||
if (&APF.getSemantics() == (const llvm::fltSemantics *)&APFloat::IEEEsingle) {
|
||||
float fval = APF.convertToFloat();
|
||||
dval.d = (double)fval;
|
||||
} else {
|
||||
dval.d = APF.convertToDouble();
|
||||
}
|
||||
if (mLongLits.find(dval.ul) == mLongLits.end()) {
|
||||
mLongLits[dval.ul] = getNumLiterals();
|
||||
}
|
||||
return mLongLits[dval.ul];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::getIntLits(uint32_t offset)
|
||||
{
|
||||
return mIntLits[offset];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::getLongLits(uint64_t offset)
|
||||
{
|
||||
return mLongLits[offset];
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::getVecLits(uint64_t low64, uint64_t high64)
|
||||
{
|
||||
return mVecLits[std::pair<uint64_t, uint64_t>(low64, high64)];
|
||||
}
|
||||
|
||||
size_t
|
||||
AMDILMachineFunctionInfo::getNumLiterals() const {
|
||||
return mLongLits.size() + mIntLits.size() + mVecLits.size() + mReservedLits;
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::addReservedLiterals(uint32_t size)
|
||||
{
|
||||
mReservedLits += size;
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addSampler(std::string name, uint32_t val)
|
||||
{
|
||||
if (mSamplerMap.find(name) != mSamplerMap.end()) {
|
||||
SamplerInfo newVal = mSamplerMap[name];
|
||||
assert(newVal.val == val
|
||||
&& "Found a sampler with same name but different values!");
|
||||
return mSamplerMap[name].idx;
|
||||
} else {
|
||||
SamplerInfo curVal;
|
||||
curVal.name = name;
|
||||
curVal.val = val;
|
||||
curVal.idx = mSamplerMap.size();
|
||||
mSamplerMap[name] = curVal;
|
||||
return curVal.idx;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::setUsesMem(unsigned id) {
|
||||
assert(id < AMDILDevice::MAX_IDS &&
|
||||
"Must set the ID to be less than MAX_IDS!");
|
||||
mUsedMem[id] = true;
|
||||
}
|
||||
|
||||
bool
|
||||
AMDILMachineFunctionInfo::usesMem(unsigned id) {
|
||||
assert(id < AMDILDevice::MAX_IDS &&
|
||||
"Must set the ID to be less than MAX_IDS!");
|
||||
return mUsedMem[id];
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::addErrorMsg(const char *msg, ErrorMsgEnum val)
|
||||
{
|
||||
if (val == DEBUG_ONLY) {
|
||||
#if defined(DEBUG) || defined(_DEBUG)
|
||||
mErrors.insert(msg);
|
||||
#endif
|
||||
} else if (val == RELEASE_ONLY) {
|
||||
#if !defined(DEBUG) && !defined(_DEBUG)
|
||||
mErrors.insert(msg);
|
||||
#endif
|
||||
} else if (val == ALWAYS) {
|
||||
mErrors.insert(msg);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t
|
||||
AMDILMachineFunctionInfo::addPrintfString(std::string &name, unsigned offset)
|
||||
{
|
||||
if (mPrintfMap.find(name) != mPrintfMap.end()) {
|
||||
return mPrintfMap[name]->getPrintfID();
|
||||
} else {
|
||||
PrintfInfo *info = new PrintfInfo;
|
||||
info->setPrintfID(mPrintfMap.size() + offset);
|
||||
mPrintfMap[name] = info;
|
||||
return info->getPrintfID();
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::addPrintfOperand(std::string &name,
|
||||
size_t idx,
|
||||
uint32_t size)
|
||||
{
|
||||
mPrintfMap[name]->addOperand(idx, size);
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::addMetadata(const char *md, bool kernelOnly)
|
||||
{
|
||||
addMetadata(std::string(md), kernelOnly);
|
||||
}
|
||||
|
||||
void
|
||||
AMDILMachineFunctionInfo::addMetadata(std::string md, bool kernelOnly)
|
||||
{
|
||||
if (kernelOnly) {
|
||||
mMetadataKernel.push_back(md);
|
||||
} else {
|
||||
mMetadataFunc.insert(md);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,422 +0,0 @@
|
|||
//== AMDILMachineFunctionInfo.h - AMD il Machine Function Info -*- C++ -*-===//
|
||||
//
|
||||
// The LLVM Compiler Infrastructure
|
||||
//
|
||||
// This file is distributed under the University of Illinois Open Source
|
||||
// License. See LICENSE.TXT for details.
|
||||
//
|
||||
//==-----------------------------------------------------------------------===//
|
||||
//
|
||||
// This file declares AMDIL-specific per-machine-function information
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
#ifndef _AMDILMACHINEFUNCTIONINFO_H_
|
||||
#define _AMDILMACHINEFUNCTIONINFO_H_
|
||||
#include "AMDIL.h"
|
||||
#include "AMDILDevice.h"
|
||||
#include "AMDILKernel.h"
|
||||
#include "llvm/ADT/DenseMap.h"
|
||||
#include "llvm/ADT/DenseSet.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/ADT/StringMap.h"
|
||||
#include "llvm/ADT/ValueMap.h"
|
||||
#include "llvm/CodeGen/MachineBasicBlock.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
#include "llvm/Function.h"
|
||||
|
||||
#include <map>
|
||||
#include <set>
|
||||
#include <string>
|
||||
|
||||
namespace llvm
|
||||
{
|
||||
class AMDILSubtarget;
|
||||
class PrintfInfo {
|
||||
uint32_t mPrintfID;
|
||||
SmallVector<uint32_t, DEFAULT_VEC_SLOTS> mOperands;
|
||||
public:
|
||||
void addOperand(size_t idx, uint32_t size);
|
||||
uint32_t getPrintfID();
|
||||
void setPrintfID(uint32_t idx);
|
||||
size_t getNumOperands();
|
||||
uint32_t getOperandID(uint32_t idx);
|
||||
}; // class PrintfInfo
|
||||
|
||||
enum NameDecorationStyle
|
||||
{
|
||||
None,
|
||||
StdCall,
|
||||
FastCall
|
||||
};
|
||||
typedef struct SamplerInfoRec {
|
||||
std::string name; // The name of the sampler
|
||||
uint32_t val; // The value of the sampler
|
||||
uint32_t idx; // The sampler resource id
|
||||
} SamplerInfo;
|
||||
// Some typedefs that will help with using the various iterators
|
||||
// of the machine function info class.
|
||||
typedef std::map<uint32_t, uint32_t>::iterator lit32_iterator;
|
||||
typedef std::map<uint64_t, uint32_t>::iterator lit64_iterator;
|
||||
typedef std::map<std::pair<uint64_t, uint64_t>, uint32_t>::iterator
|
||||
lit128_iterator;
|
||||
typedef StringMap<SamplerInfo>::iterator sampler_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator func_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator intr_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator uav_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator read_image2d_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator read_image3d_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator write_image2d_iterator;
|
||||
typedef DenseSet<uint32_t>::iterator write_image3d_iterator;
|
||||
typedef DenseSet<const char*>::iterator error_iterator;
|
||||
typedef std::map<std::string, PrintfInfo*>::iterator printf_iterator;
|
||||
typedef std::set<std::string>::iterator func_md_iterator;
|
||||
typedef std::vector<std::string>::iterator kernel_md_iterator;
|
||||
// AMDILMachineFunctionInfo - This class is
|
||||
// derived from MachineFunction private
|
||||
// amdil target-specific information for each MachineFunction
|
||||
class AMDILMachineFunctionInfo : public MachineFunctionInfo
|
||||
{
|
||||
// CalleeSavedFrameSize - Size of the callee-saved
|
||||
// register portion of the
|
||||
// stack frame in bytes.
|
||||
unsigned int CalleeSavedFrameSize;
|
||||
// BytesToPopOnReturn - Number of bytes function pops on return.
|
||||
// Used on windows platform for stdcall & fastcall name decoration
|
||||
unsigned int BytesToPopOnReturn;
|
||||
// DecorationStyle - If the function requires additional
|
||||
// name decoration,
|
||||
// DecorationStyle holds the right way to do so.
|
||||
NameDecorationStyle DecorationStyle;
|
||||
// ReturnAddrIndex - FrameIndex for return slot.
|
||||
int ReturnAddrIndex;
|
||||
|
||||
// TailCallReturnAddrDelta - Delta the ReturnAddr stack slot is moved
|
||||
// Used for creating an area before the register spill area
|
||||
// on the stack
|
||||
// the returnaddr can be savely move to this area
|
||||
int TailCallReturnAddrDelta;
|
||||
|
||||
// SRetReturnReg - Some subtargets require that sret lowering includes
|
||||
// returning the value of the returned struct in a register.
|
||||
// This field holds the virtual register into which the sret
|
||||
// argument is passed.
|
||||
unsigned int SRetReturnReg;
|
||||
|
||||
// UsesLocal - Specifies that this function uses LDS memory and
|
||||
// that it needs to be allocated.
|
||||
bool UsesLDS;
|
||||
|
||||
// LDSArg - Flag that specifies if this function has an Local
|
||||
// argument or not
|
||||
bool LDSArg;
|
||||
|
||||
// UsesGDS - Specifies that this function uses GDS memory and
|
||||
// that it needs to be allocated.
|
||||
bool UsesGDS;
|
||||
|
||||
// GDSArg - Flag that specifies if this function has an Region
|
||||
// argument or not
|
||||
bool GDSArg;
|
||||
|
||||
// The size in bytes required to host all of the kernel arguments.
|
||||
// -1 means this value has not been determined yet.
|
||||
int32_t mArgSize;
|
||||
|
||||
// The size in bytes required to host the stack and the kernel arguments
|
||||
// in private memory.
|
||||
// -1 means this value has not been determined yet.
|
||||
int32_t mScratchSize;
|
||||
|
||||
// The size in bytes required to host the the kernel arguments
|
||||
// on the stack.
|
||||
// -1 means this value has not been determined yet.
|
||||
int32_t mStackSize;
|
||||
|
||||
/// A map of constant to literal mapping for all of the 32bit or
|
||||
/// smaller literals in the current function.
|
||||
std::map<uint32_t, uint32_t> mIntLits;
|
||||
|
||||
/// A map of constant to literal mapping for all of the 64bit
|
||||
/// literals in the current function.
|
||||
std::map<uint64_t, uint32_t> mLongLits;
|
||||
|
||||
/// A map of constant to literal mapping for all of the 128bit
|
||||
/// literals in the current function.
|
||||
std::map<std::pair<uint64_t, uint64_t>, uint32_t> mVecLits;
|
||||
|
||||
/// The number of literals that should be reserved.
|
||||
/// TODO: Remove this when the wrapper emitter is added.
|
||||
uint32_t mReservedLits;
|
||||
|
||||
/// A map of name to sampler information that is used to emit
|
||||
/// metadata to the IL stream that the runtimes can use for
|
||||
/// hardware setup.
|
||||
StringMap<SamplerInfo> mSamplerMap;
|
||||
|
||||
/// Array of flags to specify if a specific memory type is used or not.
|
||||
bool mUsedMem[AMDILDevice::MAX_IDS];
|
||||
|
||||
/// Set of all functions that this function calls.
|
||||
DenseSet<uint32_t> mFuncs;
|
||||
|
||||
/// Set of all intrinsics that this function calls.
|
||||
DenseSet<uint32_t> mIntrs;
|
||||
|
||||
/// Set of all read only 2D images.
|
||||
DenseSet<uint32_t> mRO2D;
|
||||
/// Set of all read only 3D images.
|
||||
DenseSet<uint32_t> mRO3D;
|
||||
/// Set of all write only 2D images.
|
||||
DenseSet<uint32_t> mWO2D;
|
||||
/// Set of all write only 3D images.
|
||||
DenseSet<uint32_t> mWO3D;
|
||||
/// Set of all the raw uavs.
|
||||
DenseSet<uint32_t> mRawUAV;
|
||||
/// Set of all the arena uavs.
|
||||
DenseSet<uint32_t> mArenaUAV;
|
||||
|
||||
/// A set of all errors that occured in the backend for this function.
|
||||
DenseSet<const char *> mErrors;
|
||||
|
||||
/// A mapping of printf data and the printf string
|
||||
std::map<std::string, PrintfInfo*> mPrintfMap;
|
||||
|
||||
/// A set of all of the metadata that is used for the current function.
|
||||
std::set<std::string> mMetadataFunc;
|
||||
|
||||
/// A set of all of the metadata that is used for the function wrapper.
|
||||
std::vector<std::string> mMetadataKernel;
|
||||
|
||||
/// Information about the kernel, NULL if the function is not a kernel.
|
||||
AMDILKernel *mKernel;
|
||||
|
||||
/// Pointer to the machine function that this information belongs to.
|
||||
MachineFunction *mMF;
|
||||
|
||||
/// Pointer to the subtarget for this function.
|
||||
const AMDILSubtarget *mSTM;
|
||||
public:
|
||||
AMDILMachineFunctionInfo();
|
||||
AMDILMachineFunctionInfo(MachineFunction &MF);
|
||||
virtual ~AMDILMachineFunctionInfo();
|
||||
unsigned int
|
||||
getCalleeSavedFrameSize() const;
|
||||
void
|
||||
setCalleeSavedFrameSize(unsigned int bytes);
|
||||
|
||||
unsigned int
|
||||
getBytesToPopOnReturn() const;
|
||||
void
|
||||
setBytesToPopOnReturn (unsigned int bytes);
|
||||
|
||||
NameDecorationStyle
|
||||
getDecorationStyle() const;
|
||||
void
|
||||
setDecorationStyle(NameDecorationStyle style);
|
||||
|
||||
int
|
||||
getRAIndex() const;
|
||||
void
|
||||
setRAIndex(int Index);
|
||||
|
||||
int
|
||||
getTCReturnAddrDelta() const;
|
||||
void
|
||||
setTCReturnAddrDelta(int delta);
|
||||
|
||||
unsigned int
|
||||
getSRetReturnReg() const;
|
||||
void
|
||||
setSRetReturnReg(unsigned int Reg);
|
||||
|
||||
void
|
||||
setUsesLocal();
|
||||
bool
|
||||
usesLocal() const;
|
||||
void
|
||||
setHasLocalArg();
|
||||
bool
|
||||
hasLocalArg() const;
|
||||
|
||||
void
|
||||
setUsesRegion();
|
||||
bool
|
||||
usesRegion() const;
|
||||
void
|
||||
setHasRegionArg();
|
||||
bool
|
||||
hasRegionArg() const;
|
||||
|
||||
bool
|
||||
usesHWConstant(std::string name) const;
|
||||
uint32_t
|
||||
getLocal(uint32_t);
|
||||
bool
|
||||
isKernel() const;
|
||||
AMDILKernel*
|
||||
getKernel();
|
||||
|
||||
std::string
|
||||
getName();
|
||||
|
||||
/// Get the size in bytes that are required to host all of
|
||||
/// arguments based on the argument alignment rules in the AMDIL
|
||||
/// Metadata spec.
|
||||
uint32_t getArgSize();
|
||||
|
||||
/// Get the size in bytes that are required to host all of
|
||||
/// arguments and stack memory in scratch.
|
||||
uint32_t getScratchSize();
|
||||
|
||||
/// Get the size in bytes that is required to host all of
|
||||
/// the arguments on the stack.
|
||||
uint32_t getStackSize();
|
||||
|
||||
///
|
||||
/// @param val value to add the lookup table
|
||||
/// @param Opcode opcode of the literal instruction
|
||||
/// @brief adds the specified value of the type represented by the
|
||||
/// Opcode
|
||||
/// to the literal to integer and integer to literal mappings.
|
||||
///
|
||||
/// Add a 32bit integer value to the literal table.
|
||||
uint32_t addi32Literal(uint32_t val, int Opcode = AMDIL::LOADCONST_i32);
|
||||
|
||||
/// Add a 32bit floating point value to the literal table.
|
||||
uint32_t addf32Literal(const ConstantFP *CFP);
|
||||
|
||||
/// Add a 64bit integer value to the literal table.
|
||||
uint32_t addi64Literal(uint64_t val);
|
||||
|
||||
/// Add a 128 bit integer value to the literal table.
|
||||
uint32_t addi128Literal(uint64_t val_lo, uint64_t val_hi);
|
||||
|
||||
/// Add a 64bit floating point literal as a 64bit integer value.
|
||||
uint32_t addf64Literal(const ConstantFP *CFP);
|
||||
|
||||
/// Get the number of literals that have currently been allocated.
|
||||
size_t getNumLiterals() const;
|
||||
|
||||
/// Get the literal ID of an Integer literal of the given offset.
|
||||
uint32_t getIntLits(uint32_t lit);
|
||||
|
||||
/// Get the literal ID of a Long literal of the given offset.
|
||||
uint32_t getLongLits(uint64_t lit);
|
||||
|
||||
/// Get the literal ID of a Long literal of the given offset.
|
||||
uint32_t getVecLits(uint64_t low64, uint64_t high64);
|
||||
|
||||
/// Add some literals to the number of reserved literals.
|
||||
void addReservedLiterals(uint32_t);
|
||||
|
||||
// Functions that return iterators to the beginning and end
|
||||
// of the various literal maps.
|
||||
// Functions that return the beginning and end of the 32bit literal map
|
||||
lit32_iterator begin_32() { return mIntLits.begin(); }
|
||||
lit32_iterator end_32() { return mIntLits.end(); }
|
||||
|
||||
// Functions that return the beginning and end of the 64bit literal map
|
||||
lit64_iterator begin_64() { return mLongLits.begin(); }
|
||||
lit64_iterator end_64() { return mLongLits.end(); }
|
||||
|
||||
// Functions that return the beginning and end of the 2x64bit literal map
|
||||
lit128_iterator begin_128() { return mVecLits.begin(); }
|
||||
lit128_iterator end_128() { return mVecLits.end(); }
|
||||
|
||||
// Add a sampler to the set of known samplers for the current kernel.
|
||||
uint32_t addSampler(std::string name, uint32_t value);
|
||||
|
||||
// Iterators that point to the beginning and end of the sampler map.
|
||||
sampler_iterator sampler_begin() { return mSamplerMap.begin(); }
|
||||
sampler_iterator sampler_end() { return mSamplerMap.end(); }
|
||||
|
||||
|
||||
/// Set the flag for the memory ID to true for the current function.
|
||||
void setUsesMem(unsigned);
|
||||
/// Retrieve the flag for the memory ID.
|
||||
bool usesMem(unsigned);
|
||||
|
||||
/// Add called functions to the set of all functions this function calls.
|
||||
void addCalledFunc(uint32_t id) { mFuncs.insert(id); }
|
||||
void eraseCalledFunc(uint32_t id) { mFuncs.erase(id); }
|
||||
size_t func_size() { return mFuncs.size(); }
|
||||
bool func_empty() { return mFuncs.empty(); }
|
||||
func_iterator func_begin() { return mFuncs.begin(); }
|
||||
func_iterator func_end() { return mFuncs.end(); }
|
||||
|
||||
/// Add called intrinsics to the set of all intrinscis this function calls.
|
||||
void addCalledIntr(uint32_t id) { mIntrs.insert(id); }
|
||||
size_t intr_size() { return mIntrs.size(); }
|
||||
bool intr_empty() { return mIntrs.empty(); }
|
||||
intr_iterator intr_begin() { return mIntrs.begin(); }
|
||||
intr_iterator intr_end() { return mIntrs.end(); }
|
||||
|
||||
/// Add a 2D read_only image id.
|
||||
void addROImage2D(uint32_t id) { mRO2D.insert(id); }
|
||||
size_t read_image2d_size() { return mRO2D.size(); }
|
||||
read_image2d_iterator read_image2d_begin() { return mRO2D.begin(); }
|
||||
read_image2d_iterator read_image2d_end() { return mRO2D.end(); }
|
||||
|
||||
/// Add a 3D read_only image id.
|
||||
void addROImage3D(uint32_t id) { mRO3D.insert(id); }
|
||||
size_t read_image3d_size() { return mRO3D.size(); }
|
||||
read_image3d_iterator read_image3d_begin() { return mRO3D.begin(); }
|
||||
read_image3d_iterator read_image3d_end() { return mRO3D.end(); }
|
||||
|
||||
/// Add a 2D write_only image id.
|
||||
void addWOImage2D(uint32_t id) { mWO2D.insert(id); }
|
||||
size_t write_image2d_size() { return mWO2D.size(); }
|
||||
write_image2d_iterator write_image2d_begin() { return mWO2D.begin(); }
|
||||
write_image2d_iterator write_image2d_end() { return mWO2D.end(); }
|
||||
|
||||
/// Add a 3D write_only image id.
|
||||
void addWOImage3D(uint32_t id) { mWO3D.insert(id); }
|
||||
size_t write_image3d_size() { return mWO3D.size(); }
|
||||
write_image3d_iterator write_image3d_begin() { return mWO3D.begin(); }
|
||||
write_image3d_iterator write_image3d_end() { return mWO3D.end(); }
|
||||
|
||||
/// Add a raw uav id.
|
||||
void uav_insert(uint32_t id) { mRawUAV.insert(id); }
|
||||
bool uav_count(uint32_t id) { return mRawUAV.count(id); }
|
||||
size_t uav_size() { return mRawUAV.size(); }
|
||||
uav_iterator uav_begin() { return mRawUAV.begin(); }
|
||||
uav_iterator uav_end() { return mRawUAV.end(); }
|
||||
|
||||
/// Add an arena uav id.
|
||||
void arena_insert(uint32_t id) { mArenaUAV.insert(id); }
|
||||
bool arena_count(uint32_t id) { return mArenaUAV.count(id); }
|
||||
size_t arena_size() { return mArenaUAV.size(); }
|
||||
uav_iterator arena_begin() { return mArenaUAV.begin(); }
|
||||
uav_iterator arena_end() { return mArenaUAV.end(); }
|
||||
|
||||
// Add an error to the output for the current function.
|
||||
typedef enum {
|
||||
RELEASE_ONLY, /// Only emit error message in release mode.
|
||||
DEBUG_ONLY, /// Only emit error message in debug mode.
|
||||
ALWAYS /// Always emit the error message.
|
||||
} ErrorMsgEnum;
|
||||
/// Add an error message to the set of all error messages.
|
||||
void addErrorMsg(const char* msg, ErrorMsgEnum val = ALWAYS);
|
||||
bool errors_empty() { return mErrors.empty(); }
|
||||
error_iterator errors_begin() { return mErrors.begin(); }
|
||||
error_iterator errors_end() { return mErrors.end(); }
|
||||
|
||||
/// Add a string to the printf map
|
||||
uint32_t addPrintfString(std::string &name, unsigned offset);
|
||||
/// Add a operand to the printf string
|
||||
void addPrintfOperand(std::string &name, size_t idx, uint32_t size);
|
||||
bool printf_empty() { return mPrintfMap.empty(); }
|
||||
size_t printf_size() { return mPrintfMap.size(); }
|
||||
printf_iterator printf_begin() { return mPrintfMap.begin(); }
|
||||
printf_iterator printf_end() { return mPrintfMap.end(); }
|
||||
|
||||
/// Add a string to the metadata set for a function/kernel wrapper
|
||||
void addMetadata(const char *md, bool kernelOnly = false);
|
||||
void addMetadata(std::string md, bool kernelOnly = false);
|
||||
func_md_iterator func_md_begin() { return mMetadataFunc.begin(); }
|
||||
func_md_iterator func_md_end() { return mMetadataFunc.end(); }
|
||||
kernel_md_iterator kernel_md_begin() { return mMetadataKernel.begin(); }
|
||||
kernel_md_iterator kernel_md_end() { return mMetadataKernel.end(); }
|
||||
};
|
||||
} // llvm namespace
|
||||
#endif // _AMDILMACHINEFUNCTIONINFO_H_
|
||||
|
|
@ -16,7 +16,6 @@
|
|||
|
||||
#include "AMDILAlgorithms.tpp"
|
||||
#include "AMDILDevices.h"
|
||||
#include "AMDILMachineFunctionInfo.h"
|
||||
#include "AMDILUtilityFunctions.h"
|
||||
#include "llvm/ADT/Statistic.h"
|
||||
#include "llvm/ADT/StringExtras.h"
|
||||
|
|
@ -241,20 +240,6 @@ AMDILPeepholeOpt::doAtomicConversionIfNeeded(Function &F)
|
|||
if (mConvertAtomics) {
|
||||
return;
|
||||
}
|
||||
// If we did not convert all of the atomics, then we need to make sure that
|
||||
// the atomics that were not converted have their base pointers set to use the
|
||||
// arena path.
|
||||
Function::arg_iterator argB = F.arg_begin();
|
||||
Function::arg_iterator argE = F.arg_end();
|
||||
AMDILMachineFunctionInfo *mMFI = getAnalysis<MachineFunctionAnalysis>().getMF()
|
||||
.getInfo<AMDILMachineFunctionInfo>();
|
||||
for (; argB != argE; ++argB) {
|
||||
if (mSTM->device()->isSupported(AMDILDeviceInfo::ArenaUAV)) {
|
||||
mMFI->uav_insert(mSTM->device()->getResourceID(AMDILDevice::ARENA_UAV_ID));
|
||||
} else {
|
||||
mMFI->uav_insert(mSTM->device()->getResourceID(AMDILDevice::GLOBAL_ID));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -28,7 +28,6 @@ CPP_SOURCES := \
|
|||
AMDILIntrinsicInfo.cpp \
|
||||
AMDILISelDAGToDAG.cpp \
|
||||
AMDILISelLowering.cpp \
|
||||
AMDILMachineFunctionInfo.cpp \
|
||||
AMDILMachinePeephole.cpp \
|
||||
AMDILMCCodeEmitter.cpp \
|
||||
AMDILNIDevice.cpp \
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@
|
|||
#include "AMDGPUUtil.h"
|
||||
#include "AMDILCodeEmitter.h"
|
||||
#include "AMDILInstrInfo.h"
|
||||
#include "AMDILMachineFunctionInfo.h"
|
||||
#include "AMDILUtilityFunctions.h"
|
||||
#include "R600RegisterInfo.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
|
|
@ -42,7 +41,6 @@ namespace {
|
|||
formatted_raw_ostream &_OS;
|
||||
const TargetMachine * TM;
|
||||
const MachineRegisterInfo * MRI;
|
||||
AMDILMachineFunctionInfo * MFI;
|
||||
const R600RegisterInfo * TRI;
|
||||
bool evergreenEncoding;
|
||||
|
||||
|
|
@ -149,7 +147,6 @@ bool R600CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
|
|||
|
||||
TM = &MF.getTarget();
|
||||
MRI = &MF.getRegInfo();
|
||||
MFI = MF.getInfo<AMDILMachineFunctionInfo>();
|
||||
TRI = static_cast<const R600RegisterInfo *>(TM->getRegisterInfo());
|
||||
const AMDILSubtarget &STM = TM->getSubtarget<AMDILSubtarget>();
|
||||
std::string gpu = STM.getDeviceName();
|
||||
|
|
|
|||
|
|
@ -15,7 +15,6 @@
|
|||
#include "AMDGPUInstrInfo.h"
|
||||
#include "AMDGPUUtil.h"
|
||||
#include "AMDIL.h"
|
||||
#include "AMDILMachineFunctionInfo.h"
|
||||
#include "AMDILRegisterInfo.h"
|
||||
#include "R600InstrInfo.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
|
|
@ -34,7 +33,6 @@ namespace {
|
|||
private:
|
||||
static char ID;
|
||||
TargetMachine &TM;
|
||||
AMDILMachineFunctionInfo * MFI;
|
||||
const R600InstrInfo * TII;
|
||||
MachineRegisterInfo * MRI;
|
||||
|
||||
|
|
@ -73,7 +71,6 @@ FunctionPass *llvm::createR600LowerInstructionsPass(TargetMachine &tm) {
|
|||
bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
|
||||
{
|
||||
MRI = &MF.getRegInfo();
|
||||
MFI = MF.getInfo<AMDILMachineFunctionInfo>();
|
||||
|
||||
for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
|
||||
BB != BB_E; ++BB) {
|
||||
|
|
|
|||
|
|
@ -13,50 +13,10 @@
|
|||
|
||||
|
||||
#include "SIMachineFunctionInfo.h"
|
||||
#include "AMDGPU.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
|
||||
SIMachineFunctionInfo::SIMachineFunctionInfo()
|
||||
: AMDILMachineFunctionInfo(),
|
||||
SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
|
||||
: MachineFunctionInfo(),
|
||||
spi_ps_input_addr(0)
|
||||
{ }
|
||||
|
||||
SIMachineFunctionInfo::SIMachineFunctionInfo(MachineFunction &MF)
|
||||
: AMDILMachineFunctionInfo(MF),
|
||||
spi_ps_input_addr(0)
|
||||
{ }
|
||||
|
||||
|
||||
namespace {
|
||||
class SIInitMachineFunctionInfoPass : public MachineFunctionPass {
|
||||
|
||||
private:
|
||||
static char ID;
|
||||
TargetMachine &TM;
|
||||
|
||||
public:
|
||||
SIInitMachineFunctionInfoPass(TargetMachine &tm) :
|
||||
MachineFunctionPass(ID), TM(tm) { }
|
||||
virtual bool runOnMachineFunction(MachineFunction &MF);
|
||||
};
|
||||
} // End anonymous namespace
|
||||
|
||||
char SIInitMachineFunctionInfoPass::ID = 0;
|
||||
|
||||
FunctionPass *llvm::createSIInitMachineFunctionInfoPass(TargetMachine &tm) {
|
||||
return new SIInitMachineFunctionInfoPass(tm);
|
||||
}
|
||||
|
||||
/* A MachineFunction's MachineFunctionInfo is initialized in the first call to
|
||||
* getInfo(). We need to intialize it as an SIMachineFunctionInfo object
|
||||
* before any of the AMDIL passes otherwise it will be an
|
||||
* AMDILMachineFunctionInfo object and we won't be able to use it.
|
||||
*/
|
||||
bool SIInitMachineFunctionInfoPass::runOnMachineFunction(MachineFunction &MF)
|
||||
{
|
||||
SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,17 +15,16 @@
|
|||
#ifndef _SIMACHINEFUNCTIONINFO_H_
|
||||
#define _SIMACHINEFUNCTIONINFO_H_
|
||||
|
||||
#include "AMDILMachineFunctionInfo.h"
|
||||
#include "llvm/CodeGen/MachineFunction.h"
|
||||
|
||||
namespace llvm {
|
||||
|
||||
class SIMachineFunctionInfo : public AMDILMachineFunctionInfo {
|
||||
class SIMachineFunctionInfo : public MachineFunctionInfo {
|
||||
|
||||
private:
|
||||
|
||||
public:
|
||||
SIMachineFunctionInfo();
|
||||
SIMachineFunctionInfo(MachineFunction &MF);
|
||||
SIMachineFunctionInfo(const MachineFunction &MF);
|
||||
unsigned spi_ps_input_addr;
|
||||
|
||||
};
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@
|
|||
|
||||
#include "AMDGPU.h"
|
||||
#include "AMDGPUUtil.h"
|
||||
#include "AMDILMachineFunctionInfo.h"
|
||||
#include "SIInstrInfo.h"
|
||||
#include "llvm/CodeGen/MachineFunctionPass.h"
|
||||
|
||||
|
|
@ -42,7 +41,6 @@ FunctionPass *llvm::createSIPropagateImmReadsPass(TargetMachine &tm) {
|
|||
|
||||
bool SIPropagateImmReadsPass::runOnMachineFunction(MachineFunction &MF)
|
||||
{
|
||||
AMDILMachineFunctionInfo * MFI = MF.getInfo<AMDILMachineFunctionInfo>();
|
||||
const SIInstrInfo * TII = static_cast<const SIInstrInfo*>(TM.getInstrInfo());
|
||||
|
||||
for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue