Commit graph

217 commits

Author SHA1 Message Date
Alyssa Rosenzweig
74e92274af asahi,agx: Use new tilebuffer infrastructure
Flag day change to replace the previous hardcoded background/end-of-tile shaders
and the API-style load/store_output in fragment shaders with the generated
shaders and lowered *_agx intrinsics. This gets us working non-UNORM8 render
targets and working MRT. It's also a step in the direction of working MSAA but
that needs a lot more work, since the multisampling programming model on AGX is
quite different from any of the APIs (including Metal).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
c5c0ea39f6 asahi: Add new clear/reload/store infrastructure
With multiple render targets, it's not practical to generate all
variants of the background and end-of-tile programs at start up. Rather
than trying, add a hash table of meta program keys to background
programs, and compile variants as they're needed.

With the new infrastructure, it's sensible to handle clears with the
same code path as reloads. In addition to getting us closer to multiple
render target support, this gets us support for non-RGBA8 render
targets, as the u8norm tilebuffer format was baked into the hardcoded
clear shader and store shaders used before.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
b1f5004ee7 asahi: Add agx_usc_shared_none helper
Convenience for vertex USC programs.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
c713197c25 asahi: Add R16 SNORM formats
For completeness, since we do have hardware for this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
d637189d36 asahi: Add more XML via PowerVR
These bits are the same as RGX.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
a3907e92da asahi: Add note to XML about 16-bit varyings
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
94a8fe51d5 asahi: Identify more depth-related fields in XML
Needed for gl_FragDepth writes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
6ce615d852 asahi: Add XML for layered rendering
We don't need to support this for a while but it's good to know the mechanism.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
74de571402 asahi: Add NIR pass to lower tilebuffer access
The compiler can't handle load/store_output directly for nontrivial tilebuffer
layouts. Add a NIR pass to lower these intrinsics, applying a given layout.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
66a680a043 asahi: Add tilebuffer layout helpers
Laying out the tilebuffer is nontrivial and a task shared between GL and VK, so
add unit-tested helpers.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
5d3243ea2d asahi: Add some notes about unknowns to the XML
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
363ffa779d asahi: Identify multisampling fields of shared layout
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
5a20c90508 asahi: Add _with_bo pool uploads
Will be useful for managing our meta shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
8781aef6b4 asahi: Make libasahi_lib depend on libasahi_decode
The track_alloc and track_free symbols are used, we need to link them in.
Depending on build flags / environment / etc, fixes the potential build error
hit by a CI job:

mold: error: undefined symbol: agxdecode_track_alloc
>>> referenced by agx_device.c
>>>               src/asahi/lib/libasahi_lib.a(src/asahi/lib/libasahi_lib.a.p/agx_device.c.o):(agx_shmem_alloc)>>> referenced by agx_device.c
>>>               src/asahi/lib/libasahi_lib.a(src/asahi/lib/libasahi_lib.a.p/agx_device.c.o):(agx_bo_create)
mold: error: undefined symbol: agxdecode_track_free
>>> referenced by agx_device.c
>>>               src/asahi/lib/libasahi_lib.a(src/asahi/lib/libasahi_lib.a.p/agx_device.c.o):(agx_bo_unreference)

...when trying to link with libasahi_lib without libasahi_decode for unit tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
6ee6cfec41 asahi: Use PIPE_FORMATs for driver-compiler ABI
This avoids exposing the ISA-internal agx_format to the driver, instead hiding
it behind a real PIPE_FORMAT. This lets us use real pipe formats in formatted
intrinsics in NIR, which is convenient; it will allow us to simplify the
compiler/driver ABI; and it lets us use common format helpers (e.g.
util_format_get_blocksize) for the internal formats in driver lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00
Alyssa Rosenzweig
f328207475 asahi: Split out agx_usc.h into a common file
So the tilebuffer helpers can build the "shared" USC word. Also because Ella
will probably want to use these O:)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:11 +00:00
Alyssa Rosenzweig
8be506039d asahi: Note some magic bits used with memoryless RTs
Obviously there can't *actually* be memoryless render targets, because
how would partial renders work? The control stream with memoryless looks
like everything would if it went to memory (e.g. full 2D MSAA
attachments for the partial loads/stores even if only a resolved
2D image for the final store). Except the memoryless attachments all
load from the same address 0xeeee0000. Clearly that's not actually what
happens, so what gives? Unclear... but I see the magic bits mentioned
here set, and I assume there are some firmware (or kernel) shenanigans
used to JIT allocate the backing storage for partial renders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:11 +00:00
Alyssa Rosenzweig
3fa87e47d5 asahi: Identify "Sample mask after depth/stencil" bit
Corresponds to Metal [[sample_mask,post_depth_coverage]].

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:11 +00:00
Alyssa Rosenzweig
ff616099ce asahi: Identify the pass type enum
Via PowerVR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
2e6369f5f6 asahi: Identify PBE sample count
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
1f0edc0158 asahi: Identify Dimension for Render Target
Metal uses when rendering to multisampled 2D.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
9c52001a1d asahi: Implement stencil texturing
Stencil texturing is easy: S8_UINT is textured like R8_UINT (with a
little swizzle fixup), and stencil is always S8_UINT thanks to
u_transfer_helper. So we just need to do some fixups to make
u_transfer_helper's seperate_stencil work and everything will work out.

Passes dEQP-GLES31.functional.stencil_texturing.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
1ffbd53aa2 asahi: Add internal formats for RGB10A2
We need to use I16 as the interchange format here. Fixes:

   dEQP-GLES3.functional.fragment_out.basic.uint.rgb10_a2ui*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
efb5aef935 asahi: Implement perf_debug
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19811>
2022-11-19 04:27:10 +00:00
Alyssa Rosenzweig
a57b4577a1 asahi: Fix indexed draw decode
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19606>
2022-11-17 02:47:10 +00:00
Asahi Lina
b774ed7c18 asahi: Stub import/export code
It will be used on Linux, and it is convenient to be able to compile the same
code on macOS in the mean time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19606>
2022-11-17 02:47:10 +00:00
Asahi Lina
7147313d0a asahi: Support XRGB formats
Just treat them like ARGB. Not sure if this is sane, but it works for now...

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19606>
2022-11-17 02:47:10 +00:00
Asahi Lina
7c59e75481 asahi: Add renderonly to device
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19606>
2022-11-17 02:47:10 +00:00
Alyssa Rosenzweig
eac8cbb049 asahi: Identify counts for compute kernels
In the same place as for vertex/fragment.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19265>
2022-10-29 19:23:51 +00:00
Alyssa Rosenzweig
9061e960b2 asahi: Add group tests
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:59:25 -04:00
Alyssa Rosenzweig
8b464f4c59 asahi: Don't use unnecessary test fixture
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:59:23 -04:00
Alyssa Rosenzweig
537a77ea6b asahi: Rename LOD clamps tests to fit other packing
We'll use for testing the "groups" encoding.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:59:21 -04:00
Alyssa Rosenzweig
721c4f2186 asahi: Remove "padding" field
Trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:58:48 -04:00
Alyssa Rosenzweig
06cb242a54 asahi: Identify more shader-related fields
The big discovery is the "number of uniform registers" field. I learned
about this one accidentally when my preamble shaders weren't working
right, because we had inadvertently hardcoded "at most 32 registers" :-)

In the course of identifying that field, I found that the pipeline
address is used as a tagged pointer, with some unknown field in the
bottom bits and alignment demanded. The XML is updated to account for
this.

I later found that there's also a "number of general purpose registers
used by the preamble shader" field. I missed this one first, because the
encoding is slightly different from the usual "number of general purpose
registers in the main shader" field. The specification is slightly
coarser. I don't know why the hardware needs that
information anyway -- occupancy of the preamble shader should be
irrelevant -- but it's not a big deal.

Finally I found that the "more than 4 textures?" bit is... not that. I
do not yet know what it is, but it is... not that.

These all use the new groups() modifier for GenXML

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:58:37 -04:00
Alyssa Rosenzweig
24bfa5af88 asahi: Identify "Uniform high" USC word
The start field in the Uniform USC word is only 8-bits, whereas 9-bits
are required to address the entire uniform register file. This other
word gets used for the high half, with start indexed from u128l in
the natural way.

Apparently spending the evening stuffing too many uniforms into Metal is
paying off.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:54:07 -04:00
Alyssa Rosenzweig
e126338394 asahi: Precompile for shader-db
This gets shader-db's runner working, in conjunction with a shader-db ./run
modified to set ASAHI_MESA_DEBUG=precompile. This flag triggers precompiles of
all shaders witha default key so we can exercise the compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:54:07 -04:00
Alyssa Rosenzweig
46ae8e659d asahi: Remove AGX_FAKE_DEVICE environment variable
The proper way to fake a device on Linux will be drm-shim.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
2022-10-22 14:54:07 -04:00
Alyssa Rosenzweig
6689d67603 asahi: Remove no-direct-packing
It's weird.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:52 -04:00
Alyssa Rosenzweig
ea58edaafb asahi: Use a header more like Intel's GenXML
We're trying to converge on a common schema.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:52 -04:00
Alyssa Rosenzweig
ab2d5deec2 asahi,panfrost: Remove exact attribute
Not used, although in the future it might be...

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:52 -04:00
Alyssa Rosenzweig
a64e38b0aa panfrost,asahi: Remove unused function
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:51 -04:00
Alyssa Rosenzweig
0f24c8ef5f panfrost,asahi: Remove unused prepare macro
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:51 -04:00
Alyssa Rosenzweig
0302519f1c asahi/genxml: Defeature uint/float
Unused, relic from panfrost and not in upstream genxml.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:51 -04:00
Alyssa Rosenzweig
8eefda4ea9 asahi: Eliminate "Pixel Format" type from GenXML
This is leaky and hurts compatibility with upstream GenXML. Just use the
actual hardware fields.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18922>
2022-10-13 18:06:51 -04:00
Alyssa Rosenzweig
bcd75a13e0 asahi: Identify shared memory layouts
Somehow maps to the tile size. Not sure about the details yet.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00
Alyssa Rosenzweig
b8b3c9fa2a asahi: Identify pixel stride
Number of bytes in a pixel in the tilebuffer, does not depend on the
tile size.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00
Alyssa Rosenzweig
933a9e350e asahi: Overhaul USC control packing
Break up the monolithic SET_SHADER_EXTENDED packet into the separate
underlying commands (some only 2-byte sized and aligned), and add a
builder for USC control streams like we did for PPP updates to make that
change manageable.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00
Alyssa Rosenzweig
35d5558fa5 asahi/genxml: Overflow up to words when packing
So we can pack things that aren't 4-byte sized. Note this doesn't help
with alignment.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00
Alyssa Rosenzweig
22d3756207 asahi: Consolidate magic numbers for USC controls
Aka "pipeline" states. It's another command/control stream.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00
Alyssa Rosenzweig
09cc736c42 asahi: Identify shared memory fields
For compute kernels, this encodes how much workgroup-local memory is
used ("shared memory" or "threadgroup memory" or "local memory"). This
memory is partitioned by the hardware.

For fragment shaders, this... encodes exactly the same thing. There is
no traditional tilebuffer in AGX, instead local memory is interpreted as
an imageblock, where each workgroup is a tile. This is a nifty design.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18623>
2022-09-18 10:34:37 -04:00