Commit graph

5471 commits

Author SHA1 Message Date
Samuel Pitoiset
7324977e42 radv: remove the secure compile support feature
Steam was the only client of this feature and it seems no longer used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5869>
2020-07-13 08:56:44 +02:00
Samuel Pitoiset
55776a0ae0 radv: return VK_ERROR_DEVICE_LOST if wait-for-idle failed or expired
When ctx_wait_idle failed, something really bad happened likely
a GPU hang. Make sure to return the appropriate Vulkan error code
in this case.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5843>
2020-07-12 13:17:42 +02:00
Rhys Perry
19ca34ed27 aco: don't create phis with undef operands in the boolean phi pass
We can create better merge code is we pass on undef.

fossil-db (Navi):
Totals from 1208 (0.89% of 135946) affected shaders:
SGPRs: 66864 -> 66200 (-0.99%); split: -1.04%, +0.05%
SpillSGPRs: 1179 -> 1156 (-1.95%)
CodeSize: 6516672 -> 6469564 (-0.72%); split: -0.76%, +0.04%
Instrs: 1232680 -> 1220859 (-0.96%); split: -0.97%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
9a089baff1 aco: optimize boolean phis with uniform selections
Even though the boolean can be divergent, the control flow can be (at
least partially) uniform. For example, we don't have to create any
s_andn2_b64/s_and_b64/s_or_b64 instructions with this code:
a = ...
loop {
    b = bool_phi a, c
    if (uniform)
        break
    c = ...
}
d = phi c

fossil-db (Navi):
Totals from 5506 (4.05% of 135946) affected shaders:
SGPRs: 605720 -> 604024 (-0.28%)
SpillSGPRs: 52025 -> 51733 (-0.56%)
CodeSize: 65221188 -> 64957808 (-0.40%); split: -0.41%, +0.00%
Instrs: 12637881 -> 12584610 (-0.42%); split: -0.42%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
f622e80494 aco: create better code for boolean phis with constant operands
fossil-db (Navi):
Totals from 6394 (4.70% of 135946) affected shaders:
SGPRs: 651408 -> 651344 (-0.01%)
SpillSGPRs: 52102 -> 52019 (-0.16%)
CodeSize: 68369664 -> 68229180 (-0.21%); split: -0.21%, +0.00%
Instrs: 13236611 -> 13202126 (-0.26%); split: -0.26%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Rhys Perry
47b0653d5d aco: rework boolean phi pass
The pass should now create much less linear phis.

Removes piles of phis and lots of sgpr spilling from Detroit: Become
Human and parallel-rdp.

fossil-db (Navi):
Totals from 7654 (5.63% of 135946) affected shaders:
SGPRs: 796224 -> 787616 (-1.08%); split: -1.08%, +0.00%
VGPRs: 576164 -> 572116 (-0.70%); split: -0.70%, +0.00%
SpillSGPRs: 147695 -> 52258 (-64.62%)
SpillVGPRs: 2167 -> 2102 (-3.00%)
CodeSize: 80671680 -> 76240420 (-5.49%); split: -5.50%, +0.01%
Scratch: 137216 -> 135168 (-1.49%)
MaxWaves: 54235 -> 54707 (+0.87%)
Instrs: 15569429 -> 14820569 (-4.81%); split: -4.82%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3388>
2020-07-10 22:36:14 +00:00
Eric Engestrom
448eb19158 vulkan: automatically compile the display platform when available
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3161>
2020-07-10 13:48:24 +00:00
Pierre-Eric Pelloux-Prayer
50d20dc055 ac/llvm: export ac_init_llvm_once in targets
If a program like mpv uses both radeon_dri.so (because --vo=gpu) and
radeonsi_drv_video.so (because --hwdec=vaapi) then LLVM will be inialized twice.

The commit exports the ac_init_llvm_once so there's only one instance of the
function.

See also 18b12bf533 ("targets: export radeon winsys_create functions to silence LLVM warning")
which implemented this workaround initially.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1377
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5648>
2020-07-10 11:57:11 +02:00
Samuel Pitoiset
ca51f75f9d aco: fix more validation errors from vgpr spill/restore code
It looks like the attempt to fix this in 1e791e51a6 was incomplete.

This fixes crashes with Devil May Cry 5 with a debug build.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5828>
2020-07-10 08:28:33 +02:00
Pierre-Eric Pelloux-Prayer
438392243f ac/llvm: remove the -1 hack from ac_atomic_inc_wrap
To match the behavior of proprietary drivers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5688>
2020-07-09 09:58:01 +02:00
Samuel Pitoiset
40526451ca radv: compute prim_vertex_count at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
972081c688 radv: adjust IA_MULTI_VGT_PARAM.PARTIAL_VS_WAVE at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
5f1b0f4b48 radv: adjust IA_MULTI_VGT_PARAM.WD_SWITCH_ON_EOP at draw time
In preparation for the dynamic topology state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
9f561feecc radv: store the primitive topology hardware value in the pipeline
Will help for upcoming changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5801>
2020-07-09 06:31:39 +00:00
Samuel Pitoiset
6f734324a5 radv: implement missing VK_ACCESS_MEMORY_{READ,WRITE}_BIT
From the Vulkan spec 1.2.146:
    "VK_ACCESS_MEMORY_READ_BIT specifies all read accesses. It is
     always valid in any access mask, and is treated as equivalent
     to setting all READ access flags that are valid where it is
     used."

    "VK_ACCESS_MEMORY_WRITE_BIT specifies all write accesses.
     It is always valid in any access mask, and is treated as
     equivalent to setting all WRITE access flags that are valid
     where it is used."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3241
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5807>
2020-07-09 08:05:20 +02:00
Bas Nieuwenhuizen
40e00c800c amd/llvm: Mark pointer function arguments as 32-byte aligned.
Otherwise LLVM does not see the pointers as allowing speculative
loads.

The pipeline-db results are pretty wild, but mostly what is to be
expected from allowing more code movement in LLVM:

Totals from affected shaders:
SGPRS: 157728 -> 168336 (6.73 %)
VGPRS: 158628 -> 158664 (0.02 %)
Spilled SGPRs: 10845 -> 24753 (128.24 %)
Spilled VGPRs: 13 -> 13 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 8 -> 8 (0.00 %) dwords per thread
Code Size: 17189180 -> 17313712 (0.72 %) bytes
LDS: 204 -> 204 (0.00 %) blocks
Max Waves: 5700 -> 5687 (-0.23 %)
Wait states: 0 -> 0 (0.00 %)

This gives some boosts for shaders we can move a descriptor load
outside a loop.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3159>
2020-07-08 23:47:06 +00:00
Simon Ser
9ad19fff3e radv: use bitshifts for debug enum values
Explicit values are getting out of hand.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5735>
2020-07-08 21:39:09 +00:00
Marek Olšák
55cf97f56e Revert "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
This reverts commit 7406ea37e6.

Fixes: 7406ea37 "ac/surface: require that gfx8 doesn't have DCC in order to be displayable"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3190

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5780>
2020-07-08 19:16:15 +00:00
Bas Nieuwenhuizen
ffb8020f6e radv: Use correct semaphore handle type for Android import.
Coincidentally got a bugreport of a game that is broken without the import
fix below, but it turns out I made a copy-paste error as well ..

In good news it is clearly tested now.

Fixes: ad15149958 "radv: Set handle types in Android semaphore/fence import."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5783>
2020-07-08 14:21:16 +00:00
Samuel Pitoiset
84ed2793eb radv: set depth/stencil enable values correctly for the meta clear path
They are booleans.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5803>
2020-07-08 12:41:10 +00:00
Rhys Perry
ec4d3def16 aco: use VOP2 version of v_mbcnt_hi_u32_b32 on GFX6/7
fossil-db (Pitcairn):
Totals from 2172 (1.58% of 137414) affected shaders:
CodeSize: 7109080 -> 7100100 (-0.13%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5623>
2020-07-07 18:48:15 +00:00
Daniel Schürmann
10020b8d17 aco: remove superflous (bool & exec) if the result comes from VOPC
This works in cases where the VOPC instruction was executed with
the same exec mask.

Totals from affected shaders: (VEGA)
SGPRS: 1342204 -> 1342164 (-0.00 %)
VGPRS: 877220 -> 877220 (0.00 %)
Spilled SGPRs: 157800 -> 157800 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 118083212 -> 118021748 (-0.05 %) bytes
LDS: 26 -> 26 (0.00 %) blocks
Max Waves: 144024 -> 144024 (0.00 %)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5563>
2020-07-07 17:35:01 +02:00
Rhys Perry
e4654a35b0 radv: enable zerovram for Quantic Dream games
Fixes various artifacts with Detroit: Become Human. This assumes other
Vulkan games using the same engine could have the same issues.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5710>
2020-07-07 14:44:35 +00:00
Bas Nieuwenhuizen
c5d8961b0b Revert "radv: add support for MRTs compaction to avoid holes"
This reverts commit 7a5e6fd25f.

Since we have two different users bisecting issues to this commit, let's
revert.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 7a5e6fd25f "radv: add support for MRTs compaction to avoid holes"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3202
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3228
(Other report in https://gitlab.freedesktop.org/mesa/mesa/-/issues/3151#note_558589)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5758>
2020-07-06 14:06:37 +00:00
Bas Nieuwenhuizen
ad913a18b1 radv: Always enable PERFECT_ZPASS_COUNTS.
We have an issue with early depth testing and discard, where
non-perfect counts count the tile if the early depth test succeeds.

We could spend a lot of effort to set this conditionally based
on the presence of the two conditions, but in the presence of
inherited queries let's try this first.

Changing PERFECT_ZPASS_COUNTS since I'm pretty sure this has a lower
performance impact than always using late depth testing.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3218
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5757>
2020-07-06 13:54:38 +00:00
Bas Nieuwenhuizen
ad15149958 radv: Set handle types in Android semaphore/fence import.
Seems like we forgot to set it all this time ...

Fixes: b1444c9ccb "radv: Implement VK_ANDROID_native_buffer."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5759>
2020-07-06 13:40:49 +00:00
Samuel Pitoiset
7b21ce401f radv: disable FMASK compression when drawing with GENERAL layout
Fixes: 96063100 "radv: enable shaderStorageImageMultisample feature on GFX8+"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3219
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/855
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3165>
2020-07-06 13:26:58 +00:00
Bas Nieuwenhuizen
01986eaf05 amd/addrlib: fix another C++ one definition rule violation
Clashes with the SI definition.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3116
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5673>
2020-07-06 10:54:01 +00:00
Hyunjun Ko
9190cc9b15 tu,radv: fix potentially wrong offset of flexible array.
v2. Remove redundant memset and make the expression simpler.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5703>
2020-07-03 00:45:16 +00:00
Samuel Pitoiset
ab9ecb607b radv,vulkan: add a new x11 wsi drirc workaround for DOOM Eternal
DOOM Eternal happily creates a swapchain with 2 images for IMMEDIATE.
This fixes a 10% performance issue with RADV.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5704>
2020-07-02 08:31:57 +00:00
Samuel Pitoiset
11a6a96f8a radv: fix wide lines with multisample enabled
When set, EXPAND_LINE_WIDTH expands the line width by 1/cos(a),
where a is the minimum angle from horizontal or vertical. This
seems required by OpenGL line rasterization but not by Vulkan.

Similar to what AMDVLK and AMDGPU-PRO do for AA wide lines.

This fixes
dEQP-VK.rasterization.interpolation_multisample_*_bit.*lines_wide.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5698>
2020-07-02 07:51:48 +00:00
Samuel Pitoiset
53372175c9 radv: fix wide points and lines
The maximum value for both points and lines is 65536. This doesn't
fix anything known (just found this while looking in that area).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5696>
2020-07-02 08:26:03 +02:00
Marek Olšák
2866a6f78d ac/gpu_info: fix num_physical_sgprs_per_simd for gfx10
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
2020-06-30 10:56:41 +00:00
Samuel Pitoiset
7a5e6fd25f radv: add support for MRTs compaction to avoid holes
SPI_SHADER_COL_FORMAT allocates export memory and CB_SHADER_MASK
map them to higher MRTs if necessary. The hardware allows to remap
MRTs to avoid holes somehow.

For example, if we have a scenario where MRT0 is unused and only
MRT1 and MRT2 are used, SPI_SHADER_COL_FORMAT is 0x77 and
CB_SHADER_MASK/CB_TARGET_MASK are 0x770 (this assumes
SPI_SHADER_UINT16_ABGR is set).

This allows us to remove one workaround that was added for fixing
GPU hangs with DXVK. I think this is because SPI_SHADER_COL_FORMAT
expects contiguous MRTs to be allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
4e0dcbb880 radv: use SPI_SHADER_ZERO for non-written color attachments
When colorWriteMask is 0 we can assume that this color attachment
is unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
18b42eebd5 radv: rework 8/16-bit color attachment formats detection
To prepare for MRTs compaction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
76ee45d3a8 radv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>
2020-06-29 08:43:14 +00:00
Samuel Pitoiset
26a48d8d35 radv: enable VK_AMD_shader_ballot on GFX6-7 with both compiler backends
It gives +1-2 FPS with Doom Eternal on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5659>
2020-06-29 07:40:05 +00:00
Daniel Schürmann
5c0f82b0d7 aco: fix partial copies on GFX6/7
While we don't allow partial subdword copies,
we still need to be able to split 64bit registers

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5663>
2020-06-26 19:21:57 +00:00
Samuel Pitoiset
f13d79f519 radv: remove the load/store workaround for Monster Hunter World with LLVM
Now that ACO is default, this is pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
2020-06-26 14:42:44 +02:00
Samuel Pitoiset
a30ad8cb23 radv: remove the shader ballot workaround for Youngblood with LLVM
Now that ACO is default, this is now pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>
2020-06-26 14:42:42 +02:00
Marek Olšák
c7680625c3 ac,winsys/amdgpu: align IBs the same as the kernel
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Marek Olšák
556f4458fe amd: add proper definitions for NOP packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
2020-06-26 07:02:57 +00:00
Daniel Schürmann
63e1e7209c radv: enable ACO by default
No more dragons have been seen, caution is still required...

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:30 +02:00
Daniel Schürmann
db0afb3800 radv: change use_aco -> use_llvm
We are about to make ACO the default backend.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:28 +02:00
Daniel Schürmann
b78f64507e radv: introduce RADV_DEBUG=llvm option
This option enables the LLVM compiler backend to be used
for shader compilation

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
2020-06-25 15:16:23 +02:00
Samuel Pitoiset
a102896cff radv: lower 64-bit dfloor on GFX6 for fixing precision issues
GFX6 doesn't support v_floor_f64 and the precision of v_fract_f64
which is used to implement 64-bit floor is less than what Vulkan
requires.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
2020-06-25 12:09:08 +00:00
Samuel Pitoiset
c84f11e7b6 radv: lower 64-bit drcp/dsqrt/drsq for fixing precision issues
The hardware precision of v_rcp_f64, v_sqrt_f64 and v_rsq_f64
is less than what Vulkan requires.

This lowers using the Goldschmidt's algorithm to improve precision.

Fixes dEQP-VK.glsl.builtin.precision_double.* on both compiler
backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
2020-06-25 12:09:08 +00:00
Rhys Perry
4fc0499049 aco: remove outdated assert in handle_operands()
"target" is no longer expected to be completely inside "swap".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
2020-06-24 20:38:35 +00:00
Rhys Perry
7cad27831d aco: ignore blocked registers when checking edges in get_reg_impl()
If the only two registers available are consecutive and used by killed
operands, both of them will be blocked and fail the edge check.

Totals from 903 (0.66% of 135946) affected shaders:
VGPRs: 30892 -> 30884 (-0.03%)
CodeSize: 1584468 -> 1584044 (-0.03%); split: -0.05%, +0.02%
MaxWaves: 14374 -> 14378 (+0.03%)
Instrs: 306482 -> 306399 (-0.03%); split: -0.06%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5626>
2020-06-24 20:38:35 +00:00