Commit graph

27 commits

Author SHA1 Message Date
Ilia Mirkin
6fd398f48e swr: no support for shader stencil export
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-15 20:25:28 -05:00
Ilia Mirkin
8c0f76e961 swr: fix texture layout for compressed formats
Fixes the texsubimage piglit and lets the copyteximage one get further.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-11-15 20:25:15 -05:00
Ilia Mirkin
bef4a48d1c swr: add support for EXT_depth_bounds_test
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-11-08 19:28:35 -05:00
Ilia Mirkin
3fdeb7c983 gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS
This allows the driver to signal that it can't handle random
interleaving of attributes across buffers. This is required for
ARB_transform_feedback3, and it's initialized to whatever the previous
value of PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME was except for nv50 where
it is disabled. Note that the proprietary drivers never expose
ARB_transform_feedback3 on any GT21x's (where nouveau previously did),
and after some effort I was unable to get it to work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-22 12:02:35 -04:00
Nicolai Hähnle
700a571f89 gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTS
This is a screen cap because drivers are expected to support it either
for all shader types or for none of them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-10-12 18:50:10 +02:00
Tim Rowley
50842e8a93 swr: replace gallium->swr format enum conversion
Replace old string comparison with a mapping table.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-09-27 12:55:26 -05:00
Tim Rowley
7514e326f8 swr: fixes for format mapping and texture sizing
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-09-08 10:43:21 -05:00
Ilia Mirkin
9515d651f9 gallium: add a cap to expose whether driver supports mixed color/zs bits
Some hardware can't render to color/depth buffers of mixed bitness. When
that happens a fallback has to happen, but this allows the driver to
express that this isn't an optimal scenario. The purpose of this is to
remove such fbconfigs from the GLX/EGL config list.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-23 18:30:49 -04:00
Tim Rowley
9aa75e5d46 swr: [rasterizer jitter] add core string to JitManager
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
2016-08-10 11:09:42 -05:00
Marek Olšák
54272e18a6 gallium: add a pipe_context parameter to fence_finish
required by glClientWaitSync (GL 4.5 Core spec) that can optionally flush
the context

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-08-10 01:11:10 +02:00
Józef Kucia
3cd28fe3de gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)
This allows Gallium drivers to advertise the subpixel precision
for floating point viewports bounds.

v2:
  - Set ViewportSubpixelBits in st_init_limits.

Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-20 12:45:31 +02:00
Axel Davy
59a692916c gallium: Add a cap for offset_units_unscaled
D3D9 has a different behaviour for depth bias.

For OGL/D3D1X, the depth bias unit is the
minimal resolvable value for the depth buffer,
which depends on the format (and has different
behaviour for float depth buffers).

For D3D9, the depth bias unit is 1.0f.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-06-25 10:16:15 +02:00
Ilia Mirkin
07fcb06fe0 gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all drivers
This says how many window rectangles are supported by the
implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-18 13:38:29 -04:00
Tim Rowley
2c85128e01 swr: implement clipPlanes/clipVertex/clipDistance/cullDistance
v2: only load the clip vertex once

v3: fix clip enable logic, add cullDistance

v4: remove duplicate fields in vs jit key, fix test of clip fixup needed

v5: fix clipdistance linkage for slot!=0,4

v6: support clip+cull; passes most piglit clip (failures understood)

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-09 13:28:35 -05:00
Tim Rowley
87f0a0448f swr: fix provoking vertex
Use rasterizer provoking vertex API.

Fix rasterizer provoking vertex for tristrips and quad list/strips.

v2: make provoking vertex tables static const

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-07 11:47:52 -05:00
Ilia Mirkin
edfa7a4b25 gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowed
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-06-06 20:49:29 -04:00
Kenneth Graunke
70048eb1e3 gallium: Add a pipe cap for whether primitive restart works for patches.
Some hardware supports primitive restart on patch primitives, and other
hardware does not.  Modern GL and ES include a query for this feature;
adding a capability bit will allow us to answer it.

As far as I know, AMD hardware does not support this feature, while
NVIDIA and Intel hardware does.  However, most Gallium drivers do not
appear to support tessellation shaders yet.  So, I've enabled it for
nvc0 and disabled it everywhere else.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-23 16:44:11 -07:00
Tim Rowley
4997169779 swr: [rasterizer] rename _aligned_malloc to AlignedMalloc
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-05-19 16:26:38 -05:00
Tim Rowley
8987460b9e swr: PIPE_CAP_CULL_DISTANCE cap request response
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-05-19 13:27:33 -05:00
Tim Rowley
2785f2f2d7 swr: properly expose compressed format support
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-05-12 14:12:18 -05:00
Tim Rowley
81c1c481ed swr: add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT to get_param
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-04-21 11:32:09 -05:00
Tim Rowley
b9294bc345 swr: handle pci cap requests
Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
2016-04-12 20:18:00 -05:00
Bas Nieuwenhuizen
70dcd841f7 gallium: Add capability for ARB_robust_buffer_access_behavior.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-12 20:53:06 +02:00
George Kyriazis
dd63fa28f1 gallium/swr: Cleaned up some context-resource management
Removed bound_to_context.  We now pick up the context from the screen
instead of the resource itself.  The resource could be out-of-date
and point to a pipe that is already freed.

Fixes manywin mesa xdemo.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-03-17 20:57:52 -05:00
Bruce Cherniak
e9d68cc3da gallium/swr: Resource management
Better tracking of resource state and synchronization.
A follow on commit will clean up resource functions into a new
swr_resource.cpp file.

Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2016-03-14 14:07:48 -05:00
Tim Rowley
84f857bef7 gallium/swr: remove use of BYTE from swr driver
Remove use of a win32-style type leaked from the swr rasterizer.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-03-10 11:20:58 -06:00
Tim Rowley
2b2d3680bf gallium/swr: add OpenSWR driver
OpenSWR is a new software rasterizer for x86 processors designed
for high performance and high scalablility on visualization workloads.

Acked-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
2016-03-02 18:38:41 -06:00