Commit graph

101 commits

Author SHA1 Message Date
George Ouzounoudis
b2fa2ed04e nouveau/codegen: Do not keep redundant info for tessellation domain
Just add an assert instead.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
2023-08-04 21:32:06 +00:00
Alyssa Rosenzweig
95e3df39c0 treewide: sed out more is_ssa
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
a8013644a1 nir: Drop nir_alu_src::{negate,abs}
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
5fead24365 treewide: Drop is_ssa asserts
We only see SSA now.

Via Coccinelle patch:

    @@
    expression x;
    @@

    -assert(x.is_ssa);

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
d559764e7c nir: Remove nir_alu_dest::saturate
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
59645f05a7 nouveau/codegen: Drop writemask check
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24471>
2023-08-03 13:06:38 +00:00
Alyssa Rosenzweig
17d66055ae nir: Remove reg_intrinsics parameter to convert_from_ssa
All users must set it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24450>
2023-08-02 10:26:45 -04:00
Alyssa Rosenzweig
51db19f7a2 nir: Rename scoped_barrier -> barrier
sed + ninja clang-format + fix up spacing for common code.

If you are unhappy that I did not manually change the whitespace of your driver,
you need to enable clang-format for it so the formatting would happen
automatically.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24428>
2023-08-01 23:18:29 +00:00
M Henning
d4086be6bc nv/codegen: Implement nir_op_fquantize2f16
Passes most of dEQP-VK.spirv_assembly.instruction.graphics.opquantize.* but
not the too_small_* tests for some reason. (Tested on kepler.)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
Faith Ekstrand
6023943b81 nv50/ir: Run nir_divergence_analysis before out-of-SSA
We don't actually use or need this information but it gets generated by
nir_opt_non_uniform_access() and stale divergence information can cause
out-of-SSA to assert in parallel copy lowering.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
George Ouzounoudis
cdece16cf4 nouveau/codegen: Add capability to pre-specify tessellation domain
In the case of SPIRV tessellation shaders, the execution mode can be
specified in the tessellation control shader. So we need a way to know the domain
when compiling the tessellation evaluation shader.

Acked-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:04 +00:00
George Ouzounoudis
df5d1ef2b5 nouveau/codegen: Fix compact patch varyings in case of NIR
The code path was not implemented and an assert was reached.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
b96639011c nouveau/codegen: Don't convertSurfaceFormat for unknown formats
Without this and the previous patch, it would see PIPE_FORMAT_NONE as a
zero-component format and delete the whole load.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
2200d3c2e7 nouveau/codegen: Use a NULL format for PIPE_FORMAT_NONE for images
Get rid of our own FMT_NONE and just use a NULL format in that case.
We're already checking su->tex.format != NULL in a bunch of cases but
none of those NULL checks are doing anything right now execpt detecting
when its an actual texture op and not an image op.  We'd like them to
start also applying for image load/store with an unspecified format.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
George Ouzounoudis
f453623255 nouveau/codegen: Handle nir op amul
This came from CTS clipping tests with geometry shaders.  Maybe can be
done as a lowering operation instead.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
George Ouzounoudis
43b8da3a8b nouveau/codegen: Support compact clip distances with arrayed_io
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Rebecca Mckeever
6990439eb8 nouveau/codegen: Set lower_device_index_to_zero
This instructs NIR to lower DeviceIndex to zero, which is needed
for a no-op implementation of VK_KHR_device_group.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Rebecca Mckeever
e2221a9cac nouveau/codegen: Support nir_intrinsic_load_workgroup_id_zero_base
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
f9d385d777 nouveau/codegen: Handle/indirect goes before sample index
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
1f60923b89 nouveau/nir: Implement support for compact arrays
This is needed for clip and cull distances.

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
M Henning
77acf89336 nv/codegen: Call nir_shader_gather_info
We need this info to be up-to-date for slot assignment.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
9a2d016021 nouveau: Allow GLSL_SAMPLER_DIM_SUBPASS*
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Faith Ekstrand
9cb70c6ee0 nv50/nir: Lower to scratch AFTER optimization
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24327>
2023-08-01 18:58:03 +00:00
Karol Herbst
8d7f682bdb nv50/ir/nir: Fix zero source handling of tex instructions.
For TXQ we know make sure that we at least add one source. If the nir
instruction however didn't had any sources, we inserted a fake 0 source
ending up with two 0s for TXQ.

It's unclear to me if we have other ops where this would be necessary.

Fixes: 85a31fa1fc ("nv50/ir/nir: fix txq emission on MS textures")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24373>
2023-07-29 19:01:40 +00:00
Karol Herbst
85a31fa1fc nv50/ir/nir: fix txq emission on MS textures
In GL and a lot of Vulkan if we end up with either a lod or an ms index.

Sadly in Vulkan we can end up with both and have to choose properly. For
TXQ we have to emit a zero LOD. For TXF we have to emit the ms index.

Fixes: bb032d8b62 ("nv50/ir/nir: implement nir_instr_type_tex")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24343>
2023-07-27 22:49:05 +00:00
Karol Herbst
2388f22a5e gm107/ir: fix SULDP for loads without a known format
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24312>
2023-07-25 23:15:41 +00:00
M Henning
b5a638454d nouveau: Drop BuildUtil::Location
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>
2023-07-21 02:40:36 +00:00
M Henning
73239d4029 nouveau: Drop BuildUtil::DataArray
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>
2023-07-21 02:40:35 +00:00
M Henning
51dfde7b96 nouveau: Drop ConverterCommon::Subroutine
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>
2023-07-21 02:40:35 +00:00
M Henning
c631635f43 nouveau: Drop tgsi support from nv50_ir_prog_info
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>
2023-07-21 02:40:35 +00:00
M Henning
38a96f79af nouveau: Delete nv50_ir_from_tgsi.cpp
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24175>
2023-07-21 02:40:35 +00:00
Karol Herbst
23795dc318 nvc0: fix num_gprs for Volta+
Overallocating by 2 gprs for ugprs is a wild guess by me. It does make
sense though as each subgroup shares 64 ugprs and that's 2 per thread.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24261>
2023-07-20 23:19:58 +00:00
M Henning
f39df8fe2d nv50/ir: Remove SpillSlot
Since nothing ever reads this data.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
2023-07-19 11:47:10 +00:00
M Henning
42f5f9cb8f nv50/ir: Remove dead loop from assignSlot
This loop can never execute. On entry we have offset = offsetBase and
offsetBase >= stackSize, so the condition offset < stackSize is always
false. The git history suggests that this was always broken this way.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
2023-07-19 11:47:10 +00:00
M Henning
3c0f8aec84 nv50/ir: Remove Function.stackPtr
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
2023-07-19 11:47:10 +00:00
M Henning
cd2c314ee0 nv50/ir: Remove ArgumentMovesPass
We only use OP_CALL for builtins at this point, so no need for this.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
2023-07-19 11:47:10 +00:00
M Henning
1032d5c836 nv50/ir: Drop nir_jump_return handling
This is always lowered before this point.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
2023-07-19 11:47:10 +00:00
Karol Herbst
a944a8eba9 nvc0: initial Ada enablement
Cc: 23.2 <mesa-stable>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24226>
2023-07-19 09:08:16 +00:00
Faith Ekstrand
259ba104f7 nv50/ir: Support vector movs
nir_opt_mov and nir_op_vecN are only the same if the mov is only a
single component.  Otherwise the vec loop will try to access src[c]
where c > 0 which breaks for nir_op_mov.  It's uncommon but scalar
back-ends can see vector movs so we need to handle this correctly.

Fixes: 6513c675ad ("nv50/ir/nir: implement nir_alu_instr handling")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24167>
2023-07-15 15:53:40 +00:00
Faith Ekstrand
c136a22b60 nv50/ir: Convert to new-style NIR registers
Shader-db results on Turing:

    total inst in shared programs : 11121531 -> 11121458 (-0.00%)
    total gpr in shared programs : 1848287 -> 1848425 (0.01%)
    total ugpr in shared programs : 0 -> 0 (0.00%)
    total local in shared programs : 27200 -> 27200 (0.00%)
    total shared in shared programs : 236476 -> 236476 (0.00%)
    total bytes in shared programs : 177944496 -> 177943328 (-0.00%)
    total cached in shared programs : 0 -> 0 (0.00%)

               inst      gpr     ugpr    local   shared    bytes   cached
    helped      470       50        0        0        0      470        0
      hurt      327      197        0        0        0      327        0

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24110>
2023-07-12 22:49:27 +00:00
Faith Ekstrand
73e191924c nir: Add a reg_intrinsics flag to nir_convert_from_ssa
It doesn't do anything yet. We leave that to the subsequent patches so we can
keep the tree-wide refactor as simple as possible.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089>
2023-07-12 01:34:27 +00:00
Rhys Perry
3d0e997e99 nir: split nir_lower_mov64
ACO will want to lower the conversions, but preserve the bcsels.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23926>
2023-07-03 10:38:27 +00:00
Karol Herbst
02aaf58908 nv50/ir/nir: set numBarriers if we emit an OP_BAR
Even though the field is called `numBarriers` we set it to 1 just like
we do with TGSI. It's unknown on what's the proper behavior here is. But
without this set the GPU will complain to us loudly, so this silences at
least that.

Fixes: a2d7a4f978 ("nv50/ir: convert to scoped_barrier")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23749>
2023-06-24 02:12:14 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Karol Herbst
c9a00d6676 nv50/ir: resolve -Woverloaded-virtual=1 warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>
2023-06-15 18:48:10 +00:00
Karol Herbst
6c73c6cec6 nv50/ir: use override
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23656>
2023-06-15 18:48:10 +00:00
Alyssa Rosenzweig
1d4a59448c treewide: Remove use_scoped_barrier
It is now set by all relevant drivers and not checked anywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
2023-06-13 16:36:10 +00:00
Emma Anholt
c3cbe610df nouveau: Delete the NV50_PROG_USE_TGSI env var.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23114>
2023-06-12 17:37:54 +00:00
Karol Herbst
a2d7a4f978 nv50/ir: convert to scoped_barrier
Contrary to how we implemented barriers the MEMBAR instruction actually
does not allow us to specify which memory to synchronize. We can only
specify the scope.

No regressions on TU102.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23208>
2023-06-07 09:57:24 +00:00
Yonggang Luo
12256136e0 compiler: Rename shader_prim to mesa_prim and replace all usage of pipe_prim_type with mesa_prim
This is a prepare step to remove depends on p_defines.h in src/util/*

This is done by:
replace pipe_prim_type with mesa_prim
replace shader_prim with mesa_prim
replace PIPE_PRIM_MAX  with MESA_PRIM_COUNT
replace SHADER_PRIM_  with MESA_PRIM_
replace PIPE_PRIM_ with MESA_PRIM_

This patch only replace code only

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23369>
2023-06-03 03:29:03 +00:00