Commit graph

489 commits

Author SHA1 Message Date
Sviatoslav Peleshko
8e6d28f473 intel/tools/tests: Add i965_asm tests for gfx12 and gfx12.5
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
b87fc2125e intel/tools/tests: Unbreak i965_asm tests
Currently it's searching for test cases in the nonexistent folders, and
because there are none, tests always pass. Point the script onto the
correct ones. And while we're at it, add a check to make sure this
situation won't repeat in the future.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
bb2083a57c intel/tools/tests: Fix sends indirect argument in gfx9 test
Currently it's in the wrong format. It was fixed in disasm in
98aab272 ("intel/disasm: Properly disassemble indirect SENDs").
This was accidentally working previously, but isn't accepted after the
changes made to implement send on gfx12.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
98d2461424 intel/tools/i965_asm: Don't set src0 for break and while on gfx12
This effectively implements same changes as were done to codegen in
bafc9515 ("intel/eu/gen12: Codegen control flow instructions correctly.")

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
db4d58fe31 intel/tools/i965_asm: Add dp4a and add3 instructions
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
88fcd305be intel/tools/i965_asm: Implement gfx12 and gfx12.5 send/sendc
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
bc46cc7807 intel/tools/i965_asm: Allow src0 and src2 of ternary instructions to be imm
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
8eaa0db13f intel/tools/i965_asm: Don't override flag reg from cond modifier
Both predication and conditional modifier use the same flag, but in
assembly it's specified only once. If the instruction already has a
flag from predication we should not override it with zeroes.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
f96e08f34d intel/tools/i965_asm: Allow neg and abs modifiers on accumulator register
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
98665e024f intel/tools/i965_asm: Handle sync instruction
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
9dd3a6f86f intel/tools/i965_asm: Handle HF immediates
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Sviatoslav Peleshko
0c41a8f5d6 intel/tools/i965_asm: Add SWSB handling
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25657>
2024-01-09 11:35:52 +00:00
Yonggang Luo
5a2aa3ff88 intel: Cleanup duplicate ALIGN macro defines
Use ALIGN function instead

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26864>
2024-01-03 12:46:10 +00:00
Yonggang Luo
8665ce27bc intel: Use ALIGN_POT instead of ALIGN inside macro define
These macro define is compute from literals, so use ALIGN_POT instead of ALIGN function
so that it's can be computed at compile time

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26864>
2024-01-03 12:46:10 +00:00
Paulo Zanoni
af65af8267 intel/tools: fix compilation of intel_hang_viewer on 32 bits
Because gcc was complaining:

../../src/intel/tools/intel_hang_viewer.cpp: In function ‘void display_hang_stats()’:
../../src/intel/tools/intel_hang_viewer.cpp:365:31: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 2 has type ‘std::vector<hang_bo>::size_type’ {aka ‘unsigned int’} [-Werror=format=]
  365 |    ImGui::Text("BOs:        %lu", context.bos.size());
      |                             ~~^   ~~~~~~~~~~~~~~~~~~
      |                               |                   |
      |                               long unsigned int   std::vector<hang_bo>::size_type {aka unsigned int}
      |                             %u
../../src/intel/tools/intel_hang_viewer.cpp:366:31: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 2 has type ‘std::vector<hang_exec>::size_type’ {aka ‘unsigned int’} [-Werror=format=]
  366 |    ImGui::Text("Execs       %lu", context.execs.size());
      |                             ~~^   ~~~~~~~~~~~~~~~~~~~~
      |                               |                     |
      |                               long unsigned int     std::vector<hang_exec>::size_type {aka unsigned int}
      |                             %u
../../src/intel/tools/intel_hang_viewer.cpp:367:31: error: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 2 has type ‘std::vector<hang_map>::size_type’ {aka ‘unsigned int’} [-Werror=format=]
  367 |    ImGui::Text("Maps:       %lu", context.maps.size());
      |                             ~~^   ~~~~~~~~~~~~~~~~~~~
      |                               |                    |
      |                               long unsigned int    std::vector<hang_map>::size_type {aka unsigned int}
      |                             %u
cc1plus: some warnings being treated as errors

I'm not sure if STL's size_type is defined by the spec to be anything
specific, but for the platforms we care about it seems to be size_t,
so change it to %z.

Fixes: 33fd93f3b1 ("intel/tools: hang viewer/editor")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26581>
2023-12-08 22:53:03 +00:00
Lionel Landwerlin
8d6c059bd2 intel/tools: 32bit compile fixes
Fixes: 03712579b0 ("intel/tools: add hang_replay tool")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26514>
2023-12-05 17:45:18 +00:00
Lionel Landwerlin
344a4948b7 intel/hang_replay: fix compile race with generated files
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 03712579b0 ("intel/tools: add hang_replay tool")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26510>
2023-12-05 06:09:52 +00:00
Lionel Landwerlin
33fd93f3b1 intel/tools: hang viewer/editor
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Lionel Landwerlin
1e17c2219a intel/error_decode: map i915 gfx12.5 register names to our names
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Lionel Landwerlin
a2a2624a8f intel/aubinator_error_decode: bump max buffers to 1024
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Lionel Landwerlin
df77e6da82 intel: add error2hangdump tool
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Lionel Landwerlin
a496abf177 intel/hang_replay: add the ability to pass the context image to sim-drm
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Lionel Landwerlin
03712579b0 intel/tools: add hang_replay tool
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21167>
2023-12-04 14:51:29 +00:00
Jordan Justen
543a707b7b intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22379>
2023-09-06 01:39:53 +00:00
Yonggang Luo
86bcc90c0e intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24438>
2023-08-03 22:00:15 +00:00
Jordan Justen
9ecfd9feea intel/tools: Use 'env bash' to find bash executable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24453>
2023-08-03 01:56:40 -07:00
Lionel Landwerlin
a8b8324494 intel/aubinator_error_decode: add ccs support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23867>
2023-06-27 19:59:06 +00:00
Yonggang Luo
05b840521a treewide: Replace the usage of TRUE/FALSE with true/false
this is a separate patch as it's won't affect the code style

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23577>
2023-06-27 18:18:28 +08:00
Ian Romanick
38f941c8a8 intel/stub_gpu: Don't run program again after using GDB
Fixes: c56dd678e4 ("intel/stub_gpu: add an option to launch valgrind")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23736>
2023-06-21 04:47:48 +00:00
Lionel Landwerlin
c56dd678e4 intel/stub_gpu: add an option to launch valgrind
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23405>
2023-06-06 14:47:41 +00:00
Benjamin Lee
7e9b06f1c6 intel: Fix stack overflow in intel_dump_gpu
Previously, the call to ensure_device_info in the intercepted ioctl
would eventually result in another call to ioctl, recursing until stack
overflow:

 - ioctl (intercepted)
 - ensure_device_info
 - intel_get_device_info_from_fd
 - intel_device_info_i915_get_info_from_fd
 - getparam
 - intel_ioctl
 - ioctl (intercepted)

Signed-off-by: Benjamin Lee <benjamin@computer.surgery>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23418>
2023-06-06 11:17:06 +00:00
Dylan Baker
9ca0bdba01 intel/tools/error2aub: Fix potential out of bounds read
Originally the engines size was set to I915_ENGINE_CLASS_VIDEO + 1,
where video was the largest value, and INVALID had a value of -1. Since
then a COMPUTE member was added to the enum, and the INTEL_ENGINE class
moved invalid to the last value.

CID: 1530425
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23384>
2023-06-02 23:21:05 +00:00
Marcin Ślusarz
d6ece34418 intel/tools: decode ACTHD printed by newer kernels
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22874>
2023-05-05 14:55:41 +00:00
Lionel Landwerlin
5c214117ad intel/tools: add ability to dump out raw kernels data
Useful for debug.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22703>
2023-04-26 10:00:54 +00:00
Dylan Baker
a0fa31bcdd intel/dev: create a helper dependency for libintel_dev
This ensures that users of libintel_dev.a won't be compiled until
include files are generated, and that they are recompiled when the
header changes.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20825>
2023-03-02 00:01:27 +00:00
Yonggang Luo
669a68489d meson: Use sse2_arg and sse2_args to replace usage of c and c_sse2_args
And now c_sse2_arg and c_sse2_args are remvoed

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21375>
2023-02-27 13:50:11 +00:00
Rohan Garg
a06f751ec8 anv,hasvk: migrate align32 to the right functions from util
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20104>
2023-01-06 17:22:16 +00:00
Max Lee
32010d985c intel_noop_drm_shim: add ability to specify device id
Given a GPU platform, there are multiple device ids. This commit
adds ability to specify device id for the shim, instead of using
one of the hard-coded device ids per platform.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20526>
2023-01-05 08:37:01 +00:00
Philippe Lecluse
a821dfbda5 intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument
This is meant to remove any integrated GPU only code paths that can't
be compiled in CPU architectures different than x86.

Discrete GPUS don't have need_clflush set to true so it was just
matter of remove some code blocks around need_clflush but was left a
check in anv_physical_device_init_heaps() to fail physical device
initialization if it ever became false.

Signed-off-by: Philippe Lecluse <philippe.lecluse@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19812>
2022-11-23 16:57:23 +00:00
José Roberto de Souza
dfd20f002f intel: Add and use intel_gem_get_param()
Again sharing the same function across all Intel drivers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
2022-11-07 17:22:14 +00:00
José Roberto de Souza
772dfd60ad intel: Convert i915 engine type to intel in tools/ common/ and ds/
This ones were left to be done after initial conversion.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18975>
2022-10-15 20:04:51 +00:00
Matt Turner
59dca6f6e1 intel/tools: Also look for 'batch' tag
This changed in the kernel at some point, but I'm not sure when.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18087>
2022-08-17 02:24:09 +00:00
Yonggang Luo
44a64a34bf intel: Fixes compile error of aubinator_viewer.cpp with gcc
Remove '-Wno-class-memaccess' from cpp_args because clang don't support this option

aubinator_viewer.cpp:1183:39: error: 'void* memset(void*, int, size_t)' clearing an object of non-trivial type 'struct Context'; use assignment or value-initialization instead [-Werror=class-memaccess]
 1183 |    memset(&context, 0, sizeof(context));

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18024>
2022-08-12 18:06:36 +00:00
Lionel Landwerlin
00d8fcee10 intel/drm-shim: update shim to support DG2
We were missing :
  * GEM_CREATE_EXT (for local memory allocations)
  * MMAP_OFFSET (new version of mmap required on DG2)
  * GEOMETRY_SUBSLICE query (also required on DG2)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18005>
2022-08-11 22:45:07 +03:00
Lionel Landwerlin
9d55c5237e intel/tools/stub: fixup parsing of --platform=
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
2022-08-02 11:17:58 +00:00
Lionel Landwerlin
f2bbc959a0 intel/tools/drm-shim: fixup eu_stride for topology
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
2022-08-02 11:17:58 +00:00
Kenneth Graunke
72e9843991 intel/compiler: Introduce a new brw_isa_info structure
This structure will contain the opcode mapping tables in the next
commit.  For now, this is the mechanical change to plumb it into all
the necessary places, and it continues simply holding devinfo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17309>
2022-06-30 23:46:35 +00:00
Kenneth Graunke
c0784804a1 intel/tools: Stop malloc'ing device info in i965_disasm
There's not really any point, a stack allocated struct works fine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17309>
2022-06-30 23:46:35 +00:00
Marcin Ślusarz
f4386b81e6 intel: fix typos found by codespell
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17191>
2022-06-27 10:20:55 +00:00
Marcin Ślusarz
21d3630cbc intel/tools: fix 32-bit build
Fixes: 0aac3b1009 ("intel/tools/aubinator: add support for 2 "new" subopcodes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6553
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16695>
2022-05-24 18:27:32 +00:00