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15839 commits

Author SHA1 Message Date
Georg Lehmann
96b9f695d4 aco/isel: use upper bound for v_mul_u32_u24 
The optimizer can use this.

Foz-DB Navi31:
Totals from 577 (0.73% of 79395) affected shaders:
Instrs: 4209237 -> 4206859 (-0.06%); split: -0.06%, +0.00%
CodeSize: 21511192 -> 21511984 (+0.00%); split: -0.02%, +0.02%
SpillSGPRs: 679 -> 671 (-1.18%)
Latency: 28448559 -> 28443863 (-0.02%); split: -0.04%, +0.03%
InvThroughput: 5221932 -> 5218443 (-0.07%); split: -0.09%, +0.02%
Copies: 297965 -> 298076 (+0.04%); split: -0.01%, +0.05%
VALU: 2385304 -> 2383500 (-0.08%)
SALU: 485553 -> 485533 (-0.00%); split: -0.01%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31245>
 2024-09-19 17:08:47 +00:00
Georg Lehmann
e1b280a85f aco: use ac_nir_opt_shared_append 
Foz-DB Navi21:
Totals from 46 (0.06% of 79395) affected shaders:
Instrs: 85383 -> 84759 (-0.73%)
CodeSize: 449840 -> 447064 (-0.62%)
Latency: 570585 -> 566983 (-0.63%); split: -0.63%, +0.00%
InvThroughput: 133619 -> 132777 (-0.63%)
VClause: 1769 -> 1771 (+0.11%)
SClause: 2524 -> 2525 (+0.04%)
Copies: 6347 -> 6139 (-3.28%)
Branches: 4246 -> 4170 (-1.79%)
PreSGPRs: 2109 -> 2091 (-0.85%)
VALU: 50968 -> 50758 (-0.41%)
SALU: 14473 -> 14129 (-2.38%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31075>
 2024-09-19 16:21:48 +00:00
Georg Lehmann
45e935800a aco: implement nir_shared_append/consume_amd 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31075>
 2024-09-19 16:21:48 +00:00
Georg Lehmann
970503a0b9 aco/assembler: support ds_append/ds_*_addtid 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31075>
 2024-09-19 16:21:48 +00:00
Georg Lehmann
2789cee0c0 amd/nir: add ac_nir_opt_shared_append 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31075>
 2024-09-19 16:21:47 +00:00
Sergi Blanch Torne
213f5e9152 Uprev Piglit to e9ab30aeaed97b69868cf4d6d6a3f70f3b53c362 
93b4bd2e0a...e9ab30aeae

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Acked-by: Daniel Stone <daniels@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31058>
 2024-09-19 15:41:32 +00:00
Samuel Pitoiset
822139aefa radv/ci: stop skipping dEQP-VK.api.command_buffers.many_indirect_disps_on_secondary 
It no longer hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31247>
 2024-09-19 13:53:08 +00:00
Eric Engestrom
656ba4c6aa amd/ci: track changes to the global driver *-skips.txt files 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31253>
 2024-09-19 12:20:36 +00:00
Konstantin Seurer
60c53f5e63 radv: Initialize sqtt state before meta state 
Sqtt needs to be initialized before BVH build pipelines are compiled to
avoid crashes on startup.

Fixes: 5fa22f9 ("radv: regroup all tools initialization in one helper")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31207>
 2024-09-19 08:27:08 +00:00
Samuel Pitoiset
28ed064a01 amd/addrlib: remove bogus assert in HwlComputeSlicePipeBankXor() 
For some reasons, this triggers only on VanGogh with some tests that
copy layered BCn images but they all pass in release build.

Suggested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31226>
 2024-09-19 07:52:36 +00:00
Samuel Pitoiset
1d7b7b36a8 radv: stop reporting VKCTS conformance on GFX11+ 
Only GFX10.3 is conformant against VKCTS 1.3.x but we never submitted
any packages for GFX11+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31219>
 2024-09-19 07:14:22 +00:00
Georg Lehmann
bc3b8c3a13 radv: advertise VK_KHR_shader_float_controls2 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
b20d793774 aco/tests: fix omod signed zero tests 
If we keep denorms, omod won't be used no matter what.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
27cf11dc8a aco: remove per block inf/nan/sz control 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
f1a09d1f40 aco/optimizer: use new per definition float control flags 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
5c3ea47793 aco/tests: use new float control flags 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
9850f759dd aco/isel: set per instruction float control modes 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
9f1ad7d2f3 aco/vn: handle sz/inf/nan preserve 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
8912f16464 aco/ir: add float control definition flags 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Georg Lehmann
fc4b23130c aco/isel: add function to create builder for alu 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31172>
 2024-09-18 20:46:17 +00:00
Samuel Pitoiset
a5a2f82149 radv/ci: stop skipping few tests that hang only with LLVM 
LLVM testing in CI is useless and these tests shouldn't be skipped
for ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31217>
 2024-09-18 10:11:26 +00:00
Samuel Pitoiset
71e9572e72 radv: update the stencil layout for DRLR feedback loops 
HTILE decompresses both aspects.

Fixes: 3af0f0129c ("radv: fix DRLR with subpass input attachments and feedback loops")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31200>
 2024-09-18 08:05:32 +00:00
Samuel Pitoiset
231688ad57 radv: add missing cache flushes for DRLR feedback loops 
We should make sure the attachment is readable after the transition.

Fixes: 3af0f0129c ("radv: fix DRLR with subpass input attachments and feedback loops")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31200>
 2024-09-18 08:05:32 +00:00
Samuel Pitoiset
ad3e6bb06a radv: fix lowering VS inputs when offset >= stride on GFX6-7 
This was supposed to be >=.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31209>
 2024-09-18 07:21:28 +00:00
Samuel Pitoiset
15b1790a1e radv,aco: fix legacy vertex attributes when offset >= stride on GFX6-7 
The indexing needs to be adjusted and the best solution seems to
use soffset instead of const_offset, it's simpler and generate less
prologs than passing the vertex binding strides to the prolog.

Fixes dEQP-VK.pipeline.*.vertex_input.legacy_vertex_attributes.*stride_1*.

Fixes: 38cbc3c605 ("radv: advertise VK_EXT_legacy_vertex_attributes")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31209>
 2024-09-18 07:21:28 +00:00
Marek Olšák
0d8fe2d03b ac/nir/meta: tune clear/copy_buffer performance for gfx6-10.3 
Finally, old GPUs have optimal clear/copy_buffer performance, but only
the top dGPU of each generation gets the best behavior.

Other dGPUs might need slightly different conditions.
APUs likely need very different conditions.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31082>
 2024-09-17 15:19:32 -04:00
Samuel Pitoiset
656d7e887a radv: fix lowering the view index to an input varying for FS 
When multiview is used and the FS is compiled separately with GPL, the
view index still needs to be lowered, otherwise it's crashing later.

The lowering doesn't need to know the previous stage because ViewIndex
is a global thing (ie. it's neither a per-vertex or a per-primitive
varying).

This fixes recent
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.view_index_from_device_index_*_pre_rasterization

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31192>
 2024-09-17 06:36:08 +00:00
Samuel Pitoiset
fb3b563d1f radv: enable more properties with VK_KHR_maintenance5 
They are all supported by the hw and this matches AMD drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31129>
 2024-09-17 06:10:54 +00:00
Rohan Garg
85b8579bf6 radv: enable VK_KHR_shader_relaxed_extended_instruction 
The extension only affects non semantic instructions that need no
handling in the backend compiler.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
 2024-09-16 15:58:35 +00:00
Samuel Pitoiset
32567f6a2a radv: compute shader hash for shaders created without internal cache 
VK_KHR_pipeline_binary allows the application to take full control on
the cache and internal caches (disk or in-memory) can be disabled.

Though the shader hash should still be computed, otherwise all pipeline
binaries have a key with all zeroes.

Fixes: 8802612458 ("radv: advertise VK_KHR_pipeline_binary"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31163>
 2024-09-16 13:53:36 +00:00
Samuel Pitoiset
ad68c83f92 radv: fix copying the pipeline binary key 
Only the first byte was copied.

Fixes: be06bfcbed ("radv: add initial support for pipeline binaries")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31163>
 2024-09-16 13:53:36 +00:00
Samuel Pitoiset
f88cf56087 radv/rt: skip shaders cache for pipelines created with the capture/replay flag 
Otherwise, if a pipeline is found in cache it will use a different
shader arena for allocation and the capture replay shader group handles
won't match.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31188>
 2024-09-16 12:29:49 +00:00
Hans-Kristian Arntzen
f3c6bbdd8d radv: Always make sure to write the pipeline binary key. 
There's nothing in spec that says that key is only written
if data is also written.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: be06bfcbed ("radv: add initial support for pipeline binaries")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31162>
 2024-09-16 11:38:07 +00:00
Ganesh Belgur Ramachandra
62592674e0 amd: fix incorrect PIPE_INTERLEAVE_BYTES size for CDNA chips 
The expected PIPE_INTERLEAVE_BYTES size is ADDR_PIPEINTERLEAVE_256B on
gfx940 (or other CDNA based chips). Since CDNA based chips like gfx940
doesn't support image opcodes, it gets gibberish value from the kernel.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30891>
 2024-09-16 09:31:49 +00:00
Samuel Pitoiset
ba7e3be425 radv: merge radv_emit_epilog() with radv_emit_ps_epilog_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
Samuel Pitoiset
26d8f1a306 aco,radv,radeonsi: move has_epilog to the fragment shader info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
Samuel Pitoiset
b377ddfd04 radv,radeonsi: remove remaining occurrences of TCS epilog 
TCS epilog has been removed few months ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31150>
 2024-09-16 07:53:00 +00:00
Konstantin Seurer
bacf9752f4 radv: Work around broken terrain in Warhammer III 
Hiding storage support for depth formats forces the game to take a
different, working path for terrain height map initialization.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31152>
 2024-09-13 07:48:02 +00:00
Ian Romanick
3b13a0018f radv: Use nir_opt_generate_bfi to generate bitfield_select 
v2: Move to radv_optimize_nir_algebraic. Suggested by Georg.

Tested-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31006>
 2024-09-13 00:21:00 +00:00
Samuel Pitoiset
e1df6cf499 radv: use radv_get_user_sgpr_loc() more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31115>
 2024-09-12 07:01:36 +00:00
Samuel Pitoiset
190d46b65d radv: precompute more PGM registers for all stages 
Less error prone and easier to update for new hardware.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31115>
 2024-09-12 07:01:36 +00:00
Samuel Pitoiset
c7a509f55c radv: update PGM register for TES+GS compiled separately with ESO 
Not sure why 0xB210 works on GFX10+ because it's supposed to be
0xB320 with/without NGG...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31115>
 2024-09-12 07:01:36 +00:00
Martin Roukala (né Peres)
97624f99a1 radv/ci: run vkcts-navi31-valve pre-merge 
We currently have 3 runners with 7950X3D CPUs and 7900XT GPUs which
can rip through VKCTS in ~16 minutes.

Since this is over the 15 minutes threshold, we parallelize the job to
get under 15 minutes, which nets up ~10 minutes total runtime.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31085>
 2024-09-12 03:37:18 +00:00
Martin Roukala (né Peres)
7bb80e184c radv/ci: document more vkcts flakes 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31085>
 2024-09-12 03:37:18 +00:00
Dave Airlie
7c6e3c70b6 radv/video/enc: report pps overrides in feedback for h265 
radv does change h265 usually so report in feedback info.

Fixes: 967e4e09de ("radv/video: add h265 encode support")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
 2024-09-12 10:58:02 +10:00
Dave Airlie
8d08e92199 radv/video: fix encode reference slot counting 
This needs the max of slot indices.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
 2024-09-12 10:57:58 +10:00
Dave Airlie
e89f4a48fd radv: Fix radeon_enc_code_ue with values over 2^16 
This ports this fixes from radeonsi:

138ba42a87 ("radeonsi/vcn: Fix radeon_enc_code_ue with values over 2^16")

Cc: mesa-stable
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
 2024-09-12 10:57:18 +10:00
Daniel Schürmann
07b1fd64b7 aco/live_var_analysis: don't set lateKill for p_interp_gfx11 m0 operand 
There is no danger of overwriting m0 anymore.

Fixes: dfc13fcf9f ('aco: introduce Operand flag 'CopyKill'')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31127>
 2024-09-11 10:36:34 +00:00
Daniel Schürmann
a9d64fa1bd radv: promote VK_NV_compute_shader_derivatives -> VK_KHR_compute_shader_derivatives 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30972>
 2024-09-11 08:37:46 +00:00
Samuel Pitoiset
b4ae6eb5fc radv: use radv_upload_indirect_descriptor_sets() in DGC 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31096>
 2024-09-10 15:07:04 +00:00