Commit graph

123 commits

Author SHA1 Message Date
Jason Ekstrand
33dc8549fb isl: Add support for HiZ surfaces
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
fc3650a0a9 isl: Kill off isl_format_layout::bs
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
1f0433f075 isl: Take bpb rather than bs in tiling_get_info
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
8c76b9bdce isl: Use bpb for determining YUV image padding
When we initially dropped bpb in favor of bs, we accidentally didn't change
this one line properly.  This brings it back to what it should be.

Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
0bd3a7e931 isl: Change the physical size of a W-tile to 128x32
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
4b62c19c32 isl: Rework the way we define tile sizes.
This is based on a very long set of discussions between Chad and myself
about how we should properly represent HiZ and CCS buffers.  The end result
of that discussion was that a tiling actually has two different sizes, a
logical size in elements, and a physical size in bytes and rows.  This
commit reworks ISL's pitch and size calculations to work in terms of these
two sizes.

Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
7270bd0607 isl: Rework the way we handle surface padding
Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
a52f26d6e8 isl: Use ARRAY_PITCH_SPAN_FULL for depth/stencil surfaces on gen7
We helpfully inserted a PRM quotation about how we need to use
ARRAY_PITCH_SPAN_FULL and then set it to COMPACT.  Oops...

Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
0d48ac627a isl: Stop multiplying height by block size
The row pitch already specifies the size of a row of elements.
Multiplying by the block height simply causes us to allocate as muc as 12
times more memory than needed for compressed textures.

Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Jason Ekstrand
58c1b1088b isl: Get rid of tiling_get_extent
It was unused

Reviewed-by: Chad Versace <chad.versace@intel.com>
2016-07-13 11:47:37 -07:00
Ben Widawsky
8314dd7ff2 isl: Fix some tautological-compare warnings
Fixes:
isl.c:62:22: warning: self-comparison always evaluates to true [-Wtautological-compare]
    assert(ISL_DEV_GEN(dev) == dev->info->gen);
                      ^~
isl.c:63:33: warning: self-comparison always evaluates to true [-Wtautological-compare]
    assert(ISL_DEV_USE_SEPARATE_STENCIL(dev) == dev->use_separate_stencil);

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-05-26 21:59:17 -07:00
Nanley Chery
a141576887 isl: Handle npot ASTC block dimensions on Gen9+
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-20 09:27:11 -07:00
Matt Turner
0a548eb56f isl: Mark default cases in switch unreachable.
To silence -Wmaybe-uninitialized warnings.
2016-05-18 11:09:37 -07:00
Grazvydas Ignotas
ff48375a16 isl: fix warnings in release build
Mark variables MAYBE_UNUSED to avoid unused-but-set-variable warnings
in release build.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-04-25 12:23:28 +02:00
Jason Ekstrand
b0a5ca5cfc isl: Remove surf_get_intratile_offset_el
The intratile offset may not be a multiple of the element size so this
calculation is invalid.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-04-08 15:58:01 -07:00
Jason Ekstrand
b37502b983 isl: Rework the get_intratile_offset function
The old function tried to work in elements which isn't, strictly speaking,
a valid thing to do.  In the case of a non-power-of-two format, there is no
guarantee that the x offset into the tile is a multiple of the format
block size.  This commit refactors it to work entirely in terms of a tiling
(not a surface) and bytes/rows.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-04-08 15:57:58 -07:00
Nanley Chery
091f1da902 isl: Don't filter tiling flags if a specific tiling bit is set
If a specific bit is set, the intention to create a surface with a
specific tiling format should be respected.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 11:23:40 -08:00
Nanley Chery
456f5b0314 isl: Add function to get intratile offsets from x/y offsets
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-03-03 10:56:15 -08:00
Jason Ekstrand
a0cd20eb7f isl: Add a helper for filling a buffer surface state 2016-02-27 10:26:14 -08:00
Jason Ekstrand
d798762cdb isl: Add a function for filling out a surface state 2016-02-27 10:26:13 -08:00
Nanley Chery
265d4c415c isl: Fix isl_surf_get_image_intratile_offset_el()
Consecutive tiles are separated by the size of the tile, not by the
logical tile width.

v2: Remove extra subtraction (Ville)
    Add parenthesis (Jason)
v3: Update the unit tests for the function

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2016-02-26 16:59:36 -08:00
Jason Ekstrand
bc696f1db6 isl: Stop including mesa/main/imports.h
It pulls in all sorts of stuff we don't want.
2016-02-20 10:35:25 -08:00
Jason Ekstrand
47b8b08612 Move isl to src/intel 2016-02-18 10:34:47 -08:00
Renamed from src/isl/isl.c (Browse further)