Commit graph

6347 commits

Author SHA1 Message Date
Anuj Phogat
65d7f52098 intel: Fix broken alignment due to gen_ prefix renaming
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
692472a376 intel: Rename "gen_" prefix used in common code to "intel_"
This patch renames functions, structures, enums etc. with "gen_"
prefix defined in common code.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Anuj Phogat
733b0ee8cb intel: Rename files with gen_ prefix in common code to intel_
Changes in this patch include:
- Rename all files in src/intel/common path
- Update the filenames used in source and build files

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9413>
2021-03-10 22:23:51 +00:00
Jason Ekstrand
b9e9f92f73 intel/fs: Handle payload node interference in destinations
Starting with d0d039a4d3, we emit writes to the push constant chunk
of the payload to stomp out-of-bounds data to zero for Vulkan.  Then, in
369eab9420, we started emitting shader preamble code for emulated
push constants on Gen12.5 parts.  In either of these cases, we can run
into issues if we don't have a proper live range for some of the payload
registers where they get used for something and then smashed by our push
handling code.  We've not seen many issues with this yet because it only
happens when you have dead push constants.

Fixes: d0d039a4d3 "anv: Emit pushed UBO bounds checking code..."
Fixes: 369eab9420 "intel/fs: Emit code for Gen12-HP indirect..."
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9501>
2021-03-10 22:17:41 +00:00
Jason Ekstrand
8b7c2f1800 intel/fs: Use INTEL_MASK for pushish constant address masking
It's easier to compare with the HW docs than a pile of hex.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9501>
2021-03-10 22:17:41 +00:00
Jason Ekstrand
24414e7ec4 anv: Drop CreateRenderPass
Fall back to the common implementation instead.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
2021-03-10 18:17:31 +00:00
Jason Ekstrand
4fb6c051c9 anv: Move vk_format helpers to common code
The Android ones we put in anv_android.c.  Maybe one day we'll want a
vk_android.h to put some common Android stuff but, for now, let's keep
it contained to ANV's android code.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
2021-03-10 18:17:31 +00:00
Jason Ekstrand
145444d265 anv: Move multialloc to common code
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
2021-03-10 18:17:31 +00:00
Sagar Ghuge
0314c7503f intel/blorp: Fix condition to figure out aux_address
Fixes: 4dfabac4 ("blorp/gen12: Don't use aux address if implicit CCS")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9491>
2021-03-09 22:39:43 -08:00
Sagar Ghuge
e3d221838a Revert "Revert "blorp/gen12: Don't use aux address if implicit CCS""
This reverts commit cbd5d82bae.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9491>
2021-03-09 22:39:20 -08:00
Mark Janes
cbd5d82bae Revert "blorp/gen12: Don't use aux address if implicit CCS"
This reverts commit 4dfabac493.

The offending commit broke tens of thousands of tests in Intel's Mesa
CI.  Iris asserted in iris_use_pinned_bo at:

  assert(bo->kflags & EXEC_OBJECT_PINNED);

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9489>
2021-03-09 18:06:50 -08:00
Chad Versace
d978383966 anv/image: Make memory layout more explicit
Future patches for VK_EXT_image_drm_format_modifier will, in some cases,
place the aux surface and fast clear state into a driver-private bo.
This increases the complexity of image memory layout to such a degree
that, to maintain sanity, we must improve how we track the layout.

Define new types:
  - anv_image_memory_range
  - anv_image_memory_binding
  - anv_image_binding

Delete many fields in anv_image (and its children), and replace them
with the new types.

This patch does not change how anv_image tracks (or, rather, does not
track) the memory of gen12 implicit ccs. We should probably do that, but
that's left as a future exercise.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
4dfabac493 blorp/gen12: Don't use aux address if implicit CCS
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
bb7d627865 anv/image: Add anv_image_address()
It calculates the address to a surface or to metadata in the image.

Refactor only. No intended change in behavior.

This patch prepares for, and reduces much noise in, the upcoming patch
that rewrites image memory tracking.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
1ef0fd3b70 anv: Refactor anv_image_get_compression_state_addr
Reduces noise in the path that introduces anv_image_mem_range.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
22ac3d74e0 anv/image: Clean up anv_GetImageMemoryRequirements2
If the image is disjoint, there is no reason to calculate image-global
memory requirements. Instead, only per-plane memory requirements are
needed.

Also, delete a large duplicate comment.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
ffc08351e1 anv: Add anv_surface_is_valid()
Current code checks for surface validity with `surface.isl.size_B > 0`.
Replace the checks with anv_surface_is_valid().

This prepares for adding new members to anv_surface that may
be accidentally used as a validity-indicator.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
3e6d3bca1d anv/android: Fix size check for imported gralloc bo
1. Don't compare bo->size to image->size. An upcoming patch replaces
anv_image::size with complicated stuff. Instead, properly query the
required size with anv_GetImageMemoryRequirements.

2. Require the bo to fit the *aligned* image size.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
449df3808f anv/image: Fix interpretation of 'disjoint'
The calculation of the subsurfaces' memory requirements assumed that the
image was disjoint if the image was created with
VK_IMAGE_CREATE_DISJOINT_BIT. But the Vulkan spec also requires that the
VkFormat be multi-planar.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
6fa56273be anv/image: Drop duplicate 'format' in anv_image_create()
Reduces the chance of misusing unitialized 'n_planes' and 'format'
during image creation.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
2328edbb62 anv/image: Move vkGetImageMemoryRequirements
Move from anv_device.c to anv_image.c, to live alongside
vkBindImageMemory* and related code.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
5065faca00 anv/image: Rename anv_image_plane::surface -> primary_surface
This disambiguates code that accesses `image->planes[*].surface`.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Chad Versace
e7844c552c anv/image: Replace bo_is_owned with from_gralloc (v2)
The name anv_image_plane::bo_is_owned will be made ambiguous by the
implementation of VK_EXT_image_drm_format_modifier, which may bind the
plane to multiple bo's.

Also, bo_is_owned was set if and only if the image was imported from
gralloc, and it was set only on the first plane. Therefore, let's rename
the field to from_gralloc, and move it to the toplevel of anv_image.

v2: Fix build in anv_android.c.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8097>
2021-03-09 18:42:20 +00:00
Jason Ekstrand
1399ee5cf9 anv: Drop anv_extensions.py
This should have been dropped in 27d496706e.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9469>
2021-03-09 10:36:19 +00:00
Fan Yugang
6905122999 intel/tools: Show unknown instructions in decoded state.
Signed-off-by: Fan Yugang <yugang.fan@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9455>
2021-03-09 09:36:08 +00:00
Jason Ekstrand
25020c125a intel/mi_builder: Fix a couple of #ifs
All this does is remove a field on Gen7 and stop asserting on it.  No
actual functional change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9467>
2021-03-08 16:14:13 -06:00
Jason Ekstrand
62c64e7b9d intel/mi_builder: Fix some indentation
This got lost in the rebase on top of the s/gen_mi_/mi_/ change

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9467>
2021-03-08 16:13:37 -06:00
Jordan Justen
45e5c6b641 anv: Add mem heap/type support for local-mem
This will take effect in future patches when we are able to query the
kernel to set device->vram.size to a non-zero size.

Builds on Sagar's ("anv: Query memory region info") patch, and
re-organizes things as recommended by Lionel (and Jason).

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
2021-03-08 12:47:06 -08:00
Jordan Justen
7c41ae0a81 anv: Put cache memory type first on non-llc platforms
Suggested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
2021-03-08 12:47:06 -08:00
Jordan Justen
fd98721cba anv: Restructure mem heap/type init code
Just treat the llc and non-llc paths as separate cases. This will also
help when adding the local memory setup.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
2021-03-08 12:47:06 -08:00
Sagar Ghuge
835c257f64 anv: Add anv_memregion structure
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9324>
2021-03-08 12:47:06 -08:00
Jason Ekstrand
e20e85f01e nir: Make nir_ssa_def_rewrite_uses_after take an SSA value
This replaces the new_src parameter of nir_ssa_def_rewrite_uses_after()
with an SSA def, and rewrites all the users as needed.

Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Jason Ekstrand
117668b811 nir: Make nir_ssa_def_rewrite_uses take an SSA value
This commit replaces the new_src parameter of nir_ssa_def_rewrite_uses()
with an SSA def, removes nir_ssa_def_rewrite_uses_ssa(), and rewrites
all the users as needed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9383>
2021-03-08 16:59:55 +00:00
Jason Ekstrand
98a5b9b454 intel/mi_builder: Add control-flow support
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
8525ebe6e3 intel/mi_builder: Return an address from __gen_get_batch_address
While we're here, add __gen_get_batch_address declarations to more files
because we're about to start requiring it on all GFX 12.5+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
322fba216b intel/mi_builder: Use softpin for tests on gen8+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
c23f7f1154 intel/batch_decoder: Don't follow predicated MI_BATCH_BUFFER_START
The stuff after these may be executed so we want to decode it too.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
6721925220 genxml: Clean up MI_SET_PREDICATE
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:19 -06:00
Jason Ekstrand
c7c524337a intel/mi_builder: Add load/store_offest on GFX 12.5+
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:47:18 -06:00
Jason Ekstrand
6323a8522b intel/mi_builder: Support inverted values in mi_store
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:45:45 -06:00
Sagar Ghuge
04d0d4e849 intel/mi_builder: Added support for command streamer shift operations
Add logical shift left and right operations support to mi_builder.

v1:
- Add GEN_GEN > 12 check (Jordan Justen)
- Add gen_mi_has_shift function (Jordan Justen)
- Fix commit title (Jordan Justen)

v2 (Jason Ekstrand):
- Add _imm versions of all of them
- Better handle corner-cases in _imm helpers
- Handle the power-of-two limitation for _imm versions
- Add tests

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:45:42 -06:00
Jason Ekstrand
62b9e30cc7 intel/mi_builder: Add ieq/ine helpers
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 10:45:24 -06:00
Jason Ekstrand
2c02740a8c intel/mi_builder: Use AddCSMMIOStartOffset for LRI
In 06cf838cbd we started using the AddCSMMIOStartOffset feature
on Gen11+ but we missed one place.

Fixes: 06cf838cbd "intel/mi_builder: Support gen11 command-streamer..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9445>
2021-03-08 09:54:45 -06:00
Lionel Landwerlin
8955d179d3 anv: fix MI_PREDICATE_RESULT write
This register is only 32bits.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1952fd8d2c ("anv: Implement VK_EXT_conditional_rendering for gen 7.5+")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9428>
2021-03-05 16:19:20 +00:00
Iván Briano
194e477615 anv: don't advertise mipmaps for linear 3D surfaces on BDW
Prior to SKL, the mipmaps for 3D surfaces are laid out in a way
that make it impossible to represent in the way that
VkSubresourceLayout expects. Since we can't tell users how to make
sense of them, don't report them as available.

"Fixes" dEQP-VK.image.subresource_layout.3d.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9419>
2021-03-04 16:23:23 -08:00
Lionel Landwerlin
8023d6de20 anv: implement INTEL_DEBUG=submit
Name all the BOs!

v2: Fix 32bit build issue (Thanks Marge!)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5736>
2021-03-04 19:46:24 +02:00
Jason Ekstrand
1e53e0d2c7 intel/mi_builder: Drop the gen_ prefix
mi_ is already a unique prefix in Mesa so the gen_ isn't really gaining
us anything except extra characters.  It's possible that MI_ may
conflict a tiny bit with GenXML but it doesn't seem to be a problem
today and we can deal with that in the future if it's ever an issue.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Jason Ekstrand
6d522538b6 intel: Rename gen_mi_builder.h to mi_builder.h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Lionel Landwerlin
0f437e49c6 anv: fix missing general state pool in validation list
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 83fee30e85 ("anv: allow multiple command buffers in anv_queue_submit")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9388>
2021-03-03 18:24:16 +00:00
Rhys Perry
cbb5ed476c nir/opt_shrink_vectors: add option to skip shrinking image stores
Some games declare the wrong format, so we might want to disable this
optimization in that case.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: e4d75c22 ("nir/opt_shrink_vectors: shrink image stores using the format")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9229>
2021-03-03 14:18:37 +00:00