Commit graph

9904 commits

Author SHA1 Message Date
Samuel Pitoiset
6554cee7b7 radv: add gather_shader_info_vs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
ba11aeca6b radv: add gather_shader_info_tcs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
4cec1f130b radv: add gather_shader_info_tes() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
f70a0d12da radv: add gather_shader_info_gs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
f52b0dec3b radv: add gather_shader_info_mesh() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
4a2ebd6076 radv: add gather_shader_info_fs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
4571126d26 radv: move filling cs.block_size
This is used for compute and task shaders and will help for adding
new helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
6f244ae9ad radv: stop gathering info for FS before other stages
This is no longer needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
31dc03e21e radv: link primitive ID/clip distance shader info from the new helper
No functional changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
96b9d9f081 radv: add a helper that links shader info between stages
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
8c6a252c74 radv: remove redundant VS output parameter assignments
assign_outinfo_params() should already assign them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
2d0500d24a radv: fill radv_vs_output_info unconditionally for vertex related stages
That shouldn't change anything for VS as LS (or as ES) and for
TES as ES because radv_vs_output_info is only used by the last
vertex stage. So, if we have TES+GS, radv_vs_output_info for TES
will be overwritten by GS. This allows to decouple the shader info
pass from other stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
ee5b9bcc57 radv: stop duplicating radv_vs_output_info
Only the last vertex stage needs to access this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
45a0276cd1 radv/llvm: remove unused parameter in handle_vs_outputs_post()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
20ebdc3c2b radv: replace cs.uses_task_rings by ms.has_task
Task shaders always use a ring, so this field was useless somehow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
03d2af30f6 radv: remove dead code about task ring when binding a compute pipeline
This is probably a leftover when task shader has been reworked, but it
has no effect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
38ae5b6da6 radv: compute the ESGS itemsize outside of radv_nir_shader_info_pass()
radv_nir_shader_info_pass() should run on individual shaders only, and
"linked" shader info should be done separately for better design.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
dbf175f255 radv: use esgs_itemsize when calling ac_nir_lower_es_outputs_to_mem
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
0df2d5e318 radv: stop duplicating radv_es_output_info
This structure isn't really useful and it contains only one field.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
a04fd5c61f ac: constify ac_compute_cs_workgroup_size()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset
8cd1683944 aco: fix wrong size for 1D images and A16 on GFX9
Size is in bytes, not bits.

Fixes plenty of crashes in CI, like
dEQP-VK.synchronization.op.single_queue.event.write_image_fragment_read_image_tess_eval.image_128_r32_uint.

Fixes: 46f6e2ddbb ("aco: Implement storage image A16.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18266>
2022-08-26 13:30:46 +00:00
Samuel Pitoiset
0250925f07 radv: destroy the pipeline layout if creating a library failed
It should be properly cleaned.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset
39bebff1ac radv: fix missing initialization of the pipeline layout when creating a lib
The base object won't be initialized otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset
e6e8c092ff radv: remove bogus assertion about independent set layouts with GPL
layout->independent_sets can't be TRUE here.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset
64045fcf7c radv: re-emit viewports if negative one to one or depth clamp mode changed
The following sequence would be broken if we don't re-emit viewports.

vkCmdSetViewport()
VkCmdBindPipeline(negative_one_to_one = false)
vkCmdDraw()
VkCmdBindPipeline(negative_one_to_one = true)
vkCmdDraw()

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18245>
2022-08-26 12:46:41 +00:00
Samuel Pitoiset
68e69d002f radv: stop emitting RMW context registers for updating sample locations
RMW context registers have been removed in RadeonSI a while ago
because they don't seem good for performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset
2f5891108a radv: cleanup dynamic states in radv_emit_graphics_pipeline()
Some dynamic states always need to be emitted when the first pipeline
is emitted, some others depend on pipeline state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset
85a55009be radv: stop clearing bitfields for registers that are emitted dynamically
These fields aren't set at pipeline creation, so clearing them is
just useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset
7aaa016b23 radv: stop setting CB_COLOR_CONTROL.ROP3 from the pipeline
This is useless because logic op is a dynamic state and it's already
emitted from the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Qiang Yu
b5c10a9028 ac/llvm: cast tes_u/v_replaced to float
Otherwise LLVM float ops fail to operate on them.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
f75452918b ac/nir/ngg: support clipdist culling
Port from radeonsi.

Besides vertex position based primitive culling, clipdist
attribute can also be used to cull a primitive. Normally
it's used by fixed-pipeline, but when NGG we can treate it
as a culling condition to filter out invisible primitive
before fixed-pipeline.

There are two kinds of clipdist:
1. user define a clip plane explicitly by glClipPlane(),
   fixed-pipeline calculate with vertex position to get
   clipdist, then cull. This is the legacy way.
2. Now GLSL define gl_ClipDistance/gl_CullDiatance so that
   user can calculate clipdist in any way he like.

This implementation support both way.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
620e62bb39 ac/nir/ngg: support component position store
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
1bdeb961bd ac/nir/ngg: add gs culling
Port from radeonsi.

Cull primitive after GS thread and before final vertex/primitive
export. GS culling is like VS/TES culling which read out saved
vertex positions of a primitive from LDS then call the primitive
culling algorithm to check whether it's visiable or not, only
passed primitives will be exported.

Unlike the VS/TES culling that read vertex index of a primitive
from VGPRs as shader args, GS will set a primitive complete flag
for each last vertex of a primitive in LDS, so that vertex thread
know the previous 1/2/3 vertex can form a primitive and do primitive
culling.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
b212fd4b1e ac/nir/ngg: save and restore position output base for nogs
radeonsi has different driver_location and io location.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
7e17e01973 ac/nir/ngg: save and restore output bit size for gs
radeonsi does not have io nir variables, so need to save output
bit size when lower store_output intrinsic.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
93a635c2c8 ac/nir/ngg: use same driver location for gs output
driver_location and io location are different for radeonsi,
and radeonsi llvm rely on the correct driver_location to
index output variables.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
347a94666c ac/nir/ngg: fix and simplify gs store output lower
Simplify: 64bit IO has been lowered by nir_lower_io with
nir_lower_io_lower_64bit_to_32, so no need to handle in the
ngg lower.

Fix: we need to increase io_sem.location by base_offset for
correct gs_output_info.

radeonsi has different driver_location and io location, so
also change the output variable index to io location.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
db0e9d3cab ac/nir/ngg: support line culling
Port from ac_llvm_cull.c

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
f1f2c931a7 ac/nir/cull: support caller react when primitive is rejected
Make accept_func optional, and return accpect result for caller
react when primitive is rejected.

This is for GS culling.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
035d70f721 ac/nir/ngg,radv: use nir_load_viewport_xy_scale_and_offset
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
a19dcdf9d5 nir,ac/llvm: add nir_intrinsic_load_viewport_xy_scale_and_offset
Used by RADV/Radeonsi NGG culling. Pack them into a single vec4
load for radeonsi to reduce const buffer load.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Qiang Yu
1aef9c8318 nir,ac/llvm: add nir_intrinsic_load_half_line_width_amd
Used by AMD GPU NGG line culling. We could use nir load
line width and viewport scale to calculate this in shader,
but this way needs expensive divide ops.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17651>
2022-08-26 05:50:30 +00:00
Rhys Perry
fb13ed6ff0 aco: fix long-jump version of discard early exit
It isn't safe to modify the exec mask before the discard block, and the
definition interferes with GFX11 NOP insertion.

Just use s[0:1] instead, since we won't be using it.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18125>
2022-08-25 16:10:53 +00:00
Georg Lehmann
b3cc213f56 radv: Fold 16bit image sources.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
2022-08-24 17:04:03 +00:00
Georg Lehmann
9151048957 aco: Combine 16bit undef and constants instead of using s_pack.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
2022-08-24 17:04:03 +00:00
Georg Lehmann
46f6e2ddbb aco: Implement storage image A16.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18106>
2022-08-24 17:04:03 +00:00
Georg Lehmann
8eac45b274 nir: Add nir_ssa_scalar_is_undef.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18183>
2022-08-24 15:22:40 +00:00
Konstantin Seurer
78564b5b84 radv: Advertise subgroup ops for rt stages
Closes: #7098
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18169>
2022-08-24 13:05:38 +00:00
Samuel Pitoiset
15a7361ce9 radv: merge gather_tess_info() with radv_fill_shader_info()
Shouldn't introduce any functional changes. The dependencies between
stages might be improved with a new helper that will link shader_info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
2022-08-24 11:17:05 +00:00
Samuel Pitoiset
7b94ca287b radv: remove unused num_tess_patches assignment for VS
This is never used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18184>
2022-08-24 11:17:05 +00:00