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107821 commits 66 branches 937 tags 967 MiB
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9 commits

Author SHA1 Message Date
Kenneth Graunke
651be7cf3d iris: rewrite to use memzones and not relocs 2019-02-21 10:26:05 -08:00
Kenneth Graunke
db15993cfd iris: actually pin the instruction cache buffers 2019-02-21 10:26:05 -08:00
Kenneth Graunke
5ae278da18 iris: use vtbl to avoid multiple symbols, fix state base address 2019-02-21 10:26:05 -08:00
Kenneth Graunke
ff5c886fb3 iris: move MAX defines to iris_batch.h 
for SBA
 2019-02-21 10:26:05 -08:00
Kenneth Graunke
b701096ab9 iris: make iris_batch target a particular ring 2019-02-21 10:26:05 -08:00
Kenneth Graunke
ffd7f13b4d iris: drop unused field 2019-02-21 10:26:05 -08:00
Kenneth Graunke
d3d6ef37f6 iris: initial render state upload 2019-02-21 10:26:04 -08:00
Kenneth Graunke
26fb5a8ae2 iris: port over batchbuffer updates 2019-02-21 10:26:04 -08:00
Kenneth Graunke
2dce0e94a3 iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs. 
This commit introduces a new Gallium driver for Intel Gen8+ GPUs,
named 'iris_dri.so' after the hardware.

Developed by:
- Kenneth Graunke (overall driver)
- Dave Airlie (shaders, conditional render, overflow query, Gen8 port)
- Chris Wilson (fencing, pinned memory, ...)
- Jordan Justen (compute shaders)
- Jason Ekstrand (image load store)
- Caio Marcelo de Oliveira Filho (tessellation control passthrough)
- Rafael Antognolli (auxiliary buffer fixes)
- The rest of the i965 contributors and the Mesa community
 2019-02-21 10:26:04 -08:00